FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/dyn_dwl_cfile/Makefile @ 1030:194967e11b2b
fc-shell: tch record and tch play reworked for libgsm-compatible file format
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Tue, 31 May 2016 18:39:06 +0000 |
parents | 48969469d961 |
children |
rev | line source |
---|---|
927
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
1 CC= arm-elf-gcc |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
3 -I../dyn_dwl_include -I../tm_include -I../tm_cust0 -I../cust0 \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
4 -I../tpudrv -DMOVE_IN_INTERNAL_RAM |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
5 CFLAGS= -O2 -fno-builtin -mthumb-interwork |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 LD= arm-elf-ld |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 XOBJS= l1_dyn_dwl_afunc.o l1_dyn_dwl_apihisr.o l1_dyn_dwl_async.o \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
9 l1_dyn_dwl_func.o l1_dyn_dwl_init.o l1_dyn_dwl_sync.o |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
10 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
11 all: xipcode.o |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
12 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
13 ${XOBJS}: %.o : %.c |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
14 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $< |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
15 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
16 xipcode.o: ${XOBJS} |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
17 ${LD} -r -o $@ ${XOBJS} |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
18 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
19 clean: |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
20 rm -f *.[oa] *.out *errs |