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annotate target-utils/pirexplore/main.c @ 716:21cd7e35807a

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gsm-fw/g23m-gsm/l1: l1_pei.c compiles
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Fri, 03 Oct 2014 21:10:00 +0000
parents fcbe1332b197
children a7b0b426f9ca
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1 #include "types.h"
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2 #include "romvars.h"
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3
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4 extern struct boot_rom_vars rom_vars;
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5
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6 extern char *uart_name;
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7
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8 main()
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9 {
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10 uart_select_init();
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11 printf("Pirelli hardware exploration utility running\n");
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12 printf("Loaded via UART %d (%s) at baud rate #%d\n", rom_vars.uart_id,
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13 uart_name, rom_vars.baud_rate_code);
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14 printf("TCXO clock input autodetected to be %d MHz\n",
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15 rom_vars.clktcxo_13mhz ? 13 : 26);
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16 /*
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17 * Make the same register settings as in the init script used by
a323b4cc69e6 pirexplore: XRAM/flash access init like in the pirelli.init script
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18 * fc-loadtool and fc-xram: ../../loadtools/scripts/pirelli.init
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19 */
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20 *(volatile u16 *)0xfffffb00 = 0x00A4;
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21 *(volatile u16 *)0xfffffb02 = 0x00A4;
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22 *(volatile u16 *)0xfffffb06 = 0x00A4;
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23 *(volatile u16 *)0xfffef006 = 0x0008;
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24 /*
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25 * Other register settings replicating what OsmocomBB does
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26 * in board/pirelli_dpl10/init.c
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27 */
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fcbe1332b197 pirexplore: LCD init and BL control work now
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28 *(volatile u16 *)0xfffef008 = 0x7090;
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29 *(volatile u16 *)0xfffef00a = 0x021F;
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30 *(volatile u16 *)0xfffe4804 = 0xFF6D;
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31 *(volatile u16 *)0xfffe4802 = 0x0000;
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32 /* nCS4 setup for SPCA552E */
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33 *(volatile u16 *)0xfffffb0a = 0x00A7;
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34 /* initialize PWL registers like OsmocomBB does */
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35 *(volatile u8 *)0xfffe8000 = 0x32;
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36 *(volatile u8 *)0xfffe8001 = 0x01;
67
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37 for (;;) {
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38 putchar('=');
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39 if (command_entry())
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40 command_dispatch();
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41 }
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42 }