FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/abb+spi/abb.c @ 152:26472940e5b0
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author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 17 Nov 2013 04:59:55 +0000 |
parents | d0de2d0a426d |
children | 47754cdb6248 |
rev | line source |
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1 /**********************************************************************************/ |
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2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */ |
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3 /* */ |
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4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */ |
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5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This */ |
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6 /* product is protected under copyright law and trade secret law as an */ |
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7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All */ |
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8 /* rights reserved. */ |
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9 /* */ |
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10 /* */ |
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11 /* Filename : abb.c */ |
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12 /* */ |
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13 /* Description : Functions to drive the ABB device. */ |
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14 /* The Serial Port Interface is used to connect the TI */ |
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15 /* Analog BaseBand (ABB). */ |
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16 /* It is assumed that the ABB is connected as the SPI */ |
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17 /* device 0. */ |
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18 /* */ |
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19 /* Author : Pascal PUEL */ |
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20 /* */ |
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21 /* Version number : 1.3 */ |
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22 /* */ |
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23 /* Date and time : 08/22/03 */ |
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24 /* */ |
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25 /* Previous delta : Creation */ |
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26 /* */ |
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27 /**********************************************************************************/ |
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28 |
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29 #include "../../include/config.h" |
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30 #include "../../L1/include/l1_confg.h" |
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31 #include "../../L1/include/l1_macro.h" |
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32 |
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33 #include "abb.h" |
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34 #include "../clkm.h" // for wait_ARM_cycles function |
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35 #include "abb_inline.h" |
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36 #include "../ulpd.h" // for FRAME_STOP definition |
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37 #include "../../nucleus/nucleus.h" // for NUCLEUS functions and types |
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38 #include "../../L1/include/l1_types.h" |
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39 |
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40 #include "../../include/sys_types.h" |
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41 #include "../../riviera/rv/general.h" |
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42 #if 0 |
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43 #include "buzzer/buzzer.h" // for BZ_KeyBeep_OFF function |
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44 #endif |
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45 |
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46 #if (VCXO_ALGO == 1) |
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47 #include "../../L1/include/l1_ctl.h" |
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48 #endif |
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49 |
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50 #if (RF_FAM == 35) |
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51 #include "../../L1/cust0/l1_rf35.h" |
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52 #endif |
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53 |
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54 #if (RF_FAM == 12) |
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55 #include "tpudrv12.h" |
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56 #include "../../L1/cust0/l1_rf12.h" |
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57 #endif |
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58 |
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59 #if (RF_FAM == 10) |
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60 #include "../../L1/cust0/l1_rf10.h" |
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61 #endif |
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62 |
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63 #if (RF_FAM == 8) |
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64 #include "../../L1/cust0/l1_rf8.h" |
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65 #endif |
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66 |
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67 #if (RF_FAM == 2) |
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68 #include "../../L1/cust0/l1_rf2.h" |
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69 #endif |
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70 |
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71 #if (ABB_SEMAPHORE_PROTECTION) |
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72 |
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73 static NU_SEMAPHORE abb_sem; |
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74 |
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75 /*-----------------------------------------------------------------------*/ |
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76 /* ABB_Sem_Create() */ |
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77 /* */ |
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78 /* This function creates the Nucleus semaphore to protect ABB accesses */ |
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79 /* against preemption. */ |
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80 /* No check on the result. */ |
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81 /* */ |
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82 /*-----------------------------------------------------------------------*/ |
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83 void ABB_Sem_Create(void) |
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84 { |
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85 // create a semaphore with an initial count of 1 and with FIFO type suspension. |
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86 NU_Create_Semaphore(&abb_sem, "ABB_SEM", 1, NU_FIFO); |
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87 } |
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88 |
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89 #endif // ABB_SEMAPHORE_PROTECTION |
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90 |
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91 /*-----------------------------------------------------------------------*/ |
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92 /* ABB_Wait_IBIC_Access() */ |
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93 /* */ |
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94 /* This function waits for the first IBIC access. */ |
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95 /* */ |
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96 /*-----------------------------------------------------------------------*/ |
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97 void ABB_Wait_IBIC_Access(void) |
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98 { |
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99 #if (ANLG_FAM ==1) |
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100 // Wait 6 OSCAS cycles (100 KHz) for first IBIC access |
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101 // (i.e wait 60us + 10% security marge = 66us) |
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102 wait_ARM_cycles(convert_nanosec_to_cycles(66000)); |
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103 #elif ((ANLG_FAM ==2) || (ANLG_FAM == 3)) |
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104 // Wait 6 x 32 KHz clock cycles for first IBIC access |
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105 // (i.e wait 187us + 10% security marge = 210us) |
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106 wait_ARM_cycles(convert_nanosec_to_cycles(210000)); |
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107 #endif |
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108 } |
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109 |
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110 |
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111 |
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112 /*-----------------------------------------------------------------------*/ |
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113 /* ABB_Write_Register_on_page() */ |
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114 /* */ |
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115 /* This function manages all the spi serial transfer to write to an */ |
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116 /* ABB register on a specified page. */ |
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117 /* */ |
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118 /*-----------------------------------------------------------------------*/ |
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119 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value) |
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120 { |
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121 volatile SYS_UWORD16 status; |
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122 |
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123 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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124 SPI_Ready_for_WR |
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125 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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126 |
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127 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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128 |
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129 // check if the semaphore has been correctly created and try to obtain it. |
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130 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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131 // as soon as the semaphore is released. |
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132 if(&abb_sem != 0) |
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133 { |
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134 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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135 } |
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136 #endif // ABB_SEMAPHORE_PROTECTION |
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137 |
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138 // set the ABB page for register access |
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139 ABB_SetPage(page); |
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140 |
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141 // Write value in reg_id |
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142 ABB_WriteRegister(reg_id, value); |
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143 |
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144 // set the ABB page for register access at page 0 |
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145 ABB_SetPage(PAGE0); |
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146 |
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147 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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148 // release the semaphore only if it has correctly been created. |
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149 if(&abb_sem != 0) |
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150 { |
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151 NU_Release_Semaphore(&abb_sem); |
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152 } |
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153 #endif // ABB_SEMAPHORE_PROTECTION |
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154 |
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155 // Stop the SPI clock |
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156 #ifdef SPI_CLK_LOW_POWER |
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157 SPI_CLK_DISABLE |
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158 #endif |
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159 } |
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160 |
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161 |
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162 /*-----------------------------------------------------------------------*/ |
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163 /* ABB_Read_Register_on_page() */ |
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164 /* */ |
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165 /* This function manages all the spi serial transfer to read one */ |
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166 /* ABB register on a specified page. */ |
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167 /* */ |
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168 /* Returns the real data value of the register. */ |
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169 /* */ |
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170 /*-----------------------------------------------------------------------*/ |
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171 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id) |
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172 { |
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173 volatile SYS_UWORD16 status; |
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174 SYS_UWORD16 reg_val; |
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175 |
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176 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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177 SPI_Ready_for_RDWR |
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178 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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179 |
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180 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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181 |
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182 // check if the semaphore has been correctly created and try to obtain it. |
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183 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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184 // as soon as the semaphore is released. |
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185 if(&abb_sem != 0) |
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186 { |
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187 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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188 } |
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189 #endif // ABB_SEMAPHORE_PROTECTION |
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190 |
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191 /* set the ABB page for register access */ |
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192 ABB_SetPage(page); |
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193 |
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194 /* Read selected ABB register */ |
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195 reg_val = ABB_ReadRegister(reg_id); |
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196 |
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197 /* set the ABB page for register access at page 0 */ |
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198 ABB_SetPage(PAGE0); |
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199 |
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200 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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201 // release the semaphore only if it has correctly been created. |
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202 if(&abb_sem != 0) |
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203 { |
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204 NU_Release_Semaphore(&abb_sem); |
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205 } |
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206 #endif // ABB_SEMAPHORE_PROTECTION |
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207 |
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208 // Stop the SPI clock |
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209 #ifdef SPI_CLK_LOW_POWER |
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210 SPI_CLK_DISABLE |
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211 #endif |
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212 |
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213 return (reg_val); // Return result |
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214 } |
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215 |
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216 /*------------------------------------------------------------------------*/ |
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217 /* ABB_free_13M() */ |
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218 /* */ |
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219 /* This function sets the 13M clock working in ABB. A wait loop */ |
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220 /* is required to allow first slow access to ABB clock register. */ |
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221 /* */ |
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222 /* WARNING !! : this function must not be protected by semaphore !! */ |
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223 /* */ |
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224 /*------------------------------------------------------------------------*/ |
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225 void ABB_free_13M(void) |
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226 { |
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227 volatile SYS_UWORD16 status; |
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228 |
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229 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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230 SPI_Ready_for_WR |
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231 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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232 |
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233 ABB_SetPage(PAGE0); |
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234 |
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235 // This transmission frees the CLK13 in ABB. |
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236 ABB_WriteRegister(TOGBR2, 0x08); |
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237 |
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238 // Wait for first IBIC access |
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239 ABB_Wait_IBIC_Access(); |
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240 |
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241 // SW Workaround : This transmission has to be done twice. |
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242 ABB_WriteRegister(TOGBR2, 0x08); |
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243 |
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244 // Wait for first IBIC access |
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245 ABB_Wait_IBIC_Access(); |
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246 |
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247 // Stop the SPI clock |
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248 #ifdef SPI_CLK_LOW_POWER |
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249 SPI_CLK_DISABLE |
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250 #endif |
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251 } |
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252 |
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253 |
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254 |
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255 /*------------------------------------------------------------------------*/ |
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256 /* ABB_stop_13M() */ |
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257 /* */ |
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258 /* This function stops the 13M clock in ABB. */ |
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259 /* */ |
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260 /*------------------------------------------------------------------------*/ |
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261 void ABB_stop_13M(void) |
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262 { |
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263 volatile SYS_UWORD16 status; |
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264 |
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265 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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266 SPI_Ready_for_WR |
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267 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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268 |
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269 ABB_SetPage(PAGE0); |
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270 |
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271 // Set ACTIVMCLK = 0. |
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272 ABB_WriteRegister(TOGBR2, 0x04); |
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273 |
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274 // Wait for first IBIC access |
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275 ABB_Wait_IBIC_Access(); |
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276 |
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277 // Stop the SPI clock |
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278 #ifdef SPI_CLK_LOW_POWER |
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279 SPI_CLK_DISABLE |
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280 #endif |
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281 } |
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282 |
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283 |
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284 |
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285 /*------------------------------------------------------------------------*/ |
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286 /* ABB_Read_Status() */ |
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287 /* */ |
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288 /* This function reads and returns the value of VRPCSTS ABB register. */ |
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289 /* */ |
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290 /*------------------------------------------------------------------------*/ |
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291 SYS_UWORD16 ABB_Read_Status(void) |
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292 { |
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293 volatile SYS_UWORD16 status; |
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294 SYS_UWORD16 reg_val; |
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295 |
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296 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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297 SPI_Ready_for_WR |
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298 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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299 |
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300 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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301 |
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302 // check if the semaphore has been correctly created and try to obtain it. |
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303 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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304 // as soon as the semaphore is released. |
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305 if(&abb_sem != 0) |
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306 { |
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307 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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308 } |
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309 #endif // ABB_SEMAPHORE_PROTECTION |
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310 |
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311 ABB_SetPage(PAGE0); |
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312 |
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313 #if (ANLG_FAM == 1) || (ANLG_FAM == 2) |
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314 ABB_SetPage(PAGE0); |
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315 reg_val = ABB_ReadRegister(VRPCSTS); |
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316 #elif (ANLG_FAM == 3) |
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317 ABB_SetPage(PAGE1); |
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318 reg_val = ABB_ReadRegister(VRPCCFG); |
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319 #endif |
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320 |
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321 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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322 // release the semaphore only if it has correctly been created. |
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323 if(&abb_sem != 0) |
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324 { |
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325 NU_Release_Semaphore(&abb_sem); |
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326 } |
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327 #endif // ABB_SEMAPHORE_PROTECTION |
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328 |
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329 // Stop the SPI clock |
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330 #ifdef SPI_CLK_LOW_POWER |
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331 SPI_CLK_DISABLE |
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332 #endif |
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333 |
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334 return (reg_val); |
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335 } |
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336 |
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337 /*------------------------------------------------------------------------*/ |
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338 /* ABB_on() */ |
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339 /* */ |
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340 /* This function configures ABB registers to work in ON condition */ |
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341 /* */ |
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342 /*------------------------------------------------------------------------*/ |
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343 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag) |
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344 { |
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345 volatile SYS_UWORD16 status; |
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346 #if ((ANLG_FAM ==2) || (ANLG_FAM == 3)) |
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347 SYS_UWORD32 reg; |
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348 #endif |
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349 |
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350 // a possible cause of the recovery is that ABB is on Oscas => switch from Oscas to CLK13 |
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351 if (bRecoveryFlag) |
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352 { |
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353 // RESTITUTE 13MHZ CLOCK TO ABB |
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354 //--------------------------------------------------- |
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355 ABB_free_13M(); |
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356 |
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357 // RESTITUTE 13MHZ CLOCK TO ABB AGAIN (C.F. BUG1719) |
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358 //--------------------------------------------------- |
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359 ABB_free_13M(); |
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360 } |
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361 |
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362 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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363 SPI_Ready_for_RDWR |
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364 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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365 |
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366 #if (ABB_SEMAPHORE_PROTECTION == 3) |
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367 |
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368 // check if the semaphore has been correctly created and try to obtain it. |
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369 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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370 // as soon as the semaphore is released. |
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371 if(&abb_sem != 0) |
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372 { |
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373 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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374 } |
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375 #endif // ABB_SEMAPHORE_PROTECTION |
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376 |
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377 ABB_SetPage(PAGE0); |
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378 |
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379 // This transmission disables MADC,AFC,VDL,VUL modules. |
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380 ABB_WriteRegister(TOGBR1, 0x0155); |
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381 |
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382 #if (ANLG_FAM == 1) |
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383 // This transmission disables Band gap fast mode Enable BB charge. |
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384 ABB_WriteRegister(VRPCCTL2, 0x1fc); |
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385 |
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386 /* *********** DC/DC enabling selection ************************************************************** */ |
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387 // This transmission changes the register page in OMEGA for usp to pg1. |
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388 ABB_SetPage(PAGE1); |
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389 |
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390 /* Insert here accesses to modify DC/DC parameters. Default is a switching frequency of 240 Khz */ |
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391 { |
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392 SYS_UWORD8 vrpcctrl3_data; |
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393 |
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394 #if (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) |
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395 vrpcctrl3_data = 0x007d; // core voltage 1.4V for C035 |
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396 #else |
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397 vrpcctrl3_data = 0x00bd; // core voltage 1.8V for C05 |
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398 #endif |
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399 |
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400 if(modules & DCDC) // check if the DCDC is enabled |
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401 { |
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402 vrpcctrl3_data |= 0x0002; // set DCDCEN |
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403 } |
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404 |
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405 // This access disables the DCDC. |
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406 ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data); |
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407 } |
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408 |
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409 /* ************************ SELECTION OF TEST MODE FOR ABB **************************************** */ |
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410 /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins */ |
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411 /* ***************************************************************************************************/ |
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412 #if (BOARD==6)&& (ANLG_FAM==1) //BUG01967 to remove access to TAPCTRL (EVA4 board and Nausica) |
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413 // This transmission enables Omega test register. |
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414 ABB_WriteRegister(TAPCTRL, 0x01); |
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415 |
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gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
416 // This transmission select Omega test instruction. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
417 ABB_WriteRegister(TAPREG, TSPTEST1); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
418 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
419 // This transmission disables Omega test register. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
420 ABB_WriteRegister(TAPCTRL, 0x00); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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421 #endif |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
422 /* *************************************************************************************************** */ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
423 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
424 if (!bRecoveryFlag) // Check recovery status from L1, prevent G23 SIM issue |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
425 { |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
426 // This transmission changes SIM power supply to 3 volts. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
427 ABB_WriteRegister(VRPCCTRL1, 0x45); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
428 } |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
429 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
430 ABB_SetPage(PAGE0); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
431 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
432 // This transmission enables selected OMEGA modules. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
433 ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
434 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
435 if(modules & MADC) // check if the ADC is enabled |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
436 { |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
437 // This transmission connects the resistive divider to MB and BB. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
438 ABB_WriteRegister(BCICTL1, 0x0005); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
439 } |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
440 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
441 // Restore the ABB checks and debouncing if start on TESTRESETZ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
442 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
443 // This transmission changes the register page in the ABB for usp to pg1. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
444 ABB_SetPage(PAGE1); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
445 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
446 // This transmission sets the AFCCK to CKIN/2. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
447 ABB_WriteRegister(AFCCTLADD, 0x01); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
448 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
449 // This transmission enables the tapreg. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
450 ABB_WriteRegister(TAPCTRL, 0x01); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
451 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
452 // This transmission enables access to page 2. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
453 ABB_WriteRegister(TAPREG, 0x01b); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
454 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
455 // This transmission changes the register page in the ABB for usp to pg2. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
456 ABB_SetPage(PAGE2); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
457 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
458 #if (ANLG_FAM == 2) |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
459 // Restore push button environment |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
460 ABB_WriteRegister(0x3C, 0x07); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
461 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
462 #elif (ANLG_FAM == 3) |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
463 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
464 // Restore push button environment |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
465 ABB_WriteRegister(0x3C, 0xBF); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
466 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
467 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG1_0 *******************************/ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
468 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
469 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
470 #endif |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
471 // This transmission enables access to page 0. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
472 ABB_SetPage(PAGE0); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
473 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
474 // reset bit MSKINT1 , if set by TESTRESET |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
475 reg=ABB_ReadRegister(VRPCSTS) & 0xffe; |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
476 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
477 ABB_WriteRegister(VRPCSTS, reg); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
478 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
479 ABB_SetPage(PAGE2); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
480 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
481 // Restore default for BG behavior in sleep mode |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
482 ABB_WriteRegister(VRPCAUX, 0xBF); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
483 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
484 // Restore default for deboucing length |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
485 ABB_WriteRegister(VRPCLDO, 0x00F); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
486 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
487 // Restore default for INT1 generation, wait time in switch on, checks in switch on |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
488 ABB_WriteRegister(VRPCABBTST, 0x0002); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
489 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
490 #endif |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
491 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
492 // This transmission changes the register page in the ABB for usp to pg1. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
493 ABB_SetPage(PAGE1); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
494 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
495 // This transmission sets tapinst to id code. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
496 ABB_WriteRegister(TAPREG, 0x0001); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
497 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
498 // This transmission disables TAPREG access. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
499 ABB_WriteRegister(TAPCTRL, 0x00); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
500 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
501 // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
502 // This transmission enables BB charge and BB bridge connection for BB measurements. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
503 ABB_WriteRegister(BCICONF, 0x060); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
504 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
505 /* ************************ SELECTION OF BBCFG CONFIG FOR ABB 3 PG2_0 *******************************/ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
506 #if (ANLG_FAM == 3) |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
507 #if (ANLG_PG == S_PG_20) // SYREN PG2.0 ON EVACONSO |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
508 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
509 #endif |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
510 #endif |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
511 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
512 /* ************************ SELECTION OF TEST MODE FOR ABB ******************************************/ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
513 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
514 /* ****************************************************************************************************/ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
515 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
516 // This transmission enables the tapreg. |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
517 ABB_WriteRegister(TAPCTRL, 0x01); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
518 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
519 // This transmission select ABB test instruction. |
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diff
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520 ABB_WriteRegister(TAPREG, TSPEN); |
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parents:
diff
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|
521 |
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parents:
diff
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522 // This transmission changes the register page in ABB for usp to pg0. |
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parents:
diff
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523 ABB_SetPage(PAGE0); |
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parents:
diff
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|
524 |
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parents:
diff
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525 // This transmission enables selected ABB modules. |
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parents:
diff
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526 ABB_WriteRegister(TOGBR1, modules >> 6); |
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parents:
diff
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|
527 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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528 // enable MB & BB resistive bridges for measurements |
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parents:
diff
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529 if(modules & MADC) // check if the ADC is enabled |
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parents:
diff
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|
530 { |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
531 // This transmission connects the resistive divider to MB and BB. |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
532 ABB_WriteRegister(BCICTL1, 0x0001); |
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parents:
diff
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|
533 } |
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parents:
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|
534 |
63750f70796d
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parents:
diff
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|
535 /********* Sleep definition part ******************/ |
63750f70796d
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parents:
diff
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536 // This transmission changes the register page in the ABB for usp to pg1. |
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parents:
diff
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537 #if (ANLG_FAM == 2) |
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parents:
diff
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538 ABB_SetPage(PAGE1); |
63750f70796d
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parents:
diff
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|
539 |
63750f70796d
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parents:
diff
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|
540 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
63750f70796d
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parents:
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541 reg = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
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parents:
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542 |
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parents:
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543 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg)); |
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parents:
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|
544 |
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parents:
diff
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545 // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value. |
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parents:
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546 reg = ABB_ReadRegister(VRPCMSK) & 0x1e0; |
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parents:
diff
changeset
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547 ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg)); |
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parents:
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548 #elif (ANLG_FAM == 3) |
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549 Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY); |
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parents:
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550 #endif |
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parents:
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|
551 // This transmission changes the register page in the ABB for usp to pg0. |
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parents:
diff
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|
552 ABB_SetPage(PAGE0); |
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parents:
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553 #endif |
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parents:
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|
554 |
63750f70796d
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parents:
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|
555 // SW workaround for initialization of the audio parts of the ABB to avoid white noise |
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parents:
diff
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556 // C.f. BUG1941 |
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parents:
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557 // Set VDLR and VULR bits |
63750f70796d
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parents:
diff
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|
558 // Write TOGBR1 register |
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parents:
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|
559 // This transmission enables selected ABB modules. |
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parents:
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|
560 ABB_WriteRegister(TOGBR1, 0x0A); |
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parents:
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|
561 |
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parents:
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562 // wait for 1 ms |
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parents:
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563 wait_ARM_cycles(convert_nanosec_to_cycles(1000000)); |
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parents:
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|
564 |
63750f70796d
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parents:
diff
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|
565 // Reset VDLS and VULS bits |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
566 // Write TOGBR1 register |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
567 // This transmission enables selected ABB modules. |
63750f70796d
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parents:
diff
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|
568 ABB_WriteRegister(TOGBR1, 0x05); |
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parents:
diff
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|
569 |
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parents:
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|
570 #if (ABB_SEMAPHORE_PROTECTION == 3) |
63750f70796d
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parents:
diff
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|
571 // release the semaphore only if it has correctly been created. |
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parents:
diff
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|
572 if(&abb_sem != 0) |
63750f70796d
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parents:
diff
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|
573 { |
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parents:
diff
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|
574 NU_Release_Semaphore(&abb_sem); |
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parents:
diff
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|
575 } |
63750f70796d
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parents:
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|
576 #endif // ABB_SEMAPHORE_PROTECTION |
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parents:
diff
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|
577 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
578 // Stop the SPI clock |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
579 #ifdef SPI_CLK_LOW_POWER |
63750f70796d
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parents:
diff
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|
580 SPI_CLK_DISABLE |
63750f70796d
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parents:
diff
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|
581 #endif |
63750f70796d
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parents:
diff
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|
582 } |
63750f70796d
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parents:
diff
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|
583 |
63750f70796d
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parents:
diff
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|
584 |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
585 |
63750f70796d
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parents:
diff
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|
586 /*-----------------------------------------------------------------------*/ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
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parents:
diff
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|
587 /* ABB_Read_ADC() */ |
63750f70796d
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parents:
diff
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|
588 /* */ |
63750f70796d
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parents:
diff
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|
589 /* This function manages all the spi serial transfer to read all the */ |
63750f70796d
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parents:
diff
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|
590 /* ABB ADC conversion channels. */ |
63750f70796d
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parents:
diff
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|
591 /* Stores the result in Buff parameter. */ |
63750f70796d
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parents:
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|
592 /* */ |
63750f70796d
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parents:
diff
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|
593 /*-----------------------------------------------------------------------*/ |
63750f70796d
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parents:
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|
594 void ABB_Read_ADC(SYS_UWORD16 *Buff) |
63750f70796d
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parents:
diff
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|
595 { |
63750f70796d
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parents:
diff
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|
596 volatile SYS_UWORD16 status; |
63750f70796d
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parents:
diff
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|
597 |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
598 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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parents:
diff
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|
599 SPI_Ready_for_RDWR |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
600 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
63750f70796d
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parents:
diff
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|
601 |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
602 #if (ABB_SEMAPHORE_PROTECTION == 3) |
63750f70796d
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parents:
diff
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|
603 |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
604 // check if the semaphore has been correctly created and try to obtain it. |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
605 // if the semaphore cannot be obtained, the task is suspended and then resumed |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
606 // as soon as the semaphore is released. |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
607 if(&abb_sem != 0) |
63750f70796d
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parents:
diff
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|
608 { |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
609 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
63750f70796d
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parents:
diff
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|
610 } |
63750f70796d
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parents:
diff
changeset
|
611 #endif // ABB_SEMAPHORE_PROTECTION |
63750f70796d
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parents:
diff
changeset
|
612 |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
613 // This transmission changes the register page in the ABB for usp to pg0. |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
614 ABB_SetPage(PAGE0); |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
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parents:
diff
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|
615 |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
616 /* Read all ABB ADC registers */ |
63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
617 *Buff++ = ABB_ReadRegister(VBATREG); |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
618 *Buff++ = ABB_ReadRegister(VCHGREG); |
63750f70796d
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parents:
diff
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|
619 *Buff++ = ABB_ReadRegister(ICHGREG); |
63750f70796d
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parents:
diff
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|
620 *Buff++ = ABB_ReadRegister(VBKPREG); |
63750f70796d
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parents:
diff
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|
621 *Buff++ = ABB_ReadRegister(ADIN1REG); |
63750f70796d
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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622 *Buff++ = ABB_ReadRegister(ADIN2REG); |
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623 *Buff++ = ABB_ReadRegister(ADIN3REG); |
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624 |
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625 #if (ANLG_FAM ==1) |
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626 *Buff++ = ABB_ReadRegister(ADIN4XREG); |
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627 *Buff++ = ABB_ReadRegister(ADIN5YREG); |
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628 #elif (ANLG_FAM ==2) |
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629 *Buff++ = ABB_ReadRegister(ADIN4REG); |
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630 #elif (ANLG_FAM == 3) |
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631 *Buff++ = ABB_ReadRegister(ADIN4REG); |
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632 *Buff++ = ABB_ReadRegister(ADIN5REG); |
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633 #endif // ANLG_FAM |
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634 |
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635 #if (ABB_SEMAPHORE_PROTECTION == 3) |
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636 // release the semaphore only if it has correctly been created. |
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637 if(&abb_sem != 0) |
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638 { |
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639 NU_Release_Semaphore(&abb_sem); |
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640 } |
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641 #endif // ABB_SEMAPHORE_PROTECTION |
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642 |
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643 // Stop the SPI clock |
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644 #ifdef SPI_CLK_LOW_POWER |
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645 SPI_CLK_DISABLE |
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646 #endif |
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647 } |
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648 |
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649 |
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650 |
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651 /*-----------------------------------------------------------------------*/ |
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652 /* ABB_Conf_ADC() */ |
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653 /* */ |
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654 /* This function manages all the spi serial transfer to: */ |
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655 /* - select the ABB ADC channels to be converted */ |
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656 /* - enable/disable EOC interrupt */ |
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657 /* */ |
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658 /*-----------------------------------------------------------------------*/ |
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659 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal) |
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660 { |
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661 volatile SYS_UWORD16 status; |
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662 SYS_UWORD16 reg_val; |
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663 |
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664 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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665 SPI_Ready_for_RDWR |
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666 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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667 |
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668 #if (ABB_SEMAPHORE_PROTECTION == 3) |
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669 |
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670 // check if the semaphore has been correctly created and try to obtain it. |
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671 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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672 // as soon as the semaphore is released. |
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673 if(&abb_sem != 0) |
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674 { |
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675 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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676 } |
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677 #endif // ABB_SEMAPHORE_PROTECTION |
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678 |
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679 // This transmission changes the register page in the ABB for usp to pg0. |
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680 ABB_SetPage(PAGE0); |
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681 |
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682 /* select ADC channels to be converted */ |
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683 #if (ANLG_FAM == 1) |
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684 ABB_WriteRegister(MADCCTRL1, Channels); |
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685 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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686 ABB_WriteRegister(MADCCTRL, Channels); |
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687 #endif |
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688 |
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689 reg_val = ABB_ReadRegister(ITMASK); |
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|
690 |
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691 // This transmission configure the End Of Conversion IT without modifying other bits in the same register. |
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692 if(ItVal == EOC_INTENA) |
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693 ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA); |
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694 else if(ItVal == EOC_INTMASK) |
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695 ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK); |
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696 |
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697 #if (ABB_SEMAPHORE_PROTECTION == 3) |
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698 // release the semaphore only if it has correctly been created. |
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699 if(&abb_sem != 0) |
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700 { |
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701 NU_Release_Semaphore(&abb_sem); |
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702 } |
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703 #endif // ABB_SEMAPHORE_PROTECTION |
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|
704 |
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705 // Stop the SPI clock |
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706 #ifdef SPI_CLK_LOW_POWER |
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707 SPI_CLK_DISABLE |
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708 #endif |
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709 } |
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|
710 |
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|
711 |
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|
712 |
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|
713 |
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714 /*------------------------------------------------------------------------*/ |
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715 /* ABB_sleep() */ |
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716 /* */ |
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717 /* This function disables the DCDC and returns to PAGE 0. It stops then */ |
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718 /* the 13MHz clock in ABB. A wait loop s required to allow */ |
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|
719 /* first slow access to ABB clock register. */ |
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|
720 /* */ |
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721 /* WARNING !! : this function must not be protected by semaphore !! */ |
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722 /* */ |
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|
723 /* Returns AFC value. */ |
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|
724 /* */ |
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725 /*------------------------------------------------------------------------*/ |
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726 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) |
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727 { |
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728 volatile SYS_UWORD16 status; |
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729 SYS_UWORD32 afcout_index; |
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730 volatile SYS_UWORD16 nb_it; |
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731 SYS_UWORD16 reg_val; |
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732 |
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733 // table for AFC allowed values during Sleep mode. First 5th elements |
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734 // are related to positive AFC values, last 5th to negative ones. |
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735 SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f}; |
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736 |
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737 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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738 SPI_Ready_for_RDWR |
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739 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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740 |
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741 // COMPUTATION AND PROGRAMMING OF AFC VALUE |
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742 //--------------------------------------------------- |
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743 if(afc & 0x1000) |
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744 afcout_index = ((afc + 512)>>10) + 1; |
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745 else |
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746 afcout_index = (afc + 512)>>10; |
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747 |
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748 if (sleep_performed == FRAME_STOP) // Big sleep |
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749 { |
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750 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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751 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP //////////////////////////// |
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752 #endif |
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753 |
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754 } |
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755 else // Deep sleep |
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756 { |
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|
757 #if(ANLG_FAM == 1) |
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758 // SELECTION OF AFC TEST MODE FOR OMEGA |
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759 //--------------------------------------------------- |
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760 // This test configuration allows access on the AFCOUT register |
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761 ABB_SetPage(PAGE1); |
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762 |
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763 // This transmission enables OMEGA test register. |
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764 ABB_WriteRegister(TAPCTRL, 0x01); |
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765 |
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766 // This transmission selects OMEGA test instruction. |
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767 ABB_WriteRegister(TAPREG, AFCTEST); |
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768 |
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769 // Set AFCOUT to 0. |
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770 ABB_WriteRegister(AFCOUT, 0x00 >> 6); |
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771 |
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772 ABB_SetPage(PAGE0); |
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773 |
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774 #elif (ANLG_FAM == 2) |
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775 // This configuration allows access on the AFCOUT register |
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776 ABB_SetPage(PAGE1); |
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777 |
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778 // Read AFCCTLADD value and enable USP access to AFCOUT register |
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779 reg_val = (ABB_ReadRegister(AFCCTLADD) | 0x04); |
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780 |
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|
781 ABB_WriteRegister(AFCCTLADD, reg_val); |
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|
782 |
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783 // Set AFCOUT to 0. |
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|
784 ABB_WriteRegister(AFCOUT, 0x00); |
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|
785 |
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786 // Read BCICONF value and cut the measurement bridge of BB cut the BB charge. |
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787 reg_val = ABB_ReadRegister(BCICONF) & 0x039f; |
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|
788 |
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|
789 ABB_WriteRegister(BCICONF, reg_val); |
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|
790 |
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791 // Disable the ABB test mode |
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792 ABB_WriteRegister(TAPCTRL, 0x00); |
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|
793 |
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|
794 ABB_SetPage(PAGE0); |
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|
795 |
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|
796 // Read BCICTL1 value and cut the measurement bridge of MB. |
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797 reg_val = ABB_ReadRegister(BCICTL1) & 0x03fe; |
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|
798 |
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|
799 ABB_WriteRegister(BCICTL1, reg_val); |
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800 #endif |
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|
801 |
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diff
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|
802 #if (ANLG_FAM == 3) // Nothing to be done as MB and BB measurement bridges are automatically disconnected |
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803 // in Syren during sleep mode. BB charge stays enabled |
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804 ABB_SetPage(PAGE1); // Initialize transmit reg_num. This transmission |
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805 // change the register page in IOTA for usp to pg1 |
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|
806 |
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|
807 ABB_WriteRegister(TAPCTRL, 0x00); // Disable Syren test mode |
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|
808 |
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|
809 ABB_SetPage(PAGE0); |
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810 #endif |
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|
811 |
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|
812 // switch off MADC, AFC, AUXDAC, VOICE. |
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|
813 ABB_WriteRegister(TOGBR1, 0x155); |
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|
814 |
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|
815 // Switch off Analog supply LDO |
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|
816 //----------------------------- |
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|
817 #if (ANLG_FAM == 1) |
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|
818 ABB_SetPage(PAGE1); |
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|
819 |
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|
820 // Read VRPCCTL3 register value and switch off VR3. |
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821 reg_val = ABB_ReadRegister(VRPCCTRL3) & 0x3df; |
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|
822 |
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|
823 ABB_WriteRegister(VRPCCTRL3, reg_val); |
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|
824 |
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|
825 #elif (ANLG_FAM == 2) |
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|
826 // Read VRPCSTS register value and extract status of meaningfull inputs. |
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|
827 reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070; |
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|
828 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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829 if (reg_val == 0x30) |
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830 { |
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parents:
diff
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831 // start the SLPDLY counter in order to switch the ABB in sleep mode. This transmission sets IOTA sleep bit. |
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832 ABB_WriteRegister(VRPCDEV, 0x02); |
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833 } |
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834 |
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835 // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read". |
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836 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); |
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837 |
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838 #elif (ANLG_FAM == 3) |
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diff
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839 // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed |
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840 // start the SLPDLY counter in order to switch the ABB in sleep mode |
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841 ABB_WriteRegister(VRPCDEV,0x02); // Initialize transmit reg_num. This transmission |
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842 // set Syren sleep bit |
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843 /* |
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844 // Dummy transmission to clean of ABB bus. This transmission accesses SYREN address 0 in "read". |
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845 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); |
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846 */ |
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847 #endif |
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848 |
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849 // Switch to low frequency clock |
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850 ABB_stop_13M(); |
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851 } |
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852 |
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853 // Stop the SPI clock |
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854 #ifdef SPI_CLK_LOW_POWER |
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855 SPI_CLK_DISABLE |
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856 #endif |
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|
857 |
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858 #if (OP_L1_STANDALONE == 1) |
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859 #if (CHIPSET == 12) |
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860 // GPIO_InitAllPull(ALL_ONE); // enable all GPIO internal pull |
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861 // workaround to set APLL_DIV_CLK( internal PU) at high level |
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862 // by default APLL_DIV_CLK is low pulling 80uA on VRIO |
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863 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x01;//CNTL_APLL_DIV_CLK -> APLL_CLK_DIV != 0 |
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864 // *(SYS_UWORD16*) (0xFFFEF030)= 0x10;// DPLL mode |
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865 #endif |
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866 #endif |
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867 return(Afcout_T[afcout_index]); |
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|
868 } |
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869 |
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870 |
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871 /*------------------------------------------------------------------------*/ |
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872 /* ABB_wakeup() */ |
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873 /* */ |
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874 /* This function sets the 13MHz clock working in ABB. A wait loop */ |
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875 /* is required to allow first slow access to ABB clock register. */ |
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876 /* Then it re-enables DCDC and returns to PAGE 0. */ |
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877 /* */ |
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878 /* WARNING !! : this function must not be protected by semaphore !! */ |
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879 /* */ |
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880 /*------------------------------------------------------------------------*/ |
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881 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) |
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882 { |
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883 volatile SYS_UWORD16 status; |
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|
884 SYS_UWORD16 reg_val; |
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|
885 |
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886 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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parents:
diff
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887 SPI_Ready_for_RDWR |
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888 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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|
889 |
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890 if (sleep_performed == FRAME_STOP) // Big sleep |
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891 { |
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892 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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893 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP //////////////////////////// |
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894 #endif |
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895 } |
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896 else // Deep sleep |
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|
897 { |
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898 #if (OP_L1_STANDALONE == 1) |
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parents:
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899 #if (CHIPSET == 12) |
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900 // restore context from |
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|
901 // workaround to set APLL_DIV_CLK( internal PU) at high level |
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parents:
diff
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|
902 // by default APLL_DIV_CLK is low pulling 80uA on VRIO |
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|
903 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x00;//CNTL_APLL_DIV_CLK -> APLL_DIV_CLK != 0 |
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904 // *(SYS_UWORD16*) (0xFFFEF030)= 0x00;// DPLL mode |
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905 #endif |
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|
906 #endif |
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|
907 |
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|
908 // Restitutes 13MHZ Clock to ABB |
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|
909 ABB_free_13M(); |
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|
910 |
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911 // Switch ON Analog supply LDO |
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|
912 #if (ANLG_FAM == 1) |
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913 ABB_SetPage(PAGE1); |
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|
914 |
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|
915 // Read VRPCCTL3 register value and switch on VR3. |
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diff
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|
916 reg_val = ABB_ReadRegister(VRPCCTRL3) | 0x020; |
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|
917 |
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|
918 ABB_WriteRegister(VRPCCTRL3, reg_val); |
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919 ABB_SetPage(PAGE0); |
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|
920 #endif |
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|
921 |
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|
922 // This transmission switches on MADC, AFC. |
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923 ABB_WriteRegister(TOGBR1, 0x280); |
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|
924 |
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|
925 // This transmission sets the AUXAFC2. |
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|
926 ABB_WriteRegister(AUXAFC2, ((afc>>10) & 0x7)); |
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|
927 |
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|
928 // This transmission sets the AUXAFC1. |
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|
929 ABB_WriteRegister(AUXAFC1, (afc & 0x3ff)); |
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930 |
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931 #if (ANLG_FAM == 1) |
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932 // Remove AFC test mode |
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933 ABB_SetPage(PAGE1); |
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934 |
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935 // This transmission select Omega test instruction. |
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936 ABB_WriteRegister(TAPREG, TSPTEST1); |
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937 |
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938 // Disable test mode selection |
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939 // This transmission disables Omega test register. |
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940 ABB_WriteRegister(TAPCTRL, 0x00 >> 6); |
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941 |
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942 ABB_SetPage(PAGE0); |
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943 |
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944 #elif (ANLG_FAM == 2) |
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945 ABB_SetPage(PAGE1); |
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946 |
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947 // Read AFCCTLADD register value and disable USP access to AFCOUT register. |
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948 reg_val = ABB_ReadRegister(AFCCTLADD) & ~0x04; |
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949 |
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950 ABB_WriteRegister(AFCCTLADD, reg_val); |
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951 |
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952 // Read BCICONF register value and enable BB measurement bridge enable BB charge. |
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953 reg_val = ABB_ReadRegister(BCICONF) | 0x0060; |
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954 |
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955 ABB_WriteRegister(BCICONF, reg_val); |
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956 |
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957 |
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958 /* *************************************************************************************************** */ |
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959 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
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960 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
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961 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); |
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962 |
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963 // Enable the ABB test mode |
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964 ABB_WriteRegister(TAPCTRL, 0x01); |
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965 ABB_WriteRegister(TAPREG, TSPEN); |
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966 ABB_SetPage(PAGE0); |
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967 |
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968 // Read BCICTL1 register value and enable MB measurement bridge and cut the measurement bridge of MB. |
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969 reg_val = ABB_ReadRegister(BCICTL1) | 0x0001; |
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970 |
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971 ABB_WriteRegister(BCICTL1, reg_val); |
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972 #endif |
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973 |
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974 #if (ANLG_FAM == 3) |
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975 |
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976 ABB_SetPage(PAGE1); |
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977 |
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978 /* *************************************************************************************************** */ |
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979 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. |
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980 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; |
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981 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); |
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982 |
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983 /* ************************ SELECTION OF TEST MODE FOR ABB=3 *****************************************/ |
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984 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ |
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985 /* ****************************************************************************************************/ |
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986 |
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987 ABB_WriteRegister(TAPCTRL, 0x01); // Initialize the transmit register |
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988 // This transmission enables IOTA test register |
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989 |
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990 ABB_WriteRegister(TAPREG, TSPEN); |
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991 // This transmission select IOTA test instruction |
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992 // This transmission select IOTA test instruction |
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993 /**************************************************************************************************** */ |
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994 |
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995 ABB_SetPage(PAGE0); // Initialize transmit reg_num. This transmission |
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996 #endif |
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997 } |
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998 |
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999 // Stop the SPI clock |
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1000 #ifdef SPI_CLK_LOW_POWER |
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1001 SPI_CLK_DISABLE |
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1002 #endif |
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1003 } |
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1004 |
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1005 /*------------------------------------------------------------------------*/ |
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1006 /* ABB_wa_VRPC() */ |
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1007 /* */ |
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1008 /* This function initializes the VRPCCTRL1 or VRPCSIM register */ |
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1009 /* according to the ABB used. */ |
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1010 /* */ |
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1011 /*------------------------------------------------------------------------*/ |
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1012 void ABB_wa_VRPC(SYS_UWORD16 value) |
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1013 { |
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1014 volatile SYS_UWORD16 status; |
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1015 |
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1016 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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1017 SPI_Ready_for_WR |
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1018 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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1019 |
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1020 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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1021 |
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1022 // check if the semaphore has been correctly created and try to obtain it. |
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1023 // if the semaphore cannot be obtained, the task is suspended and then resumed |
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1024 // as soon as the semaphore is released. |
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1025 if(&abb_sem != 0) |
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1026 { |
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1027 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND); |
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1028 } |
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1029 #endif // ABB_SEMAPHORE_PROTECTION |
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1030 |
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1031 ABB_SetPage(PAGE1); |
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1032 |
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|
1033 #if (ANLG_FAM == 1) |
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1034 // This transmission initializes the VRPCCTL1 register. |
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1035 ABB_WriteRegister(VRPCCTRL1, value); |
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1036 |
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1037 #elif (ANLG_FAM == 2) |
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1038 // This transmission initializes the VRPCSIM register. |
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1039 ABB_WriteRegister(VRPCSIM, value); |
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1040 |
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1041 #elif (ANLG_FAM == 3) |
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1042 // This transmission initializes the VRPCSIMR register. |
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1043 ABB_WriteRegister(VRPCSIMR, value); |
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1044 |
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1045 #endif |
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1046 |
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1047 ABB_SetPage(PAGE0); |
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1048 |
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1049 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3)) |
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1050 // release the semaphore only if it has correctly been created. |
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1051 if(&abb_sem != 0) |
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1052 { |
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1053 NU_Release_Semaphore(&abb_sem); |
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1054 } |
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1055 #endif // ABB_SEMAPHORE_PROTECTION |
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1056 |
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1057 // Stop the SPI clock |
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1058 #ifdef SPI_CLK_LOW_POWER |
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1059 SPI_CLK_DISABLE |
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1060 #endif |
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1061 } |
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1062 |
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1063 |
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1064 /*-----------------------------------------------------------------------*/ |
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1065 /* ABB_Write_Uplink_Data() */ |
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1066 /* */ |
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1067 /* This function uses the SPI to write to ABB uplink buffer. */ |
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1068 /* */ |
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1069 /*-----------------------------------------------------------------------*/ |
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1070 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data) |
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1071 { |
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1072 SYS_UWORD8 i; |
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1073 volatile SYS_UWORD16 status; |
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1074 |
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1075 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. |
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1076 SPI_Ready_for_WR |
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1077 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; |
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1078 |
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1079 // Select Page 0 for TOGBR2 |
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1080 ABB_SetPage(PAGE0); |
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1081 |
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1082 // Initialize pointer of burst buffer 1 : IBUFPTR is bit 10 of TOGBR2 |
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1083 ABB_WriteRegister(TOGBR2, 0x10); |
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1084 |
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1085 // Clear, assuming that it works like IBUFPTR of Vega |
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1086 ABB_WriteRegister(TOGBR2, 0x0); |
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1087 |
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1088 // Write the ramp data |
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1089 for (i=0;i<16;i++) |
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1090 ABB_WriteRegister(BULDATA1_2, TM_ul_data[i]>>6); |
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1091 |
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1092 // Stop the SPI clock |
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1093 #ifdef SPI_CLK_LOW_POWER |
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1094 SPI_CLK_DISABLE |
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1095 #endif |
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1096 } |
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1097 |
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1098 //////////////////////// IDEV-INLO integration of sleep mode for Syren /////////////////////////////////////// |
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1099 |
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1100 #if (ANLG_FAM == 3) |
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1101 |
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1102 // Syren Sleep configuration function -------------------------- |
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1103 void Syren_Sleep_Config(SYS_UWORD16 sleep_type,SYS_UWORD16 bg_select, SYS_UWORD16 sleep_delay) |
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1104 { |
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1105 volatile SYS_UWORD16 status,sl_ldo_stat; |
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1106 |
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1107 ABB_SetPage(PAGE1); // Initialize transmit register. This transmission |
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1108 // change the register page in ABB for usp to pg1 |
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1109 |
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1110 ABB_WriteRegister(VRPCCFG, sleep_delay); // write delay value |
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1111 |
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1112 sl_ldo_stat = ((sleep_type<<9|bg_select<<8) & 0x0374); |
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1113 |
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1114 ABB_WriteRegister(VRPCMSKSLP, sl_ldo_stat); // write sleep ldo configuration |
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1115 |
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1116 ABB_SetPage(PAGE0); // Initialize transmit register. This transmission |
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1117 // change the register page in ABB for usp to pg0 |
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1118 } |
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1119 #endif |
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1120 |
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1121 |
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1122 #if (OP_L1_STANDALONE == 0) |
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1123 /*-----------------------------------------------------------------------*/ |
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1124 /* ABB_Power_Off() */ |
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1125 /* */ |
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1126 /* This function uses the SPI to switch off the ABB. */ |
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1127 /* */ |
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1128 /*-----------------------------------------------------------------------*/ |
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1129 void ABB_Power_Off(void) |
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1130 { |
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1131 // Wait until all necessary actions are performed (write in FFS, etc...) to power-off the board (empirical value - 30 ticks). |
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1132 NU_Sleep (30); |
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1133 |
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1134 // Wait also until <ON/OFF> key is released. |
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1135 // This is needed to avoid, if the power key is pressed for a long time, to switch |
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1136 // ON-switch OFF the mobile, until the power key is released. |
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1137 #if((ANLG_FAM == 1) || (ANLG_FAM == 2)) |
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1138 while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) { |
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1139 #elif(ANLG_FAM == 3) |
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1140 while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) { |
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1141 #endif |
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1142 |
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1143 NU_Sleep (1); } |
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1144 |
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1145 BZ_KeyBeep_OFF(); |
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1146 |
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1147 #if(ANLG_FAM == 1) |
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1148 ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE); |
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1149 #elif((ANLG_FAM == 2) || (ANLG_FAM == 3)) |
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1150 ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001); |
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1151 #endif |
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1152 } |
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1153 #endif |
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1154 |
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1155 |
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1156 |