FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/sim32.c @ 700:2913c4fdd34a
top level README: describe the project at a higher level
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Thu, 02 Oct 2014 00:06:50 +0000 |
parents | 1199cdf99c32 |
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rev | line source |
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1 /* |
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2 * SIM32.C |
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3 * |
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4 * Pole Star SIM |
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5 * |
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6 * Target : ARM |
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7 * |
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8 * Copyright (c) Texas Instruments 1995 |
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9 * |
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10 */ |
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11 |
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12 #define SIM32_C 1 |
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13 |
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14 #include "../include/config.h" |
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15 #include "../include/sys_types.h" |
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16 |
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17 #include "iq.h" |
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18 #include "sim.h" |
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19 |
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20 |
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21 #ifdef SIM_DEBUG_TRACE |
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22 /* working buffer for NULL BYTE */ |
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23 extern SYS_UWORD8 SIM_dbg_null[]; |
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24 /* Nucleus variable given the current number of TDMA frames */ |
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25 extern SYS_UWORD32 IQ_FrameCount; |
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26 /* working variable to calculate the TDMA ecart */ |
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27 extern SYS_UWORD16 SIM_dbg_tdma_diff; |
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28 /* working variable storing the current number of TDMA frames elapsed */ |
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29 SYS_UWORD32 SIM_dbg_local_count; |
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30 #endif |
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31 |
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32 /* |
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33 * SIM_IntHandler |
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34 * |
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35 * Read cause of SIM interrupt : |
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36 * |
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37 * if receive buffer full, read char |
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38 * if transmitter empty, change direction, transmit a dummy char |
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39 * |
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40 */ |
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41 void SIM_IntHandler(void) |
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42 { |
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43 volatile unsigned short it, i, stat, conf1; |
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44 volatile SYS_UWORD8 ins; |
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45 volatile SYS_UWORD8 rx; |
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46 volatile SYS_UWORD8 nack; |
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47 volatile SYS_UWORD8 nack1; |
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48 |
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49 |
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50 SIM_PORT *p; |
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51 |
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52 p = &(Sim[0]); |
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53 |
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54 p->rxParityErr = 0; |
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55 it = p->c->it; |
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56 |
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57 if ((it & SIM_IT_ITRX) && !(p->c->maskit & SIM_MASK_RX)) // int on reception |
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58 { |
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59 stat = p->c->rx; |
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60 conf1 = p->conf1; |
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61 |
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62 #ifdef SIM_DEBUG_TRACE |
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63 if ((IQ_FrameCount - SIM_dbg_local_count) > SIM_dbg_tdma_diff) { |
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64 SIM_dbg_tdma_diff = IQ_FrameCount - SIM_dbg_local_count; |
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65 } |
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66 SIM_dbg_local_count = IQ_FrameCount; |
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67 #endif |
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68 |
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69 // Check if reception parity is enable |
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70 if (((conf1 & SIM_CONF1_CHKPAR) && ((stat & SIM_DRX_STATRXPAR) != 0))\ |
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71 || ((conf1 & SIM_CONF1_CHKPAR) == 0)) |
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72 { |
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73 rx = (SYS_UWORD8) (stat & 0x00FF); |
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74 ins = p->xbuf[1] & p->hw_mask; |
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75 nack = (~p->xbuf[1]) & p->hw_mask; |
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76 |
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77 switch (p->moderx) |
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78 { |
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79 case 0: //mode of normal reception without proc char (like PTS proc) |
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80 p->rbuf[p->rx_index++] = rx; |
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81 break; |
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82 |
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83 case 1: //mode wait for ACK |
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84 if ((rx & p->hw_mask) == ins) |
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85 { |
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86 p->moderx = 2; |
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87 } |
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88 else if ((rx & p->hw_mask) == nack) |
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89 { |
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90 p->moderx = 4; |
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91 } |
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92 else if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90)) |
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93 { |
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94 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card |
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95 { |
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96 p->rSW12[p->SWcount++] = rx; |
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97 p->moderx = 5; |
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98 } |
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99 else |
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100 { |
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101 p->null_received = 1; |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
102 #ifdef SIM_DEBUG_TRACE |
5e0e41cd7c9f
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parents:
diff
changeset
|
103 SIM_dbg_null[0]++; |
5e0e41cd7c9f
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parents:
diff
changeset
|
104 #endif |
5e0e41cd7c9f
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parents:
diff
changeset
|
105 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
106 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
107 else |
5e0e41cd7c9f
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parents:
diff
changeset
|
108 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
109 p->errorSIM = SIM_ERR_ABNORMAL_CASE2; |
5e0e41cd7c9f
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parents:
diff
changeset
|
110 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
111 //if rx = 0x60 wait for ACK |
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parents:
diff
changeset
|
112 break; |
5e0e41cd7c9f
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parents:
diff
changeset
|
113 |
5e0e41cd7c9f
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parents:
diff
changeset
|
114 case 2: //mode reception by block |
5e0e41cd7c9f
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parents:
diff
changeset
|
115 p->rbuf[p->rx_index++] = rx; |
5e0e41cd7c9f
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parents:
diff
changeset
|
116 |
5e0e41cd7c9f
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parents:
diff
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|
117 if(p->expected_data == 256) |
5e0e41cd7c9f
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parents:
diff
changeset
|
118 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
119 if (p->rx_index == 0) |
5e0e41cd7c9f
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parents:
diff
changeset
|
120 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
121 p->moderx = 5; |
5e0e41cd7c9f
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parents:
diff
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|
122 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
123 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
124 else |
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parents:
diff
changeset
|
125 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
126 if (p->rx_index == p->expected_data) |
5e0e41cd7c9f
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parents:
diff
changeset
|
127 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
128 p->moderx = 5; |
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parents:
diff
changeset
|
129 } |
5e0e41cd7c9f
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parents:
diff
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|
130 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
131 break; |
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parents:
diff
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|
132 |
5e0e41cd7c9f
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parents:
diff
changeset
|
133 case 3: //mode reception char by char. reception of proc char |
5e0e41cd7c9f
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parents:
diff
changeset
|
134 if ((rx & p->hw_mask) == ins) |
5e0e41cd7c9f
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parents:
diff
changeset
|
135 { |
5e0e41cd7c9f
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parents:
diff
changeset
|
136 p->moderx = 2; |
5e0e41cd7c9f
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parents:
diff
changeset
|
137 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
138 else if ((rx & p->hw_mask) == nack) |
5e0e41cd7c9f
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parents:
diff
changeset
|
139 { |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
140 p->moderx = 4; |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
141 } //if rx = 0x60 wait for ACK |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
142 else if (rx == 0x60) |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
143 { |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
144 p->null_received == 1; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
145 #ifdef SIM_DEBUG_TRACE |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
146 SIM_dbg_null[1]++; |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
147 #endif |
5e0e41cd7c9f
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parents:
diff
changeset
|
148 } |
5e0e41cd7c9f
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parents:
diff
changeset
|
149 |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
150 break; |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
151 |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
152 case 4: //mode reception char by char. reception of data |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
153 p->rbuf[p->rx_index++] = rx; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
154 p->moderx = 3; //switch to receive proc char mode |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
155 |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
156 if(p->expected_data == 256) |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
157 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
158 if (p->rx_index == 0) |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
159 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
160 p->moderx = 5; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
161 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
162 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
163 else |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
164 { |
644
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
165 if (p->rx_index == p->expected_data) |
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
166 { |
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
167 p->moderx = 5; |
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
168 } |
163
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
169 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
170 break; |
644
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
171 |
163
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
172 case 5: //mode wait for procedure character except NULL |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
173 if ((rx != 0x60) || (p->SWcount != 0)) //treat NULL character only if arriving before SW1 SW2 |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
174 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
175 p->rSW12[p->SWcount++] = rx; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
176 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
177 else |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
178 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
179 p->null_received = 1; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
180 #ifdef SIM_DEBUG_TRACE |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
181 SIM_dbg_null[2]++; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
182 #endif |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
183 } |
644
1199cdf99c32
SIM integration: sim32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
163
diff
changeset
|
184 break; |
163
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
185 |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
186 case 6: //give the acknowledge char |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
187 if (((rx & 0xF0) == 0x60) || ((rx & 0xF0) == 0x90)) |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
188 { |
5e0e41cd7c9f
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
189 if (rx != 0x60) //in case of error code (SW1/SW2) returned by sim card |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
190 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
191 p->rSW12[p->SWcount++] = rx; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
192 p->moderx = 5; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
193 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
194 else |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
195 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
196 p->null_received = 1; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
197 #ifdef SIM_DEBUG_TRACE |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
198 SIM_dbg_null[3]++; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
199 #endif |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
200 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
201 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
202 else |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
203 { |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
204 p->ack = rx; |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
205 } |
5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
206 } |
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207 } |
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208 else |
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209 { |
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210 p->rxParityErr = 1; |
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211 } |
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212 } |
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213 |
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214 if ((it & SIM_IT_ITTX) && !(p->c->maskit & SIM_MASK_TX)) |
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215 { |
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216 #ifdef SIM_DEBUG_TRACE |
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217 SIM_dbg_local_count = IQ_FrameCount; |
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218 #endif |
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219 // check the transmit parity |
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220 stat = p->c->stat; |
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221 |
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222 |
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223 if ((stat & SIM_STAT_TXPAR) || ((p->conf1 & SIM_CONF1_CHKPAR) == 0)) //parity disable |
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224 { |
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225 if (p->xOut != (p->xIn - 1)) //if only one char transmitted (already transmitted) |
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226 { //just need to have confirmation of reception |
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227 if (p->xOut == (p->xIn - 2)) |
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228 { |
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229 p->xOut++; |
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230 p->c->tx = *(p->xOut); // transmit |
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231 |
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232 p->conf1 &= ~SIM_CONF1_TXRX; // return the direction |
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233 p->c->conf1 = p->conf1; |
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234 } |
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235 |
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236 if (p->xOut < (p->xIn - 2)) |
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237 { |
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238 p->xOut++; |
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239 p->c->tx = *(p->xOut); // transmit |
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240 } |
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241 } |
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242 } |
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243 else |
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244 { |
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245 p->c->tx = *(p->xOut); // transmit same char |
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246 p->txParityErr++; // count number of transmit parity errors |
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247 } |
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248 |
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249 } |
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250 |
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251 // Handle errors |
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252 if ((it & SIM_IT_ITOV) && !(p->c->maskit & SIM_MASK_OV)) |
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253 { |
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254 p->errorSIM = SIM_ERR_OVF; |
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255 |
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256 } |
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257 if ((it & SIM_IT_WT) && !(p->c->maskit & SIM_MASK_WT)) |
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|
258 { |
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259 p->errorSIM = SIM_ERR_READ; |
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260 } |
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261 |
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262 // Reset the card in case of NATR to let the program continue |
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263 if ((it & SIM_IT_NATR) && !(p->c->maskit & SIM_MASK_NATR)) |
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|
264 { |
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265 p->c->cmd = SIM_CMD_STOP; |
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266 p->errorSIM = SIM_ERR_NATR; |
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|
267 } |
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|
268 |
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269 #if ((CHIPSET == 2) || (CHIPSET == 3)) |
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270 // SIM card insertion / extraction |
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271 if ((it & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD)) |
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272 { |
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273 stat = p->c->stat; |
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274 if ((stat & SIM_STAT_CD) != SIM_STAT_CD) |
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275 { |
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276 (p->RemoveFunc)(); |
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277 p->errorSIM = SIM_ERR_NOCARD; |
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|
278 } |
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279 } |
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280 #endif |
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281 } |
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282 |
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|
283 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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|
284 /* |
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285 * SIM_CD_IntHandler |
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286 * |
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287 * Read cause of SIM interrupt : |
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|
288 * |
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|
289 */ |
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|
290 void SIM_CD_IntHandler(void) |
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291 { |
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|
292 volatile unsigned short it_cd, stat; |
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293 SIM_PORT *p; |
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294 |
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295 p = &(Sim[0]); |
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296 |
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297 p->rxParityErr = 0; |
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298 it_cd = p->c->it_cd; |
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299 |
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300 // SIM card insertion / extraction |
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301 if ((it_cd & SIM_IT_CD) && !(p->c->maskit & SIM_MASK_CD)) |
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302 { |
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303 stat = p->c->stat; |
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304 if ((stat & SIM_STAT_CD) != SIM_STAT_CD) |
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305 { |
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|
306 (p->RemoveFunc)(); |
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307 p->errorSIM = SIM_ERR_NOCARD; |
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308 } |
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309 } |
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310 } |
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311 #endif |
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312 |
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313 |
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gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
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314 // to force this module to be linked |
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315 SYS_UWORD16 SIM_Dummy(void) |
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316 { |
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317 |
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318 } |