freecalypso-sw: gsm-fw/L1/tpudrv/tpudrv12.c annotate

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 926:3f178b3ac50a

gsm-fw: preparations for building with L1_DYN_DSP_DWNLD enabled

author	Mychaela Falconia <falcon@ivan.Harhan.ORG>
date	Thu, 22 Oct 2015 18:41:05 +0000
parents	a714522c925b
children	5a826938d005

rev	line source
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 * tpudrv12.c (TPU driver for RF type 12) is a required part of the L1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 * code for TI GSM chipset solutions consisting of Calypso or other
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 * classic (non-LoCosto) DBB, one of the classic ABB chips such as Iota
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 * or Syren, and Rita RF transceiver; the number 12 refers to the latter.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 * We, the FreeCalypso team, have not been able to find an original
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 * source for this C module: the LoCosto source has tpudrv61.c instead,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 * supporting LoCosto RF instead of Rita, whereas the TSM30 source
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10 * only supports non-TI RF transceivers. Our only available reference
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11 * for what this tpudrv12.c module is supposed to contain is the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14 * The present reconstruction has been made by copying tpudrv61.c and
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 * tweaking it to match the disassembly of the reference binary object
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16 * named above.
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	17 *
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	18 * The ugly hacks to support Pirelli DP-L10 in addition to classic
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	19 * TI/Openmoko target devices are original to FreeCalypso.
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	20 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	22 #define TPUDRV12_C
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24 #include "config.h"
584 d42078e35ac9 tpudrv12.c compiles! Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 583 diff changeset	25 #include "sys_types.h"
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26 #include "l1_confg.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 #include "l1_macro.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 #include "l1_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 #include "l1_types.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 #if TESTMODE
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 #include "l1tm_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34 #if (AUDIO_TASK == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 #include "l1audio_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 #include "l1audio_cust.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 #include "l1audio_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 #if (L1_GTT == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 #include "l1gtt_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 #include "l1gtt_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 #if (L1_MP3 == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 #include "l1mp3_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46 #if (L1_MIDI == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 #include "l1midi_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 #if (L1_AAC == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 #include "l1aac_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 #include "l1_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 #include "l1_time.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56 #include "l1_ctl.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57 #include "tpudrv.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58 #include "tpudrv12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 #include "l1_rf12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61 #include "../../bsp/mem.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62 #include "../../bsp/armio.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 #include "../../bsp/clkm.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 // Global variables
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66 extern T_L1_CONFIG l1_config;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 extern UWORD16 AGC_TABLE[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 extern UWORD16 *TP_Ptr;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69 #if (L1_FF_MULTIBAND == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70 extern const WORD8 rf_subband2band[RF_NB_SUBBANDS];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73 static WORD8 rf_index; // index into rf_path[]
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74 static UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	75 static UWORD8 rfband; /* ditto */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	76
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	77 // Internal function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	78 void l1dmacro_rx_down (WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	80 #if (L1_FF_MULTIBAND == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	81 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	82 WORD32 rf_init(WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	84 // External function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85 UWORD8 Cust_is_band_high(UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	86 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89 extern T_RF_BAND rf_band[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	90 extern T_RF rf;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	94 /* DEFINITION OF MACROS FOR CHIPS SERIAL PROGRAMMATION */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	95 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	98 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	99 /* Is arfcn in the DCS band (512-885) ? */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	100 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101 #define IS_HIGH_BAND(arfcn) (((arfcn >= 512) && (arfcn <= 885)) ? 1 : 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104 /* Send a value to Rita RF */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 #define TSP_TO_RF(rf_data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	110 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF \| 0x0F); \
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	111 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); \
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	112 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	113
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 /* Send a TSP command to ABB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	116 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 #define TSP_TO_ABB(data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	120 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_ABB \| 0x06); \
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	121 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); \
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	123
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	124 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	125 /* Trace arfcn for conversion debug */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	126 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	127 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	128 // ----Debug information : record all arfcn programmed into synthesizer!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	129 #define MAX_ARFCN_TRACE 4096 // enough for 5 sessions of 124+374
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	130 SYS_UWORD16 arfcn_trace[MAX_ARFCN_TRACE];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	131 static UWORD32 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	132
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	133 void trace_arfcn(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	134 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	135 arfcn_trace[arfcn_trace_index++] = arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 // Wrap to beginning
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	138 if (arfcn_trace_index == MAX_ARFCN_TRACE)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	142
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	143
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	146 /* DEFINITION OF HARWARE DEPENDANT CONSTANTS */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	148 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	150 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	151 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	152 /* INTERNAL FUNCTIONS OF TPUDRV14.C */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	153 /* EFFECTIVE DOWNLOADING THROUGH TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	154 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	155 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	156 // rx & tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	157 typedef struct tx_rx_s
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	158 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	159 UWORD16 farfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	160 WORD8 ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	161 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	162 T_TX_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	163
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	164 struct synth_s {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	165 // common
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	166 UWORD16 arfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	167 UWORD16 limit;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	168 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	169 T_TX_RX tx_rx[2];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	170 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	171
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	172 #if CONFIG_TARGET_PIRELLI
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	173 typedef UWORD16 T_RXTX_UPDOWN;
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	174 #else
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	175 typedef UWORD8 T_RXTX_UPDOWN;
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	176 #endif
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	177
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	178 struct rf_path_s {
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	179 T_RXTX_UPDOWN rx_up;
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	180 T_RXTX_UPDOWN rx_down;
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	181 T_RXTX_UPDOWN tx_up;
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	182 T_RXTX_UPDOWN tx_down;
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	183 struct synth_s *synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	184 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	185
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	186 const struct synth_s synth_900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	187 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	188 { 0, 124, BAND_SELECT_GSM, {{ 890, 1}, { 935, 2}}},// gsm 0 - 124
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	189 {974, 1023, BAND_SELECT_GSM, {{ 880, 1}, { 925, 2}}},// egsm 975 - 1023
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	190 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	191
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	192 const struct synth_s synth_1800[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	193 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	194 {511, 885, BAND_SELECT_DCS, {{1710, 1}, {1805, 1}}}, // dcs 512 - 885
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	195 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	196
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	197 const struct synth_s synth_1900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	198 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	199 {511, 810, BAND_SELECT_PCS, {{1850, 1}, {1930, 1}}}, // pcs 512 - 810;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	200 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	201
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	202 const struct synth_s synth_850[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	203 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	204 {127, 192, BAND_SELECT_850_LO, {{ 824, 2}, { 869, 2}}}, // gsm850 low
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	205 {127, 251, BAND_SELECT_850_HI, {{ 824, 1}, { 869, 2}}}, // gsm850 high
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	206 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	207
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	208 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	209 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	210 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	211 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	212 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	213 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //GSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	214 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	215
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	216 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	217 * Leonardo tpudrv12.obj contains a function named calc_a_b(); there is
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	218 * no such function in the LoCosto version, but there is a similar-looking
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	219 * calc_rf_freq() function instead. Let's try making our calc_a_b()
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	220 * from LoCosto's calc_rf_freq().
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	221 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	222
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	223 UWORD32 calc_a_b(UWORD16 arfcn, UWORD8 downlink)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	224 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	225 UWORD32 farfcn; /* in 200 kHz units */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	226 UWORD32 n; /* B * P + A */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	227 struct synth_s *s;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	228
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	229 s = rf_path[rf_index].synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	230 while(s->limit < arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	231 s++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	232
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	233 rf_chip_band = s->rf_chip_band;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	234
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	235 // Convert the ARFCN to the channel frequency (times 5 to avoid the decimal value)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	236 farfcn = 5*s->tx_rx[downlink].farfcn0 + (arfcn - s->arfcn0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	237 n = farfcn * s->tx_rx[downlink].ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	238
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	239 /* magic A & B encoding for Rita */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	240 return((n - 4096) << 3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	241 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	242
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	243 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	244 /* Convert_l1_radio_freq */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	245 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	246 /* conversion of l1 radio_freq to */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	247 /* real channel number */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	248 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	249 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	250 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	251 switch(l1_config.std.id)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	252 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	253 case GSM:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	254 case DCS1800:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	255 case PCS1900:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	256 case GSM850:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	257 return (radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	258 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	259
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	260 case DUAL:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	261 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	262 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	263 // GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	264 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	265 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	266 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	267 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	268 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	269 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	270
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	271 case DUALEXT:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	272 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	273 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	274 // E-GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	275 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	276 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	277 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	278 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	279 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	280 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	281 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	282 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	283 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	284 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	285 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	286 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	287 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	288 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	289 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	290 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	291 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	292 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	293
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	294 case GSM_E:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	295 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	296 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	297 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	298 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	299 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	300 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	301 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	302 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	303 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	304 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	305 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	306 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	307 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	308
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	309 case DUAL_US:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	310 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	311 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	312 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	313 return(radio_freq - l1_config.std.first_radio_freq + 128);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	314 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	315 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	316 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	317 // PCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	318 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	319 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	320 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	321 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	322
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	323 default: // should never occur.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	324 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	325 } // end of switch
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	326 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	327
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	328 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	329 /* rf_init */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	330 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	331 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	332 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	333 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	334 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	335 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	336 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	337 WORD32 rf_init(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	338 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	339 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	340 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	341 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	342 *TP_Ptr++ = TPU_AT(t);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	343 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_OFF);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	344 t += 8;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	345 *TP_Ptr++ = TPU_AT(t);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	346 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	347 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	348 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	349 TSP_TO_RF(0x0012);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	350 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	351 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	352 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	353 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	354 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	355 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	356 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	357 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	358 t += 117;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	359 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	360 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	361 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	362 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	363 TSP_TO_RF(0x02FE);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	364 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	365 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	366 TSP_TO_RF(0x401F);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	367 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	368 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	369 TSP_TO_RF(0x043D);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	370 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	371 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	372 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	373
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	374 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	375 /* rf_init_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	376 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	377 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	378 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	379 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	380 WORD32 rf_init_light(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	381 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	382 // initialization for change of multi-band configuration dependent on STD
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	383 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	384 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	385
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	386 UWORD8 arfcn_to_rf_index(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	387 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	388 UWORD8 index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	389 extern const T_STD_CONFIG std_config[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	390 index = std_config[l1_config.std.id].band[0];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	391
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	392 if ((std_config[l1_config.std.id].band[1] != BAND_NONE) && IS_HIGH_BAND(arfcn))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	393 index = std_config[l1_config.std.id].band[1];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	394
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	395 return (index - 1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	396 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	397
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	398 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	399 /* rf_program */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	400 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	401 /* Programs the RF synthesizer */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	402 /* called each frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	403 /* downloads NA counter value */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	404 /* t = start time in the current frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	405 /------------------------------------------/ //change 2 UWORD8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	406 UWORD32 rf_program(UWORD32 t, SYS_UWORD16 radio_freq, UWORD32 rx)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	407 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	408 UWORD32 rfdiv;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	409 SYS_UWORD16 arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	410
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	411 rfband = Cust_is_band_high(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	412
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	413 arfcn = Convert_l1_radio_freq(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	414 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	415 trace_arfcn(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	416 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	417 rf_index = arfcn_to_rf_index(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	418
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	419 rfdiv = calc_a_b(arfcn, rx);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	420
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	421 if (rx != 1) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	422 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	423 *TP_Ptr++ = TPU_FAT(0x1274);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	424 TSP_TO_RF(0x043A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	425 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	426 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	427 *TP_Ptr++ = TPU_FAT(0x12FD);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	428 TSP_TO_RF(0x023A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	429 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	430
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	431 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	432 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	433
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	434 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	435 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	436 /* EXTERNAL FUNCTIONS CALLED BY LAYER1 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	437 /* COMMON TO L1 and TOOLKIT */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	438 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	439 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	440
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	441 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	442 /* agc */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	443 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	444 /* Program a gain into IF amp */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	445 /* agc_value : gain in dB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	446 /* */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	447 /* additional parameter for LNA setting */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	448 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	449 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	450 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	451 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	452
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	453 void l1dmacro_agc(SYS_UWORD16 radio_freq, WORD8 gain, UWORD8 lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	454 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	455 int agc_table_index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	456 UWORD16 rf_data;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	457
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	458 agc_table_index = gain - 2;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	459 if (agc_table_index < 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	460 agc_table_index++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	461 agc_table_index >>= 1;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	462 if (gain >= 42)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	463 agc_table_index = 19;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	464 if (gain < 16)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	465 agc_table_index = 6;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	466 *TP_Ptr++ = TPU_FAT(0x1334);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	467 rf_data = REG_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	468 if (!lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	469 rf_data \|= RF_GAIN;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	470 rf_data \|= AGC_TABLE[agc_table_index] << 11;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	471 rf_data \|= RX_CAL_MODE;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	472 TSP_TO_RF(rf_data);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	473 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	474
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	475 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	476 /* l1dmacro_rx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	477 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	478 /* programs RF synth for recceive */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	479 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	480 void l1dmacro_rx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	481 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	482 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	483
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	484 // Important: always use rx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	485 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	486 t = l1_config.params.rx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	487 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	488
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	489 t = rf_program(t, radio_freq, 1); // direction is set to 1 for Rx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	490 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	491
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	492 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	493 /* l1dmacro_tx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	494 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	495 /* programs RF synth for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	496 /* programs OPLL for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	497 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	498 void l1dmacro_tx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	499 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	500 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	501
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	502 // Important: always use tx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	503 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	504 t = l1_config.params.tx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	505 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	506
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	507 t = rf_program(t, radio_freq, 0); // direction set to 0 for Tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	508 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	509
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	510 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	511 /* l1dmacro_rx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	512 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	513 /* Open window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	514 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	515 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	516 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	517 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	518 void l1dmacro_rx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	519 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	520 *TP_Ptr++ = TPU_FAT(0x1377);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	521 TSP_TO_RF(0x0A3A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	522 *TP_Ptr++ = TPU_FAT(0x137E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	523 TSP_TO_ABB(0x10);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	524 *TP_Ptr++ = TPU_FAT(0x1383);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	525 TSP_TO_ABB(0x18);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	526 *TP_Ptr++ = TPU_FAT(58);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	527 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up \| RF_SER_ON);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	528 *TP_Ptr++ = TPU_FAT(62);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	529 TSP_TO_ABB(0x14);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	530 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	531
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	532 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	533 /* l1pdmacro_rx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	534 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	535 /* Close window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	536 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	537 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	538 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	539 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	540 void l1dmacro_rx_down (WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	541 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	542 *TP_Ptr++ = TPU_FAT(t - 37);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	543 TSP_TO_RF(0x003A);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	544 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| RF_SER_ON);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	545 *TP_Ptr++ = TPU_FAT(t - 4);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	546 TSP_TO_ABB(0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	547 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	548
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	549 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	550 /* l1dmacro_tx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	551 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	552 /* Open transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	553 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	554 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	555 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	556 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	557 void l1dmacro_tx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	558 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	559 if (l1_config.std.id == DCS1800 \|\|
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	560 rfband == MULTI_BAND2 &&
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	561 (l1_config.std.id == DUAL \|\| l1_config.std.id == DUALEXT)) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	562 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	563 TSP_TO_RF(0x0007);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	564 *TP_Ptr++ = TPU_FAT(0x1288);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	565 TSP_TO_RF(0xC00B);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	566 *TP_Ptr++ = TPU_FAT(0x1292);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	567 TSP_TO_RF(0x3077);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	568 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	569 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	570 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	571 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	572 *TP_Ptr++ = TPU_FAT(0x12C6);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	573 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	574 *TP_Ptr++ = TPU_FAT(0x12E3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	575 TSP_TO_RF(0x243A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	576 *TP_Ptr++ = TPU_FAT(0x1302);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	577 TSP_TO_ABB(0xC0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	578 *TP_Ptr++ = TPU_FAT(0x1352);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	579 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	580 *TP_Ptr++ = TPU_FAT(0x1384);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	581 TSP_TO_ABB(0xA0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	582 *TP_Ptr++ = TPU_FAT(16);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	583 #if CONFIG_TARGET_PIRELLI
894 a714522c925b Pirelli RFFE control: PA band select wasn't being driven properly Space Falcon <falcon@ivan.Harhan.ORG> parents: 887 diff changeset	584 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up & 0xFF
a714522c925b Pirelli RFFE control: PA band select wasn't being driven properly Space Falcon <falcon@ivan.Harhan.ORG> parents: 887 diff changeset	585 \| RF_SER_ON);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	586 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, rf_path[rf_index].tx_up >> 8);
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	587 *TP_Ptr++ = TPU_FAT(21);
894 a714522c925b Pirelli RFFE control: PA band select wasn't being driven properly Space Falcon <falcon@ivan.Harhan.ORG> parents: 887 diff changeset	588 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up & 0xFF
a714522c925b Pirelli RFFE control: PA band select wasn't being driven properly Space Falcon <falcon@ivan.Harhan.ORG> parents: 887 diff changeset	589 \| PA_ENABLE \| RF_SER_ON);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	590 #else
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	591 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up \| RF_SER_ON);
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	592 *TP_Ptr++ = TPU_FAT(21);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	593 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	594 #endif
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	595 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	596
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	597 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	598 /* l1dmacro_tx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	599 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	600 /* Close transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	601 /-------------------------------------------/
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	602 /* Rita version differs from LoCosto, */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	603 /* reconstructing from disassembly. */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	604 /-------------------------------------------/
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	605 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	606 {
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	607 if (adc_active == ACTIVE)
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	608 l1dmacro_adc_read_tx(t - 44);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	609 *TP_Ptr++ = TPU_FAT(t - 4);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	610 TSP_TO_ABB(0x80);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	611 *TP_Ptr++ = TPU_FAT(t + 22);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	612 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	613 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down \| RF_SER_ON);
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	614 *TP_Ptr++ = TPU_FAT(t + 25);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	615 TSP_TO_RF(0x003A);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	616 *TP_Ptr++ = TPU_FAT(t + 31);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	617 TSP_TO_ABB(0x00);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	618 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	619
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	620 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	621 * l1dmacro_rx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	622 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	623 * Receive Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	624 */
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	625 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	626 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	627 l1dmacro_rx_up();
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	628 l1dmacro_rx_down(STOP_RX_SNB);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	629 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	630
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	631 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	632 * l1dmacro_rx_sb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	633 * Receive Synchro burst
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	634 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	635 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	636 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	637 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	638 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	639 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	640
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	641 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	642 * l1dmacro_rx_ms
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	643 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	644 * Receive Power Measurement window
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	645 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	646 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	647 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	648 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	649 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	650 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	651
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	652 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	653 * l1dmacro_rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	654 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	655 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	656 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	657 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	658 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	659 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	660
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	661 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	662 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	663 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	664 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	665 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	666 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	667 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	668 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	669 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	670 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	671 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	672
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	673 l1dmacro_rx_down (STOP_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	674 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	675
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	676 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	677 * l1dmacro_rx_fb26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	678 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	679 * Receive Frequency burst for TCH.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	680 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	681 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	682 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	683 l1dmacro_rx_up();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	684
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	685 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	686
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	687 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	688 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	689
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	690 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	691 * l1dmacro_tx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	692 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	693 * Transmit Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	694 */
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	695 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	696 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	697 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	698 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	699 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	700
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	701 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	702 * l1dmacro_tx_ra
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	703 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	704 * Transmit Random Access burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	705 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	706 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	707 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	708 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	709 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	710 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	711
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	712 #if TESTMODE
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	713 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	714 * l1dmacro_rx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	715 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	716 * Receive continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	717 */
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	718 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	719 {
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	720 l1dmacro_rx_up ();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	721 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	722
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	723 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	724 * l1dmacro_tx_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	725 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	726 * Transmit continuously
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	727 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	728 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	729 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	730 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	731 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	732
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	733 /*
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	734 * l1d_macro_stop_cont
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	735 *
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	736 * Stop continuous Tx or Rx
bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	737 */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	738 void l1dmacro_stop_cont (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	739 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	740 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	741 l1dmacro_rx_down(STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	742 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	743 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	744 }
581 bbb1e73782e6 tpudrv12.c: functions for different kinds of bursts Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 580 diff changeset	745 #endif /* TESTMODE */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	746
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	747
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	748 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	749 /* l1dmacro_reset_hw */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	750 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	751 /* Reset and set OFFSET register */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	752 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	753
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	754 void l1dmacro_reset_hw(UWORD32 servingCellOffset)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	755 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	756 TPU_Reset(1); // reset TPU only, no TSP reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	757 TPU_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	758 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	759
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	760 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	761 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON \| FEM_OFF);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	762
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	763 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	764 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	765
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	766 // l1dmacro_RF_sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	767 // Program RF for BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	768
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	769
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	770 /* Rita version differs from LoCosto, reconstructing from disassembly */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	771 void l1dmacro_RF_sleep (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	772 {
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	773 TSP_TO_RF(0x0002);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	774 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	775 *TP_Ptr++ = TPU_WAIT(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	776 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	777 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	778 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF \| 0x01);
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	779 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	780 *TP_Ptr++ = TPU_WAIT(100);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	781 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	782 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	783 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	784 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	785 /*
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	786 * The following call does not appear in tpudrv12.obj, and
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	787 * there is no TPU_wait_idle() function in Leonardo tpudrv.obj
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	788 * either. But this wait operation makes sense to me, so
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	789 * I'm keeping it as-is from the LoCosto version for now.
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	790 * -- Space Falcon
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	791 */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	792 TPU_wait_idle();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	793 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	794
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	795 // l1dmacro_RF_wakeup
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	796 //* wakeup RF from BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	797
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	798 /* Rita version differs from LoCosto, reconstructing from disassembly */
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	799 void l1dmacro_RF_wakeup (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	800 {
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	801 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	802 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	803 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	804 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF \| 0x01);
7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	805 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	806 *TP_Ptr++ = TPU_WAIT(100);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	807 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| RF_SER_ON);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	808 *TP_Ptr++ = TPU_WAIT(1);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	809 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| RF_SER_OFF);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	810 *TP_Ptr++ = TPU_WAIT(8);
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	811 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| RF_SER_ON);
582 81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	812 *TP_Ptr++ = TPU_WAIT(5);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	813 TSP_TO_RF(0x0012);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	814 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	815 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	816 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	817 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	818 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	819 *TP_Ptr++ = TPU_FAT(0);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	820 TSP_TO_RF(0x003A);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	821 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	822 TSP_TO_RF(0xC003);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	823 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	824 TSP_TO_RF(0x02FE);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	825 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	826 TSP_TO_RF(0x401F);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	827 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	828 TSP_TO_RF(0x043D);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	829 *TP_Ptr++ = TPU_WAIT(7);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	830 *TP_Ptr++ = TPU_WAIT(117);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	831 /* code from tpudrv61.c follows, same for Rita and LoCosto */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	832 *TP_Ptr++ = TPU_SLEEP;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	833 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	834 TP_Enable(1);
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	835 /* same issue as in the previous function */
81753f5e902e tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 581 diff changeset	836 TPU_wait_idle();
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	837 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	838
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	839
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	840 // l1dmacro_init_hw
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	841 // Reset VEGA, then remove reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	842 // Init RF/IF synthesizers
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	843
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	844 void l1dmacro_init_hw(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	845 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	846 WORD32 t = 100; // start time for actions
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	847
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	848 TP_Reset(1); // reset TPU and TSP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	849
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	850 // GSM 1.5 : TPU clock enable is in TPU
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	851 //---------------------------------------
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	852 TPU_ClkEnable(1); // TPU CLOCK ON
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	853
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	854 TP_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	855
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	856
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	857 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	858
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	859 // Set FEM to inactive state before turning ON the RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	860 // At this point the RF regulators are still OFF. Thus the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	861 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
887 7f305eb3c530 gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Space Falcon <falcon@ivan.Harhan.ORG> parents: 584 diff changeset	862 *TP_Ptr++ = TPU_MOVE(TSP_ACT, FEM_SLEEP \| RF_SER_ON);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	863
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	864 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	865 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	866
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	867 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	868 *TP_Ptr++ = TPU_SYNC(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	869
583 ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	870 /* from disassembly, differs from LoCosto version */
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	871 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x20);
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	872 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
ff1065828669 tpudrv12.c: l1dmacro_init_hw() done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 582 diff changeset	873 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET3, 0x00);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	874
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	875 t = 1000; // arbitrary start time
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	876
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	877 t = rf_init(t); // Initialize RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	878
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	879 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	880
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	881 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	882 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	883
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	884 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	885 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	886
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	887 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	888 /* l1dmacro_init_hw_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	889 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	890 /* Reset VEGA, then remove reset */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	891 /* Init RF/IF synthesizers */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	892 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	893 void l1dmacro_init_hw_light(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	894 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	895 UWORD32 t = 100; // start time for actions //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	896 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	897 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	898 t = 1000; // arbitrary start time //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	899
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	900 t = rf_init_light(t); // Initialize RF Board //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	901
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	902 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	903 l1dmacro_idle(); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	904
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	905 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	906 }

FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 926:3f178b3ac50a