FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/dyn_dwl_cfile/Makefile @ 1025:4c80a6e6723f
gsm-fw: added provisional support for FCDEV3B target ahead of the hardware
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Tue, 03 May 2016 23:46:54 +0000 |
parents | 48969469d961 |
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rev | line source |
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48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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1 CC= arm-elf-gcc |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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changeset
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2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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3 -I../dyn_dwl_include -I../tm_include -I../tm_cust0 -I../cust0 \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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4 -I../tpudrv -DMOVE_IN_INTERNAL_RAM |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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changeset
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5 CFLAGS= -O2 -fno-builtin -mthumb-interwork |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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changeset
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6 LD= arm-elf-ld |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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7 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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8 XOBJS= l1_dyn_dwl_afunc.o l1_dyn_dwl_apihisr.o l1_dyn_dwl_async.o \ |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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9 l1_dyn_dwl_func.o l1_dyn_dwl_init.o l1_dyn_dwl_sync.o |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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10 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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11 all: xipcode.o |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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12 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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13 ${XOBJS}: %.o : %.c |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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14 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $< |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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15 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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16 xipcode.o: ${XOBJS} |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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changeset
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17 ${LD} -r -o $@ ${XOBJS} |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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18 |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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19 clean: |
48969469d961
gsm-fw: l1_dyn_dwl code compiles and links
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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20 rm -f *.[oa] *.out *errs |