FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/bsp/sim.h @ 761:55a84763c417

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
sms_pei.c compiles
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 11 Oct 2014 23:00:04 +0000
parents afceeeb2cba1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * SIM.H
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 * Pole Star SIM
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 * Target : ARM
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 * Copyright (c) Texas Instruments 1995-1997
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9 *
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13 * Device addresses - GCS000 (Gemini / Polestar)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 * HER207 (Hercules)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17 #include "../include/config.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 #include "../include/sys_types.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19 #include "../nucleus/nucleus.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21 /* Flags activation section */
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
22 // #define SIM_RETRY /* by default : NOT ACTIVE */
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
23 //#define SIM_DEBUG_TRACE /* by default : NOT ACTIVE */
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
24 //#define SIM_UWORD16_MASK 0x00ff //when using SIM entity not maped to length on 16 bits
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
25 #define SIM_UWORD16_MASK 0xffff //when using SIM entity maped to length on 16 bits
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
26 //#define SIM_APDU_TEST
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
27 //#define SIM_SAT_REFRESH_TEST
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 #define SIM_CMD (MEM_SIM + 0x00)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30 #define SIM_STAT (MEM_SIM + 0x02)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31 #define SIM_CONF1 (MEM_SIM + 0x04)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32 #define SIM_CONF2 (MEM_SIM + 0x06)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33 #define SIM_IT (MEM_SIM + 0x08)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34 #define SIM_DRX (MEM_SIM + 0x0A)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 #define SIM_DTX (MEM_SIM + 0x0C)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 #define SIM_MASK (MEM_SIM + 0x0E)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41 * Bit definitions
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 // control regidter
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44 #define SIM_CMD_CRST 0x0001
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 #define SIM_CMD_SWRST 0x0002
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 #define SIM_CMD_STOP 0x0004
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47 #define SIM_CMD_START 0x0008
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48 #define SIM_CMD_CLKEN 0x0010
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 // status register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 #define SIM_STAT_CD 0x0001 // card present
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #define SIM_STAT_TXPAR 0x0002 // transmit parity status
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53 #define SIM_STAT_FFULL 0x0004 // fifo full
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 #define SIM_STAT_FEMPTY 0x0008 // fifo empty
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 // configuration register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57 #define SIM_CONF1_CHKPAR 0x0001 // enable receipt check parity
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58 #define SIM_CONF1_CONV 0x0002 // coding convention
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 #define SIM_CONF1_TXRX 0x0004 // SIO line direction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
60 #define SIM_CONF1_SCLKEN 0x0008 // enable SIM clock
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
61 #define SIM_CONF1_RSVD 0x0010 // reserved
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
62 #define SIM_CONF1_SCLKDIV 0x0020 // SIM clock frquency
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
63 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
64 #define SIM_CONF1_ETU 0x0080 // ETU period
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
65 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
66 #define SIM_CONF1_SVCCLEV 0x0200
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
67 #define SIM_CONF1_SRSTLEV 0x0400
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
68 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
69
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
70 // interrupt status register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
71 #define SIM_IT_NATR 0x0001 // No answer to reset
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
72 #define SIM_IT_WT 0x0002
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
73 #define SIM_IT_ITOV 0x0004
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
74 #define SIM_IT_ITTX 0x0008 // Transmit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
75 #define SIM_IT_ITRX 0x0010 // Receipt
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
76
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
77 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
78 #define SIM_IT_CD 0x0001 // Card insertion/extraction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
79 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
80 #define SIM_IT_CD 0x0020 // Card insertion/extraction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
81 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
82
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
83 // interrupt mask register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
84 #define SIM_MASK_NATR 0x0001 // No answer to reset
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
85 #define SIM_MASK_WT 0x0002
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
86 #define SIM_MASK_OV 0x0004
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
87 #define SIM_MASK_TX 0x0008 // Transmit
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
88 #define SIM_MASK_RX 0x0010 // Receipt
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
89 #define SIM_MASK_CD 0x0020 // Card insertion/extraction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
90
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
91 // receveid byte register
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
92 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
94 // SIM return code OK
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
95 #define SIM_OK 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
96
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
97 // SIM return error codes
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
98 #define SIM_ERR_NOCARD 1
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
99 #define SIM_ERR_NOINT 2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
100 #define SIM_ERR_NATR 3
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
101 #define SIM_ERR_READ 4
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
102 #define SIM_ERR_XMIT 5
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
103 #define SIM_ERR_OVF 6
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
104 #define SIM_ERR_LEN 7
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
105 #define SIM_ERR_CARDREJECT 8
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
106 #define SIM_ERR_WAIT 9
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
107 #define SIM_ERR_ABNORMAL_CASE1 10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
108 #define SIM_ERR_ABNORMAL_CASE2 11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
109 #define SIM_ERR_BUFF_OVERFL 12
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
110
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
111 // begin of JYT modifications
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
112 #define SIM_ERR_HARDWARE_FAIL 13
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
113 // end of JYT modifications
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
114 #define SIM_ERR_RETRY_FAILURE 14
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 #define SIM_SLEEP_NONE 0 // No SIM available
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117 #define SIM_SLEEP_DESACT 1 // The Driver is NOT currently in sleep mode (clock is off)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 #define SIM_SLEEP_ACT 2 // The Driver is currently in sleep mode (clock is on)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 #define SIM_SLEEP_NOT_ALLOWED 3 // The Driver cannot stop the clock :
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 // The card don't want or the interface is not able
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121 // to do it.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122 #define SIM_SLEEP_WAITING_TIME 500 //represent 2.3s of period before entering in sleep mode
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #define SIM_CLK_STOP_MASK 0x0D // Clock Stop mask defined by ETSI 11.11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 #define SIM_CLK_STOP_NOT_ALLWD 0x00 // see ETSI 11.11 : Clock Stop never allowed
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 #define SIM_CLK_STOP_ALLWD 0x01 // see ETSI 11.11 : No prefered level
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 #define SIM_CLK_STOP_HIGH 0x04 // see ETSI 11.11 : High level only
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #define SIM_CLK_STOP_LOW 0x08 // see ETSI 11.11 : Low level only
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 #if(ANALOG == 1)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 //OMEGA specific definitions
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 #define MODE5V_OMEGA 0x06 // used in SIM_SwitchVolt
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 #define MODE_INIT_OMEGA_3V 0x05 // used in SIM_StartVolt
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 #define MODE_INIT_OMEGA_5V 0x07 // unused !!!!
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 #define MODE3V_OMEGA 0x01 // unused !!!!
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136 #define MODE_DIS_SIMLDOEN 0xDF // used in SIM_PowerOff
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 #define MODE_DIS_SIMEN 0xFD // used in SIM_PowerOff
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 #define MODE_ENA_SIMLDOEN 0x20 // used in SIM_ManualStart
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #define MODE_ENA_SIMEN 0x02 // used in SIM_ManualStart
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 #elif(ANALOG == 2)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 //IOTA specific definitions
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 #define MODE1_8V_IOTA 0x00
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 #define MODE_INIT_IOTA_3V 0x03
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 #define MODE_INIT_IOTA_1_8V 0x02
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145 #define MODE3V_IOTA 0x01
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 #define MODE_DIS_SIMLDOEN 0xFC // SIMSEL + Regulator RSIMEN
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 #define MODE_DIS_SIMEN 0xF7
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 #define MODE_ENA_SIMEN 0x08
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 #elif(ANALOG == 3)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151 //SYREN specific definitions
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 #define MODE1_8V_SYREN 0x00
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 #define MODE_INIT_SYREN_3V 0x03
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 #define MODE_INIT_SYREN_1_8V 0x02
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 #define MODE3V_SYREN 0x01
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 #define MODE_DIS_SIMLDOEN 0x1FC // SIMSEL + Regulator RSIMEN
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 #define MODE_DIS_SIMEN 0x1F7
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 #define MODE_ENA_SIMEN 0x08
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 // define type of interface if not defined
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 // 5V only ME SIM_TYPE = 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 // 3V technology ME SIM_TYPE = 1
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 // 3V only ME SIM_TYPE = 2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 // 1.8V technology ME SIM_TYPE = 3 // JYT, 29/01/02, from new specs IOTA
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 // 1.8V Only ME SIM_TYPE = 4 // JYT, 29/01/02, from new specs IOTA
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 #define SIM_TYPE_5V 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170 #define SIM_TYPE_3_5V 1
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 #define SIM_TYPE_3V 2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 #define SIM_TYPE_1_8_3V 3
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 #define SIM_TYPE_1_8V 4
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 //default configuration
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 #ifndef SIM_TYPE
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 #if((ANALOG == 2) || (ANALOG == 3))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 // Until now (20/03/2003), it is impossible to test IOTA or SYREN with 1.8V Sim Card,
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 // so SIM drv is configured in 3V only with IOTA.and SYREN
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 // When 1.8V Sim Card will be delivered and tested on IOTA and SYREN, then Sim driver will pass
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 // to : #define SIM_TYPE SIM_TYPE_1_8_3V
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
182 #define SIM_TYPE SIM_TYPE_1_8_3V // MODIFY BY JENNIFER SIM_TYPE_3V
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 #define SIM_TYPE SIM_TYPE_3_5V
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 // begin of modifications of JYT
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 #if((ANALOG == 2) || (ANALOG == 3))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 #define SIM_MASK_INFO_VOLT 0x70
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 #define SIM_MASK_INFO_VOLT 0x10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 #define SIM_1_8V 0x30
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 #define SIM_3V 0x10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 #define SIM_5V 0x00
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200 // end of modifications of JYT
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 // Max size of Answer to Reset (GSM11.11 5.7.1)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 #define MAX_ATR_SIZE 33
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205 // GSM Instruction Class (GSM 11.11 SIM spec)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 #define GSM_CLASS 0xA0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 // SIM Instruction Codes
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 #define SIM_SELECT 0xA4
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 #define SIM_STATUS 0xF2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211 #define SIM_READ_BINARY 0xB0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 #define SIM_UPDATE_BINARY 0xD6
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 #define SIM_READ_RECORD 0xB2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 #define SIM_UPDATE_RECORD 0xDC
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 #define SIM_SEEK 0xA2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 #define SIM_INCREASE 0x32
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 #define SIM_VERIFY_CHV 0x20
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 #define SIM_CHANGE_CHV 0x24
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 #define SIM_DISABLE_CHV 0x26
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 #define SIM_ENABLE_CHV 0x28
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221 #define SIM_UNBLOCK_CHV 0x2C
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222 #define SIM_INVALIDATE 0x04
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 #define SIM_REHABILITATE 0x44
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224 #define SIM_RUN_GSM_ALGO 0x88
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 #define SIM_GET_RESPONSE 0xC0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226 #define SIM_TERMINAL_PROFILE 0x10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 #define SIM_FETCH 0x12
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228 #define SIM_TERMINAL_RESPONSE 0x14
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229 #define SIM_ENVELOPE 0xC2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233 // SIM file identifiers
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234 #define MF 0x3F00
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 #define EF_ICCID 0x2FE2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236 #define DF_GSM 0x7F20
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 #define DF_DCS1800 0x7F21
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 #define EF_LP 0x6F05
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 #define EF_IMSI 0x6F07
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240 #define EF_KC 0x6F20
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 #define EF_PLMNSEL 0x6F30
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 #define EF_HPLMN 0x6F31
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 #define EF_ACMAX 0x6F37
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 #define EF_SST 0x6F38
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 #define EF_ACM 0x6F39
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 #define EF_PUCT 0x6F41
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 #define EF_CBMI 0x6F45
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 #define EF_BCCH 0x6F74
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249 #define EF_ACC 0x6F78
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 #define EF_FPLMN 0x6F7B
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 #define EF_LOCI 0x6F7E
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 #define EF_AD 0x6FAD
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 #define EF_PHASE 0x6FAE
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 #define DF_TELECOM 0x7F10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 #define EF_ADN 0x6F3A
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 #define EF_FDN 0x6F3B
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 #define EF_SMS 0x6F3C
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 #define EF_CCP 0x6F3D
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 #define EF_MSISDN 0x6F40
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 #define EF_SMSP 0x6F42
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 #define EF_SMSS 0x6F43
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 #define EF_LND 0x6F44
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 #define EF_EXT1 0x6F4A
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 #define EF_EXT2 0x6F4B
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265 #define EF_ECC 0x6FB7
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 #define MASK_INS 0xFE
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269 #define MASK_CMD 0x11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 #define MASK_RST 0x10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 // Buffer sizes
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
274 #define RSIMBUFSIZE 270
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 #define RSIZESW1SW2 2
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
276 #define XSIMBUFSIZE 270
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
277
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
278
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
279
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 // Structures
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 typedef struct
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 volatile unsigned short cmd;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 volatile unsigned short stat;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 volatile unsigned short conf1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 volatile unsigned short conf2;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 volatile unsigned short it;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 volatile unsigned short rx;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 volatile unsigned short tx;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 volatile unsigned short maskit;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 volatile unsigned short it_cd;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 } SIM_CONTROLLER;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 typedef struct
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 {
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
300 SYS_UWORD8 Inverse;
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
301 SYS_UWORD8 AtrSize;
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
302 SYS_UWORD8 AtrData[MAX_ATR_SIZE];
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
303 } SIM_CARD;
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
304
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
305
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
306 typedef struct
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
307 {
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308 SIM_CONTROLLER *c;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 SYS_UWORD8 *xIn; // xmit input pointer
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 SYS_UWORD8 *xOut; // xmit output pointer
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 unsigned errorSIM; // code return in case of error detectd
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 unsigned short conf1; // image of the configuration register - avoids read/mod/write cycles
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313 volatile unsigned short txParityErr;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314 unsigned short rxParityErr; // if 0 no parity error on receipt, 1 if...
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 SYS_UWORD8 Freq_Algo; //use to determine which sim clk freq to choose for running GSM algo
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 SYS_UWORD8 PTS_Try; //use to calculate how many PTS try were already done
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317 SYS_UWORD8 FileC; //value of File Characteristic
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318 SYS_UWORD16 etu9600;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319 SYS_UWORD16 etu400;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320 SYS_UWORD16 startclock; //744 clock cycle translated in ETU
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321 SYS_UWORD16 stopclock; //1860 clock cycle translated in ETU
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 SYS_UWORD8 moderx; //inform that we are in receive mode
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 // 0 : mode of normal reception without procedure
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 // 1 : mode of wait for acknowledge during reception of char
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 // 2 : mode of reception of data by bloc
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 // 3 : mode of reception of data char by char (proc char)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327 // 4 : mode of reception of data char by char (data)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 // 5 : mode of reception of procedure char SW1/SW2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 // 6 : mode of wait for acknowledge char after transmission of char
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330 SYS_UWORD16 expected_data; //number of expected char in receive mode proc char
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331 SYS_UWORD8 ack; //acknowledge char
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332 SYS_UWORD8 null_received; //indicates if a NULL char was received
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 SYS_UWORD8 hw_mask; //mask used because of pole112 hw prb
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335 SYS_UWORD8 rbuf[RSIMBUFSIZE];
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 SYS_UWORD8 rx_index; // receive index on rbuf buffer
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 SYS_UWORD8 xbuf[XSIMBUFSIZE];
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 SYS_UWORD8 rSW12[RSIZESW1SW2]; //buffer to store SW1 and SW2
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 SYS_UWORD8 SWcount; //static counter
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
341 void (*InsertFunc)(SIM_CARD *);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 void (*RemoveFunc)(void);
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
343 SYS_UWORD16 apdu_ans_length;
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 SIM_PORT;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
347
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
348
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
349 void SIM_IntHandler(void);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
350 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
351 void SIM_CD_IntHandler(void);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
352 #endif
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
353
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
354
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
355
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 * Prototypes
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 */
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
361 // obsolete function
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
362 void SIM_Init(void (Insert(SIM_CARD *cP)), void (Remove(void)));
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
363
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
364 // initialization
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
365 void SIM_Initialize(void);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
366 SYS_UWORD16 SIM_Register(void (Insert(SIM_CARD *cP)), void (Remove(void)));
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
367 SYS_UWORD16 SIM_Reset(SIM_CARD *cP);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
368 SYS_UWORD16 SIM_Restart(SIM_CARD *cP);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
369
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
370 // file commands
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
371 SYS_UWORD16 SIM_Select(SYS_UWORD16 id, SYS_UWORD8 *dat, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
372 SYS_UWORD16 SIM_Status(SYS_UWORD8 *dat, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
373 SYS_UWORD16 SIM_ReadBinary(SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
374 SYS_UWORD16 SIM_UpdateBinary(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
375 SYS_UWORD16 SIM_ReadRecord(SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
376 SYS_UWORD16 SIM_UpdateRecord(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
377 SYS_UWORD16 SIM_Seek(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
378 SYS_UWORD16 SIM_Increase(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
379
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
380 // Authentication
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
381 SYS_UWORD16 SIM_VerifyCHV(SYS_UWORD8 *result, SYS_UWORD8 *chv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
382 SYS_UWORD16 SIM_ChangeCHV(SYS_UWORD8 *result,SYS_UWORD8 *oldChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
383 SYS_UWORD16 SIM_DisableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
384 SYS_UWORD16 SIM_EnableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
385 SYS_UWORD16 SIM_UnblockCHV(SYS_UWORD8 *result, SYS_UWORD8 *unblockChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
386
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
387 // managing
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
388 SYS_UWORD16 SIM_Invalidate(SYS_UWORD8 *rP, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
389 SYS_UWORD16 SIM_Rehabilitate(SYS_UWORD8 *rP, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
390 SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *rand, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
391 SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *size);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
392
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
393 // STK
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
394 SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
395 SYS_UWORD16 SIM_Fetch(SYS_UWORD8 *result, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
396 SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
397 SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 len, SYS_UWORD16 *rcvSize);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
398
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
399 // power off
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
400 void SIM_PowerOff(void);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
401
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
402 // WIM
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
403 SYS_UWORD16 SIM_XchTPDU(SYS_UWORD8 *dat, SYS_UWORD16 trxLen, SYS_UWORD8 *result,
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
404 SYS_UWORD16 rcvLen, SYS_UWORD16 *rcvSize);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
405
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
406 void SIM_lock_cr17689(void);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
407
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
408
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
409
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
410 /*
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
411 * Internal Prototypes
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
412 */
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 void SIM_WriteBuffer(SIM_PORT *p, SYS_UWORD16 offset, SYS_UWORD16 n);
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
414 SYS_UWORD16 SIM_Result(SIM_PORT *p, SYS_UWORD8 *rP, SYS_UWORD16 *lenP, SYS_UWORD8 offset);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
415 SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *rP, SYS_UWORD16 *lP);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
416 SYS_UWORD16 SIM_Command_Base(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *dP, SYS_UWORD16 *lP);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 SYS_UWORD16 SIM_Dummy(void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 void SIM_InitLog(void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 SYS_UWORD16 SIM_TxParityErrors();
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 SYS_UWORD16 SIM_WaitReception(SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 void SIM_Interpret_FileCharacteristics(SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 SYS_UWORD16 SIM_PTSprocedure(SIM_CARD *cP, SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 void SIM_WARMReset (SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425 void SIM_SleepMode_In(SYS_UWORD32 param);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 void SIM_SleepMode_Out(SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 SYS_UWORD8 SIM_GetFileCharacteristics(SIM_PORT *p);
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
428 SYS_UWORD16 SIM_ATRdynamictreatement (SIM_PORT *p, SIM_CARD *cP);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 SYS_UWORD16 SIM_Waitforchars (SIM_PORT *p, SYS_UWORD16 max_wait);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 void SIM_Calcetu (SIM_PORT *p);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 SYS_UWORD8 SIM_Translate_atr_char (SYS_UWORD8 input, SIM_CARD *cP);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
434 SYS_UWORD8 SIM_StartVolt (SYS_UWORD8 ResetFlag);
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
435 SYS_UWORD8 SIM_SwitchVolt (SYS_UWORD8 ResetFlag);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 SYS_UWORD16 SIM_ManualStart (SIM_PORT *p);
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
438 SYS_UWORD8 SIM_Memcpy(SYS_UWORD8 *Buff_target, SYS_UWORD8 Buff_source[], SYS_UWORD16 len);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 SYS_BOOL SIM_SleepStatus(void);
112
4179acab05f7 nuc-fw/bsp: niq32.c and sim.h replaced with new versions
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
440 SYS_UWORD16 SIM_Reset_Restart_Internal(SIM_CARD *cP, SYS_UWORD8 ResetFlag);
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 * Global variables
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445 #ifdef SIM_C
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 #define SI_GLOBAL
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448 #define SI_GLOBAL extern
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452 SI_GLOBAL SIM_PORT Sim[1];
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 SI_GLOBAL NU_TIMER SIM_timer;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 SI_GLOBAL STATUS status_os_sim;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 SI_GLOBAL SYS_UWORD8 SIM_sleep_status;