FreeCalypso > hg > freecalypso-sw
annotate nuc-fw/bsp/niq32.c @ 111:5b7403f6ae93
nuc-fw/bsp: more reconciliation
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 20 Oct 2013 07:58:00 +0000 |
parents | 45911ad957fd |
children | 4179acab05f7 |
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1 /****************************************************************************** |
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2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION |
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3 |
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4 Property of Texas Instruments -- For Unrestricted Internal Use Only |
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5 Unauthorized reproduction and/or distribution is strictly prohibited. This |
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6 product is protected under copyright law and trade secret law as an |
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7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All |
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8 rights reserved. |
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9 |
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10 |
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11 Filename : niq32.c |
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12 |
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13 Description : Nucleus IQ initializations |
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14 |
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15 Project : Drivers |
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16 |
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17 Author : proussel@ti.com Patrick Roussel. |
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18 |
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19 Version number : 1.12 |
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20 |
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21 Date and time : 02/19/01 14:01:50 |
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22 |
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23 Previous delta : 12/19/00 14:24:51 |
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24 |
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25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P_FRED_ADC/drivers1/common/SCCS/s.niq32.c |
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26 |
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27 Sccs Id (SID) : '@(#) niq32.c 1.12 02/19/01 14:01:50 ' |
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28 *******************************************************************************/ |
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29 |
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30 #include "l1_sw.cfg" |
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31 |
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32 #if(!OP_L1_STANDALONE) |
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33 #include "chipset.cfg" |
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34 #include "debug.cfg" |
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35 #include "board.cfg" |
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36 #include "rv_defined_swe.h" |
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37 #include "rtc_config.h" |
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38 #endif |
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39 |
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40 #include "sys_types.h" |
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41 #include "serialswitch.h" |
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42 |
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43 #include "mem.h" |
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44 #include "inth.h" |
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45 #include "sim.h" |
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46 #include "abb_inth.h" // for External Interrupt |
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47 |
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48 #define IQ_H |
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49 #include "iq.h" |
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50 #include "ulpd.h" |
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51 |
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52 #if (defined RVM_DAR_SWE) && (defined _GSM) |
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53 extern void dar_watchdog_reset(void); |
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54 #endif |
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55 |
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56 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 43) || (BOARD == 45)) |
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57 #include "armio.h" |
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58 #include "uartfax.h" |
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59 #endif |
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60 |
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61 /* External declaration */ |
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62 extern void GAUGING_Handler(void); |
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63 extern void TMT_Timer_Interrupt(void); |
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64 extern void kpd_key_handler(void); |
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65 extern void TP_FrameIntHandler(void); |
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66 |
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67 #if (!OP_L1_STANDALONE) |
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68 #if (defined RVM_MPM_SWE) |
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69 extern void MPM_InterruptHandler(void); |
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70 #endif |
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71 |
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72 #if (TI_PROFILER == 1) |
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73 extern void ti_profiler_tdma_action(void); |
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74 #endif |
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75 |
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76 extern void RTC_GaugingHandler(void); |
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77 extern void RTC_ItTimerHandle(void); |
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78 extern void RTC_ItAlarmHandle(void); |
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79 #endif |
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80 |
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81 |
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82 |
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83 /* Global variables */ |
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84 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */ |
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85 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */ |
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86 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */ |
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87 unsigned IQ_DummyCount; /* Used to check if dummy IT */ |
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88 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/ |
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89 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */ |
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90 |
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91 /* add this two variables for imported 188 functions, Jeffrey, 02/26/04 */ |
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92 typedef struct GPIO_HISR_INFO |
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93 { |
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94 NU_HISR hisr; |
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95 char hisr_stack[1024]; |
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96 } T_GPIO_HISR_INFOS; |
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97 |
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98 static T_GPIO_HISR_INFOS gpio_hisr_infos = {0}; |
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99 int g_interrupt = 0; |
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100 |
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101 extern void Hall_OC_IntHandler( void ) ; |
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102 |
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103 |
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104 /*--------------------------------------------------------------*/ |
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105 /* irqHandlers */ |
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106 /*--------------------------------------------------------------*/ |
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107 /* Parameters :none */ |
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108 /* Return : none */ |
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109 /* Functionality : Table of interrupt handlers */ |
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110 /* These MUST be 32-bit entries */ |
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111 /*--------------------------------------------------------------*/ |
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112 |
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113 SYS_FUNC irqHandlers[IQ_NUM_INT] = |
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114 { |
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115 IQ_TimerHandler, /* Watchdog timer */ |
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116 IQ_TimerHandler1, /* timer 1 */ |
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117 IQ_TimerHandler2, /* timer 2 */ |
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118 IQ_Dummy, /* AIRQ 3 */ |
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119 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */ |
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120 IQ_Dummy, /* AIRQ 5 */ |
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121 #if (OP_L1_STANDALONE) |
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122 IQ_Dummy, |
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123 #else |
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124 SIM_IntHandler, /* AIRQ 6 */ |
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125 #endif |
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126 #if ((CHIPSET == 2) || (CHIPSET == 3)) |
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127 SER_uart_handler, /* AIRQ 7 */ |
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128 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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129 SER_uart_modem_handler, /* AIRQ 7 */ |
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130 #endif |
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131 #if (CHIPSET == 12) |
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132 IQ_KeypadHandler, /* AIRQ 8 */ |
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133 #else |
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134 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) |
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135 IQ_KeypadGPIOHandler, /* AIRQ 8 */ |
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136 #else |
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137 IQ_KeypadHandler, /* AIRQ 8 */ |
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138 #endif |
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139 #endif |
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140 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/ |
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141 #if ((CHIPSET == 2) || (CHIPSET == 3)) |
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142 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/ |
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143 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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144 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */ |
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145 #endif |
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146 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */ |
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147 IQ_External, /* AIRQ 12 */ |
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148 IQ_Dummy, /* AIRQ 13 */ |
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149 IQ_Dummy, /* DMA interrupt */ |
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150 #if (CHIPSET == 4) |
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151 IQ_Dummy, /* LEAD */ |
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152 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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153 IQ_Dummy, /* External fast interrupt */ |
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154 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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155 IQ_GsmTim_Handler /* ULPD GSM timer */ |
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156 #elif ((CHIPSET == 5) || (CHIPSET == 6)) |
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157 IQ_Dummy, /* LEAD */ |
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158 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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159 IQ_Dummy, /* External fast interrupt */ |
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160 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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161 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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162 IQ_Dummy, /* Not mapped interrupt */ |
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163 IQ_Dummy, /* Not mapped interrupt */ |
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164 IQ_Dummy, /* Not mapped interrupt */ |
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165 IQ_Dummy, /* Not mapped interrupt */ |
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166 IQ_Dummy /* GEA interrupt */ |
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167 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) |
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168 IQ_Dummy, /* LEAD */ |
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169 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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170 IQ_Dummy, /* External fast interrupt */ |
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171 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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172 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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173 IQ_Dummy /* GEA interrupt */ |
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174 #elif (CHIPSET == 9) |
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175 IQ_Dummy, /* LEAD */ |
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176 IQ_Dummy, /* SIM card-detect fast interrupt */ |
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177 IQ_Dummy, /* External fast interrupt */ |
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178 SER_uart_irda_handler, /* UART IrDA interrupt */ |
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179 IQ_GsmTim_Handler, /* ULPD GSM timer */ |
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180 IQ_Dummy, /* Not mapped interrupt */ |
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181 IQ_Dummy, /* Not mapped interrupt */ |
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182 IQ_Dummy, /* Not mapped interrupt */ |
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183 IQ_Dummy, /* Not mapped interrupt */ |
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184 IQ_Dummy /* Reserved */ |
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185 #elif (CHIPSET == 12) |
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186 IQ_Dummy, /* IRQ15 - LEAD */ |
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187 IQ_Dummy, /* IRQ16 - GPIO */ |
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188 IQ_Dummy, /* IRQ17 - External fast interrupt */ |
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189 SER_uart_irda_handler, /* IRQ18 - UART IrDA interrupt */ |
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190 IQ_GsmTim_Handler, /* IRQ19 - ULPD GSM timer */ |
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191 IQ_Dummy, /* IRQ20 - GEA interrupt */ |
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192 IQ_Dummy, /* IRQ21 - External general Purpose interrupt IRQ1 */ |
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193 IQ_Dummy, /* IRQ22 - External general Purpose interrupt IRQ2 */ |
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194 IQ_Dummy, /* IRQ23 - USIM card insertion/extraction */ |
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195 IQ_Dummy, /* IRQ24 - USIM */ |
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196 IQ_Dummy, /* IRQ25 - LCD */ |
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197 IQ_Dummy, /* IRQ26 - USB */ |
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198 IQ_Dummy, /* IRQ27 - MMC/SD/Memory Stick */ |
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199 SER_uart_modem2_handler,/* IRQ28 - UART_MODEM2 */ |
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200 IQ_Dummy, /* IRQ29 - 2nd level interrupt handler */ |
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201 IQ_Dummy, /* IRQ30 - I2C or uWIRE */ |
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202 IQ_Dummy /* IRQ31 - NAND FLASH */ |
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203 #else |
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204 IQ_Dummy /* LEAD */ |
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205 #endif |
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206 }; |
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207 |
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208 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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209 /*--------------------------------------------------------------*/ |
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210 /* fiqHandlers */ |
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211 /*--------------------------------------------------------------*/ |
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212 /* Parameters :none */ |
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213 /* Return :none */ |
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214 /* Functionality : Table of interrupt handlers */ |
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215 /* These MUST be 32-bit entries */ |
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216 /*--------------------------------------------------------------*/ |
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217 |
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218 SYS_FUNC fiqHandlers[IQ_NUM_INT] = |
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219 { |
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220 IQ_Dummy, /* Watchdog timer */ |
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221 IQ_Dummy, /* timer 1 */ |
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222 IQ_Dummy, /* timer 2 */ |
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223 IQ_Dummy, /* AIRQ 3 */ |
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224 IQ_Dummy, /* TPU Frame It AIRQ 4 */ |
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225 IQ_Dummy, /* AIRQ 5 */ |
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226 IQ_Dummy, /* AIRQ 6 */ |
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227 IQ_Dummy, /* AIRQ 7 */ |
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228 IQ_Dummy, /* AIRQ 8 */ |
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229 IQ_Dummy, /* AIRQ 9 RTC Timer */ |
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230 IQ_Dummy, /* AIRQ 10 RTC ALARM */ |
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231 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */ |
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232 IQ_Dummy, /* AIRQ 12 */ |
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233 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */ |
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234 IQ_Dummy, /* DMA interrupt */ |
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235 IQ_Dummy, /* LEAD */ |
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236 #if (CHIPSET == 12) |
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237 IQ_Dummy, /* IRQ16 - GPIO */ |
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238 #else |
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239 #if (OP_L1_STANDALONE) |
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240 IQ_Dummy, |
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241 #else |
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242 /* glowing, 2004-06-08, replace SIM with Hall according to 188 */ |
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243 Hall_OC_IntHandler, /* glowing,2003-12-18, Hall open-close fast interrupt, it replace SIM_CD_IntHandler */ |
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244 //SIM_CD_IntHandler, /* SIM card-detect fast interrupt */ |
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245 #endif |
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246 #endif |
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247 IQ_Dummy, /* External fast interrupt */ |
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248 IQ_Dummy, /* UART_IRDA interrupt */ |
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249 #if (CHIPSET == 4) |
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250 IQ_Dummy /* ULPD GSM timer */ |
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251 #elif ((CHIPSET == 5) || (CHIPSET == 6)) |
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252 IQ_Dummy, /* ULPD GSM timer */ |
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253 IQ_Dummy, /* Not mapped interrupt */ |
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254 IQ_Dummy, /* Not mapped interrupt */ |
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255 IQ_Dummy, /* Not mapped interrupt */ |
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256 IQ_Dummy, /* Not mapped interrupt */ |
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257 IQ_Dummy /* GEA interrupt */ |
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258 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11)) |
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259 IQ_Dummy, /* ULPD GSM timer */ |
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260 IQ_Dummy /* GEA timer */ |
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261 #elif (CHIPSET == 9) |
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262 IQ_Dummy, /* ULPD GSM timer */ |
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263 IQ_Dummy, /* Not mapped interrupt */ |
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264 IQ_Dummy, /* Not mapped interrupt */ |
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265 IQ_Dummy, /* Not mapped interrupt */ |
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266 IQ_Dummy, /* Not mapped interrupt */ |
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267 IQ_Dummy /* Reserved */ |
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268 #elif (CHIPSET == 12) |
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269 IQ_Dummy, /* IRQ19 - ULPD GSM timer */ |
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270 IQ_Dummy, /* IRQ20 - GEA interrupt */ |
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271 IQ_Dummy, /* IRQ21 - External general Purpose interrupt IRQ1 */ |
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272 IQ_Dummy, /* IRQ22 - External general Purpose interrupt IRQ2 */ |
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273 IQ_Dummy, /* IRQ23 - USIM card insertion/extraction */ |
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274 IQ_Dummy, /* IRQ24 - USIM */ |
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275 IQ_Dummy, /* IRQ25 - LCD */ |
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276 IQ_Dummy, /* IRQ26 - USB */ |
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277 IQ_Dummy, /* IRQ27 - MMC/SD/Memory Stick */ |
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278 IQ_Dummy, /* IRQ28 - UART_MODEM2 */ |
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279 IQ_Dummy, /* IRQ29 - 2nd level interrupt handler */ |
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280 IQ_Dummy, /* IRQ30 - I2C or uWIRE */ |
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281 IQ_Dummy /* IRQ31 - NAND FLASH */ |
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282 #endif |
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283 }; |
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284 #endif |
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285 |
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286 /*--------------------------------------------------------------*/ |
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287 /* IQ_Gauging_Handler */ |
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288 /*--------------------------------------------------------------*/ |
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289 /* Parameters :none */ |
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290 /* Return : none */ |
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291 /* Functionality : Handle unused interrupts */ |
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292 /*--------------------------------------------------------------*/ |
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293 void IQ_Gauging_Handler(void) |
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294 { |
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295 GAUGING_Handler(); |
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296 #if (!OP_L1_STANDALONE) |
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297 RTC_GaugingHandler(); |
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298 #endif |
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299 } |
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300 |
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301 |
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302 /*--------------------------------------------------------------*/ |
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303 /* IQ_External */ |
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304 /*--------------------------------------------------------------*/ |
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305 /* Parameters : none */ |
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306 /* Return : none */ |
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307 /* Functionality : Handle External IRQ mapped on ABB. */ |
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308 /*--------------------------------------------------------------*/ |
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309 void IQ_External(void) |
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310 { |
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311 // Mask external interrupt (12) |
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312 IQ_Mask(IQ_EXT); |
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313 |
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314 // The external IRQ is mapped on the ABB interrupt. |
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315 // The associated HISR ABB_Hisr is activated on reception on the external IRQ. |
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316 if(Activate_ABB_HISR()) |
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317 { |
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318 IQ_Unmask(IQ_EXT); |
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319 } |
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320 } |
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321 |
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322 /*--------------------------------------------------------------*/ |
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323 /* IQ_Dummy */ |
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324 /*--------------------------------------------------------------*/ |
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325 /* Parameters :none */ |
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326 /* Return : none */ |
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327 /* Functionality : Handle unused interrupts */ |
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328 /*--------------------------------------------------------------*/ |
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329 void IQ_Dummy(void) |
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330 { |
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331 IQ_DummyCount++; |
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332 } |
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333 |
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334 /*--------------------------------------------------------------*/ |
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335 /* IQ_RTCHandler */ |
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336 /*--------------------------------------------------------------*/ |
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337 /* Parameters :none */ |
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338 /* Return : none */ |
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339 /* Functionality : Handle RTC Time interrupts */ |
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340 /*--------------------------------------------------------------*/ |
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341 |
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342 void IQ_Rtc_Handler(void) |
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343 { |
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344 #if (!OP_L1_STANDALONE) |
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345 RTC_ItTimerHandle(); |
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346 #endif |
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347 } |
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348 |
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349 /*--------------------------------------------------------------*/ |
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350 /* IQ_RtcA_GsmTim_Handler */ |
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351 /*--------------------------------------------------------------*/ |
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352 /* Parameters :none */ |
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353 /* Return : none */ |
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354 /* Functionality : Handle RTC ALARM or GAUGING interrupts */ |
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355 /*--------------------------------------------------------------*/ |
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356 |
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357 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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358 void IQ_RtcA_Handler(void) |
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359 { |
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360 #if (!OP_L1_STANDALONE) |
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361 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ |
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362 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) |
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363 RTC_ItAlarmHandle(); |
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364 #endif |
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365 } |
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366 |
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367 void IQ_GsmTim_Handler(void) |
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368 { |
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369 |
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370 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) |
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371 { |
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372 // it is GSM Timer it..... |
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373 IQ_GsmTimerCount++; |
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374 } |
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375 } |
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376 #else |
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377 void IQ_RtcA_GsmTim_Handler(void) |
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378 { |
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379 #if (!OP_L1_STANDALONE) |
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380 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM ) |
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381 { |
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382 // it is GSM Timer it..... |
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383 IQ_GsmTimerCount++; |
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384 } |
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385 else |
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386 { |
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387 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */ |
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388 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM ) |
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389 RTC_ItAlarmHandle(); |
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390 } |
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391 #endif |
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392 } |
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393 #endif |
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394 |
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395 /*--------------------------------------------------------------*/ |
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396 /* IQ_TimerHandler */ |
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397 /*--------------------------------------------------------------*/ |
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398 /* Parameters :none */ |
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399 /* Return : none */ |
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400 /* Functionality : Handle Timer interrupts */ |
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401 /*--------------------------------------------------------------*/ |
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402 void IQ_TimerHandler(void) |
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403 { |
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404 IQ_TimerCount++; |
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405 TMT_Timer_Interrupt(); |
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406 #if (defined RVM_DAR_SWE) && (defined _GSM) |
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407 dar_watchdog_reset(); |
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408 #endif |
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409 } |
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410 |
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411 /*--------------------------------------------------------------*/ |
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412 /* IQ_FramerHandler */ |
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413 /*--------------------------------------------------------------*/ |
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414 /* Parameters :none */ |
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415 /* Return : none */ |
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416 /* Functionality : Handle Timer interrupts */ |
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417 /*--------------------------------------------------------------*/ |
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418 void IQ_FrameHandler(void) |
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419 { |
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420 IQ_FrameCount++; |
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421 TMT_Timer_Interrupt(); |
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422 TP_FrameIntHandler(); |
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423 #if (!OP_L1_STANDALONE) |
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424 #if (TI_PROFILER == 1) |
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425 // TDMA treatment for profiling buffer |
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426 ti_profiler_tdma_action(); |
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427 #endif |
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428 #endif |
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429 } |
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430 |
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431 /*--------------------------------------------------------------*/ |
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432 /* IQ_TimerHandler1 */ |
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433 /*--------------------------------------------------------------*/ |
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434 /* Parameters :none */ |
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435 /* Return : none */ |
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436 /* Functionality : Handle Timer 1 interrupts */ |
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437 /*--------------------------------------------------------------*/ |
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438 void IQ_TimerHandler1(void) |
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439 { |
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440 IQ_TimerCount1++; |
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441 } |
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442 |
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443 /*--------------------------------------------------------------*/ |
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444 /* IQ_TimerHandler2 */ |
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445 /*--------------------------------------------------------------*/ |
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446 /* Parameters :none */ |
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447 /* Return : none */ |
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448 /* Functionality : Handle Timer 2 interrupts */ |
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449 /*--------------------------------------------------------------*/ |
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450 void IQ_TimerHandler2(void) |
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451 { |
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452 IQ_TimerCount2++; |
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453 } |
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454 |
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455 /*--------------------------------------------------------------*/ |
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456 /* IQ_IRQ_isr */ |
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457 /*--------------------------------------------------------------*/ |
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458 /* Parameters :none */ |
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459 /* Return : none */ |
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460 /* Functionality : HHandle IRQ interrupts */ |
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461 /*--------------------------------------------------------------*/ |
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462 void IQ_IRQ_isr(void) |
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463 { |
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464 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ |
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465 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */ |
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466 } |
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467 |
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468 /*--------------------------------------------------------------*/ |
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469 /* IQ_FIQ_isr */ |
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470 /*--------------------------------------------------------------*/ |
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471 /* Parameters :none */ |
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472 /* Return : none */ |
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473 /* Functionality : Handle FIQ interrupts */ |
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474 /*--------------------------------------------------------------*/ |
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475 void IQ_FIQ_isr(void) |
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476 { |
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477 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) |
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478 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */ |
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479 #endif |
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480 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */ |
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481 } |
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482 |
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483 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41)) |
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484 |
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485 /*--------------------------------------------------------------*/ |
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486 /* IQ_KeypadGPIOHandler */ |
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487 /*--------------------------------------------------------------*/ |
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488 /* Parameters : none */ |
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489 /* Return : none */ |
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490 /* Functionality : Handle keypad and GPIO interrupts */ |
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491 /*--------------------------------------------------------------*/ |
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492 void IQ_KeypadGPIOHandler(void) |
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493 { |
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494 #if (!OP_L1_STANDALONE) |
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495 /* |
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496 * GPIO interrupt must be checked before the keypad interrupt. The GPIO |
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497 * status bit is reset when the register is read. |
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498 */ |
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499 |
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500 g_interrupt = 80; |
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501 if (AI_CheckITSource (ARMIO_GPIO_INT)) { |
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502 #if 0 |
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503 #ifdef RVM_MPM_SWE |
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504 /* check if the SWE has been started */ |
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505 MPM_InterruptHandler (); |
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506 #else |
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507 UAF_DTRInterruptHandler (); |
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508 #endif |
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509 #endif |
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510 /* Jeffrey, 02/26/04, add this line from 188 */ |
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511 gpio_handler(); |
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512 } |
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513 |
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514 if (AI_CheckITSource (ARMIO_KEYPDAD_INT)) |
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515 kpd_key_handler (); |
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516 #endif |
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517 } |
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518 |
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519 /** |
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520 * function: gpio_handler hall |
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521 */ |
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522 void gpio_handler(void) |
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523 { |
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524 /* 2003/11/01 Robert.Chen for melody interrupt from GPIO1*/ |
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525 /* modify from */ |
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526 |
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527 /* |
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528 AI_MaskIT(2); |
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529 */ |
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530 |
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531 /* to */ |
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532 AI_MaskIT(2); |
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533 /* end Robert.Chen */ |
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534 |
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535 /* Activate HISR to process the key event */ |
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536 NU_Activate_HISR(&gpio_hisr_infos.hisr); |
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537 } |
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538 |
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539 /* 2003/11/01 Robert.Chen Melody HISR entry */ |
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540 void MI_Melody_Hisr(void) |
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541 { |
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542 MaDevDrv_IntHandler(); |
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543 AI_UnmaskIT(0x02); |
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544 } |
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545 |
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546 /** |
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547 * function: kpd_initialize_keypad_hardware |
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548 */ |
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549 void Gpio_hisr_initialize(void) |
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550 { |
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551 int i; |
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552 |
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553 /* 2003/11/01 Robert.Chen, modify for Melody HISR */ |
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554 /* modify from */ |
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555 #if 0 |
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556 /* HISR creation */ |
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557 NU_Create_HISR(&gpio_hisr_infos.hisr, |
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558 "GPIO_HISR", |
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559 gpio_hisr_entry, |
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560 2, |
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561 gpio_hisr_infos.hisr_stack, |
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562 sizeof(gpio_hisr_infos.hisr_stack)); |
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563 |
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564 AI_UnmaskIT(0x02); |
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565 |
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566 i = HallOnOff(); |
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567 |
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568 if(i){ |
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569 AI_SelectIOForIT (2, 0);//ARMIO_FALLING_EDGE |
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570 } |
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571 else{ |
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572 |
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573 AI_SelectIOForIT (2, 1);//ARMIO_RISING_EDGE |
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574 } |
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575 #endif |
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576 /* to */ |
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577 NU_Create_HISR(&gpio_hisr_infos.hisr, |
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578 "GPIO_HISR", |
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579 MI_Melody_Hisr, |
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580 2, |
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581 gpio_hisr_infos.hisr_stack, |
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582 sizeof(gpio_hisr_infos.hisr_stack)); |
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583 |
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584 AI_EnableBit(5); /* MCSI_TXD as GPIO9 */ |
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585 AI_ConfigBitAsInput(9); /* GPIO9 as input pin for YMU765 ~IRQ */ |
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586 AI_SelectIOForIT (9, 0); /* GPIO9 as input, falling edge triggered */ |
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587 AI_UnmaskIT(0x02); /* enable GPIO IRQ */ |
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588 |
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589 /* end modify, Robert.Chen */ |
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590 } |
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591 /* end of imported functins, Jeffrey, 02/26/04 */ |
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592 /* ---------------------------------------------*/ |
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593 |
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594 #elif ((BOARD == 43) || (BOARD == 45)) |
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595 |
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596 /*--------------------------------------------------------------*/ |
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597 /* IQ_KeypadHandler */ |
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598 /*--------------------------------------------------------------*/ |
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599 /* Parameters :none */ |
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600 /* Return : none */ |
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601 /* Functionality : Handle keypad interrupts */ |
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602 /*--------------------------------------------------------------*/ |
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603 void IQ_KeypadHandler(void) |
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604 { |
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605 #if (!OP_L1_STANDALONE) |
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606 kpd_key_handler (); |
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607 #endif |
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608 } |
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609 |
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610 #endif |