FreeCalypso > hg > freecalypso-sw
annotate target-utils/include/rtc.h @ 163:5e0e41cd7c9f
gsm-fw/bsp/sim*.c: initial import from the Leonardo semi-src
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
---|---|
date | Mon, 18 Nov 2013 01:37:19 +0000 |
parents | 92c1ed6b4b67 |
children |
rev | line source |
---|---|
72
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1 /* Calypso RTC registers */ |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
2 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
3 #ifndef __CALYPSO_RTC_H |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
4 #define __CALYPSO_RTC_H |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
5 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
6 #include "types.h" |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
8 #define RTC_REGS_BASE 0xFFFE1800 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
9 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
10 struct rtctime { |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
11 u8 seconds; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
12 u8 minutes; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
13 u8 hours; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
14 u8 day_of_month; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
15 u8 month; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
16 u8 year; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
17 u8 day_of_week; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
18 u8 pad; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
19 }; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
20 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
21 struct rtcregs { |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
22 struct rtctime rtc_cur; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
23 struct rtctime rtc_alarm; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
24 u8 rtc_ctrl_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
25 u8 rtc_status_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
26 u8 rtc_int_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
27 u8 rtc_comp_lsb_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
28 u8 rtc_comp_msb_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
29 u8 rtc_res_prog_reg; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
30 }; |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
31 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
32 #define RTC_REGS (*(volatile struct rtcregs *) RTC_REGS_BASE) |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
33 |
92c1ed6b4b67
pirexplore: RTC read implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
34 #endif /* include guard */ |