annotate gsm-fw/L1/dyn_dwl_include/l1_dyn_dwl_signa.h @ 939:62ca61292b77

gsm-fw: Intel single bank flash driver (Compal) compiles and links
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sat, 31 Oct 2015 23:21:40 +0000
parents 3c850b416c9a
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
150
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /************* Revision Controle System Header *************
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * GSM Layer 1 software
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 * L1_DYN_DWL_SIGNA.H
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 *
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 * Filename l1_dyn_dwl_signa.h
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 * Copyright 2004 (C) Texas Instruments
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 *
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 ************* Revision Controle System Header *************/
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9 #if (L1_DYN_DSP_DWNLD == 1)
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 #ifndef _L1_DYN_DWL_SIGNA_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 #define _L1_DYN_DWL_SIGNA_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 #define P_DYN_DWNLD 0x41
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16 // Messages L1S -> L1A
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17 #define L1_DYN_DWNLD_STOP_CON ( ( P_DYN_DWNLD << 8 ) | 0x02 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19 // Messages API HISR -> L1A //
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 #define API_L1_DYN_DWNLD_START_CON ( ( P_DYN_DWNLD << 8 ) | 0x03 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21 #define API_L1_DYN_DWNLD_FINISHED ( ( P_DYN_DWNLD << 8 ) | 0x04 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 #define API_L1_DYN_DWNLD_STOP ( ( P_DYN_DWNLD << 8 ) | 0x05 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23 #define API_L1_CRC_NOT_OK ( ( P_DYN_DWNLD << 8 ) | 0x07 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 #define API_L1_CRC_OK ( ( P_DYN_DWNLD << 8 ) | 0x08 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25 #define API_L1_DYN_DWNLD_UNINST_OK ( ( P_DYN_DWNLD << 8 ) | 0x09 )
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27 #endif //_L1_DYN_DWL_SIGNA_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 #endif // L1_DYN_DSP_DWNLD
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30