FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/bsp/clkm.c @ 394:6661e5bc0712

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
target-utils: flush serial output before Iota poweroff
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Wed, 11 Jun 2014 17:32:51 +0000
parents afceeeb2cba1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /******************************************************************************
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 product is protected under copyright law and trade secret law as an
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 rights reserved.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 Filename : clkm.c
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13 Description : Set of functions useful to test the Saturn
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 CLKM peripheral
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16 Project : drivers
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 Author : pmonteil@tif.ti.com Patrice Monteil.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 Version number : 1.11
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 Date and time : 10/23/01 14:43:31
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 Previous delta : 10/23/01 14:43:31
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P_FRED_CLOCK/drivers1/common/SCCS/s.clkm.c
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28 Sccs Id (SID) : '@(#) clkm.c 1.11 10/23/01 14:43:31 '
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32 *****************************************************************************/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34 //############################################################
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 //############################################################
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 //### Be careful: this file must be placed in Flash Memory ###
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37 //### and compiled in 16 bits length intructions ###
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 //### (CF. the function wait_ARM_cycles() ###
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 //############################################################
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 //############################################################
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 #include "../include/config.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 #include "../include/sys_types.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 #include "mem.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 #include "clkm.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48 static SYS_UWORD32 ratio_wait_loop = 0;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 #if (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 const double dsp_div_value[CLKM_NB_DSP_DIV_VALUE] = {1, 1.5, 2, 3};
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 #if ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 /*---------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 /* CLKM_InitARMClock() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57 /*--------------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58 /* Parameters : clk_src : 0x00 means DPLL selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 /* 0x01 means VTCX0 selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
60 /* 0x03 means CLKIN selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
61 /* clk_xp5 : Enable 1.5 or 2.5 division factor */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
62 /* (0 or 1) */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
63 /* clk_div : Division factor applied to clock */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
64 /* source */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
65 /* WARNING : reverse order in comparison to ULYSSE */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
66 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
67 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
68 /* Functionality :Initialize the ARM Clock frequency */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
69 /*--------------------------------------------------------------*/
111
5b7403f6ae93 nuc-fw/bsp: more reconciliation
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
70
5b7403f6ae93 nuc-fw/bsp: more reconciliation
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
71 void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div, SYS_UWORD16 clk_xp5)
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
72 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
73 SYS_UWORD16 cntl = * (volatile SYS_UWORD16 *) CLKM_ARM_CLK;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
74
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
75 cntl &= ~(CLKM_CLKIN0 | CLKM_CLKIN_SEL | CLKM_ARM_MCLK_XP5 | CLKM_MCLK_DIV);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
76
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
77 cntl |= ((clk_src << 1) | (clk_xp5 << 3) | (clk_div << 4));
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
78
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
79 * (volatile SYS_UWORD16 *) CLKM_ARM_CLK = cntl;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
80 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
81 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
82 /*---------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
83 /* CLKM_InitARMClock() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
84 /*--------------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
85 /* Parameters : clk_src : 0x00 means CLKIN selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
86 /* 0x01 means 32 K selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
87 /* 0x02 means External clock selected */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
88 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
89 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
90 /* Functionality :Initialize the ARM Clock frequency */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
91 /*--------------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
92
111
5b7403f6ae93 nuc-fw/bsp: more reconciliation
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
93 void CLKM_InitARMClock(SYS_UWORD16 clk_src, SYS_UWORD16 clk_div)
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
94 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
95 SYS_UWORD16 cntl = * (volatile SYS_UWORD16 *) CLKM_ARM_CLK;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
96
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
97 cntl &= ~(CLKM_LOW_FRQ | CLKM_CLKIN_SEL | CLKM_MCLK_DIV);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
98
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
99 cntl |= ((clk_src << 1) | (clk_div << 4));
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
100
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
101 * (volatile SYS_UWORD16 *) CLKM_ARM_CLK = cntl;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
102 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
103
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
104 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
105
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
106
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
107 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
108 /* convert_nanosec_to_cycles() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
109 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
110 /* parameter: time in 10E-9 seconds */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
111 /* return: Number of cycles for the wait_ARM_cycles() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
112 /* function */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
113 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
114 /* Description: */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115 /* ------------ */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 /* convert x nanoseconds in y cycles used by the ASM loop*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117 /* function . Before calling this function, call the */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 /* initialize_wait_loop() function */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 /* Called when the HardWare needs time to wait */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 /*-------------------------------------------------------*/
111
5b7403f6ae93 nuc-fw/bsp: more reconciliation
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 93
diff changeset
121 SYS_UWORD32 convert_nanosec_to_cycles(SYS_UWORD32 time)
93
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123 return( time / ratio_wait_loop);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 /* initialize_wait_loop() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 /* Description: */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 /* ------------ */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 /* Init the ratio used to convert time->Cycles according */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 /* to hardware parameters */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 /* measurement time for this function (ARM 39Mhz, 3 waits*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136 /* states) = 75 micoseconds */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 void initialize_wait_loop(void)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 #define NBR_CYCLES_IN_LOOP 5 // this value is got from an oscilloscope measurement
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 double src_ratio;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 double final_ratio;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 SYS_UWORD16 flash_access_size;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 SYS_UWORD16 flash_wait_state;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 SYS_UWORD32 nbr;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 SYS_UWORD32 arm_clock;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151 //////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 // compute the ARM clock used //
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 //////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 SYS_UWORD16 arm_mclk_xp5;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 SYS_UWORD16 arm_ratio;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 SYS_UWORD16 clk_src;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 SYS_UWORD16 clkm_cntl_arm_clk_reg = * (volatile SYS_UWORD16 *) CLKM_CNTL_ARM_CLK;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 #if ((CHIPSET == 4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 clk_src = (clkm_cntl_arm_clk_reg & MASK_CLKIN) >> 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 switch (clk_src)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 case 0x00: //DPLL selected
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 // select the DPLL factor
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 if (((* (volatile SYS_UWORD16 *) MEM_DPLL_ADDR) & DPLL_LOCK) != 0)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 SYS_UWORD16 dpll_div;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 SYS_UWORD16 dpll_mul;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 dpll_div=DPLL_READ_DPLL_DIV;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 dpll_mul=DPLL_READ_DPLL_MUL;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 src_ratio = (double)(dpll_mul)/(double)(dpll_div+1);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 else // DPLL in bypass mode
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 SYS_UWORD16 dpll_div = DPLL_BYPASS_DIV;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 src_ratio= (double)(1)/(double)(dpll_div+1);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 break;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 case 0x01: //VTCX0 selected
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 src_ratio = 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 break;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 case 0x03: //CLKIN selected (external clock)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 src_ratio = 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 break;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 // define the division factor applied to clock source (CLKIN or VTCXO or DPLL)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 arm_ratio = (clkm_cntl_arm_clk_reg & CLKM_MCLK_DIV) >> 4;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 // check if the 1.5 or 2.5 division factor is enabled
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 arm_mclk_xp5 = clkm_cntl_arm_clk_reg & CLKM_ARM_MCLK_XP5;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 if (arm_mclk_xp5 == 0) // division factor enable for ARM clock ?
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 if (arm_ratio == 0)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 arm_ratio =1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199 else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200 arm_ratio = ((arm_ratio>>1) & 0x0001) == 0 ? 1.5 : 2.5;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 #else // CHIPSET
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 src_ratio = 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 // define the division factor applied to clock source (CLKIN or VTCXO or DPLL)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207 arm_ratio = (clkm_cntl_arm_clk_reg & CLKM_MCLK_DIV) >> 4;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 // check if the 1.5 or 2.5 division factor is enabled
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 arm_mclk_xp5 = clkm_cntl_arm_clk_reg & MASK_ARM_MCLK_1P5;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 if (arm_mclk_xp5 == 1) // division factor enable for ARM clock ?
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 arm_ratio = 1.5;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 if (arm_ratio == 0)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 arm_ratio = 4;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 if (arm_ratio == 1 )
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 arm_ratio = 2;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221 else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222 arm_ratio = 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 #endif // CHIPSET
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 final_ratio = (src_ratio / (double) arm_ratio);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230 //////////////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231 // compute the Flash wait states used //
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232 //////////////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234 #if (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 flash_access_size = *((volatile SYS_UWORD16 *) MEM_REG_nCS5);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 flash_access_size = *((volatile SYS_UWORD16 *) MEM_REG_nCS0);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 flash_access_size = (flash_access_size >> 5) & 0x0003; // 0=>8bits, 1=>16 bits, 2 =>32 bits
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 // the loop file is compiled in 16 bits it means
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 // flash 8 bits => 2 loads for 1 16 bits assembler instruction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 // flash 16 bits => 1 loads for 1 16 bits assembler instruction
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 // flash 32 bits => 1 loads for 1 16 bits assembler instruction (ARM bus 16 bits !!)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 // !!!!!!!!! be careful: if this file is compile in 32 bits, change these 2 lines here after !!!
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 if (flash_access_size == 0) flash_access_size = 2;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 else flash_access_size = 1;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 #if (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 * WARNING - New ARM Memory Interface features are not supported here below (Page Mode, extended WS, Dummy Cycle,...).
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 flash_wait_state = *((volatile SYS_UWORD16 *) MEM_REG_nCS5);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 flash_wait_state = *((volatile SYS_UWORD16 *) MEM_REG_nCS0);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 flash_wait_state &= 0x001F;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 //////////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 // compute the length of the loop //
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 //////////////////////////////////////
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 // Number of flash cycles for the assembler loop
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265 nbr = NBR_CYCLES_IN_LOOP;
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 // Number of ARM cycles for the assembler loop
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 nbr = nbr * (flash_wait_state + 1) * (flash_access_size);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 // time for the assembler loop (unit nanoseconds: 10E-9)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271 arm_clock = final_ratio * 13; // ARM clock in Mhz
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 ratio_wait_loop = (SYS_UWORD32)((nbr*1000) / arm_clock);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277 /* wait_ARM_cycles() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 /* Description: */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 /* ------------ */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 /* Called when the HardWare needs time to wait. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 /* this function wait x cycles and is used with the */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 /* convert_nanosec_to_cycles() & initialize_wait_loop() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 /* Exemple: wait 10 micro seconds: */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 /* initialize_wait_loop(); */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 /* wait_ARM_cycles(convert_nanosec_to_cycles(10000)) */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 /* minimum time value with cpt_loop = 0 (estimated) */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 /* and C-SAMPLE / flash 6,5Mhz ~ 1,5 micro seconds */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 /* */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 /* Be careful : in order to respect the rule about the */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 /* conversion "time => number of cylcles in this loop" */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296 /* (Cf the functions: convert_nanosec_to_cycles() and */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 /* initialize_wait_loop() ) respect the following rules: */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 /* This function must be placed in Flash Memory and */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 /* compiled in 16 bits instructions length */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300 /*-------------------------------------------------------*/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 void wait_ARM_cycles(SYS_UWORD32 cpt_loop)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 {
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 // C code:
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304 // while (cpt_loop -- != 0);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 asm(" CMP A1, #0");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307 asm(" BEQ END_FUNCTION");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 asm("LOOP_LINE: ");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 asm(" SUB A1, A1, #1");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 asm(" CMP A1, #0");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 asm(" BNE LOOP_LINE");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314 asm("END_FUNCTION: ");
45911ad957fd nuc-fw: beginning to integrate TI's BSP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 }