FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/bsp/ulpd.h @ 472:6adbacc0f255

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
os_tim_ir.c: reconstruction complete
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Thu, 26 Jun 2014 18:17:31 +0000
parents afceeeb2cba1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
113
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /*******************************************************************************
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 product is protected under copyright law and trade secret law as an
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 rights reserved.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 Filename : ulpd.h
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13 Description : Header for HYPERION/ULPD module tests
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 Target : Arm
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16 Project : Hyperion
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 Author : smunsch@tif.ti.com Sylvain Munsch.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 Version number : 1.11
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 Date and time : 12/20/00 10:17:22
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 Previous delta : 12/06/00 17:31:50
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P/drivers1/common/SCCS/s.ulpd.h
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28 Sccs Id (SID) : '@(#) ulpd.h 1.11 12/20/00 10:17:22 '
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31 *****************************************************************************/
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33 #include "../include/config.h"
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 #include <limits.h>
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 #include <float.h>
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 // SLEEP MODES
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 //=======================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 #define DO_NOT_SLEEP 00
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41 #define FRAME_STOP 01 // little BIG SLEEP (CUST5...)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 #define CLOCK_STOP 02 // Deep sleep
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 // ULPD registers address
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 //=======================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48 #define ULPD_XIO_START 0xfffe2000
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 #define ULPD_INC_FRAC_REG (SYS_UWORD16 *)(ULPD_XIO_START)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 #define ULPD_INC_SIXTEENTH_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 1)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #define ULPD_SIXTEENTH_START_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 2)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53 #define ULPD_SIXTEENTH_STOP_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 3)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 #define ULPD_COUNTER_32_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 4)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 #define ULPD_COUNTER_32_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 5)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 #define ULPD_COUNTER_HI_FREQ_LSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 6)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57 #define ULPD_COUNTER_HI_FREQ_MSB_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 7)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58 #define ULPD_GAUGING_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 8)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 #define ULPD_GAUGING_STATUS_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 9)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
60 #define ULPD_GSM_TIMER_CTRL_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 10)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
61 #define ULPD_GSM_TIMER_INIT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 11)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
62 #define ULPD_GSM_TIMER_VALUE_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 12)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
63 #define ULPD_GSM_TIMER_IT_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 13)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
64 #define ULPD_SETUP_CLK13_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 14)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
65 #define ULPD_SETUP_SLICER_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 15)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
66 #define ULPD_SETUP_VTCXO_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 16)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
67 #define ULPD_SETUP_FRAME_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 17)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
68 #define ULPD_SETUP_RF_REG ((SYS_UWORD16 *)(ULPD_XIO_START) + 18)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
69
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
70 /* TI's dyslexia */
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
71 #define ULDP_INC_SIXTEENTH_REG ULPD_INC_SIXTEENTH_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
72 #define ULDP_SIXTEENTH_START_REG ULPD_SIXTEENTH_START_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
73 #define ULDP_SIXTEENTH_STOP_REG ULPD_SIXTEENTH_STOP_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
74 #define ULDP_COUNTER_32_LSB_REG ULPD_COUNTER_32_LSB_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
75 #define ULDP_COUNTER_32_MSB_REG ULPD_COUNTER_32_MSB_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
76 #define ULDP_COUNTER_HI_FREQ_LSB_REG ULPD_COUNTER_HI_FREQ_LSB_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
77 #define ULDP_COUNTER_HI_FREQ_MSB_REG ULPD_COUNTER_HI_FREQ_MSB_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
78 #define ULDP_GAUGING_CTRL_REG ULPD_GAUGING_CTRL_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
79 #define ULDP_GAUGING_STATUS_REG ULPD_GAUGING_STATUS_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
80 #define ULDP_GSM_TIMER_CTRL_REG ULPD_GSM_TIMER_CTRL_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
81 #define ULDP_GSM_TIMER_INIT_REG ULPD_GSM_TIMER_INIT_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
82 #define ULDP_GSM_TIMER_VALUE_REG ULPD_GSM_TIMER_VALUE_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
83 #define ULDP_GSM_TIMER_IT_REG ULPD_GSM_TIMER_IT_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
84 #define ULDP_SETUP_CLK13_REG ULPD_SETUP_CLK13_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
85 #define ULDP_SETUP_SLICER_REG ULPD_SETUP_SLICER_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
86 #define ULDP_SETUP_VTCXO_REG ULPD_SETUP_VTCXO_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
87 #define ULDP_SETUP_FRAME_REG ULPD_SETUP_FRAME_REG
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
88
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
89 // ULPD gauging control register description
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
90 //==========================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
91
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
92 #define ULPD_GAUGING_EN 0x0001 // Gauging is running
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
93 #define ULPD_GAUGING_TYPE_HF 0x0002 // Gauging versus HFclock
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
94 #define ULPD_SEL_HF_PLL 0x0004 // High freq clock = PLL DSP
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
95
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
96 /* more dyslexia */
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
97 #define ULDP_GAUGING_EN ULPD_GAUGING_EN
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
98 #define ULDP_GAUGING_TYPE_HF ULPD_GAUGING_TYPE_HF
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
99 #define ULDP_SEL_HF_PLL ULPD_SEL_HF_PLL
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
100
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
101 // ULPD gauging status register description
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
102 //==========================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
103
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
104 #define ULPD_IT_GAUGING 0x0001 // Interrupt it_gauging occurence
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
105 #define ULPD_OVF_HF 0x0002 // Overflow on the HF counter
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
106 #define ULPD_OVF_32 0x0004 // Overflow on the 32 Khz counter
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
107
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
108 #define ULDP_IT_GAUGING ULPD_IT_GAUGING
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
109 #define ULDP_OVF_HF ULPD_OVF_HF
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
110 #define ULDP_OVF_32 ULPD_OVF_32
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
111
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
112 // WAKEup time
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
113 //==========================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
114 // the setup time unit is the number of 32 Khz clock periods
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 #if (BOARD == 34)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 #define SETUP_RF 75 // adujstement time to minimize big_sleep duration
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 // The SETUP_RF value must be used to delay as much as possible the true
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 // start time of the deep_sleep wake-up sequence for power consumption saving.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121 // This is required because the unit of the SETUP_FRAME counter is the
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122 // GSM TDMA frame and not a T32K time period.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #define SETUP_VTCXO 320 // The setup_vtcxo is the time the external RF device takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 // stable signals to the VTCXO
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 // a stable output when vtcxo is enabled : usually 2 to 5ms
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 // parameter is directly related to the VTCXO device used in the phone
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 // and consequently must be retrieved from the VTCXO data-sheet.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 #define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 // a stable output when slicer is enabled : max conservative value 1ms
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 #else
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #define SETUP_RF 0 // adujstement time to minimize big_sleep duration
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 // The SETUP_RF value must be used to delay as much as possible the true
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 // start time of the deep_sleep wake-up sequence for power consumption saving.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 // This is required because the unit of the SETUP_FRAME counter is the
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 // GSM TDMA frame and not a T32K time period.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 #if (CHIPSET == 2)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145 #define SETUP_VTCXO 31 // The setup_vtcxo is the time the external RF device takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 #else // stable signals to the VTCXO
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 #define SETUP_VTCXO 1114 // 34 ms for ABB LDO stabilization before 13MHz switch ON
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 // Minimum value to be sure that ABB is awake while the DBB start running for
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 // SETUP_VTCXO = ((SLPDLY*16)+4+145)*T32KHz
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 #endif
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 #if (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 #if (RF_FAM==12)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 #define SETUP_SLICER 660
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 #else
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 #define SETUP_SLICER 600 // 600/32x10^3 = 18.75ms required for VCXO stabilization
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 #endif
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #else
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 #define SETUP_SLICER 180 // The setup_slicer is the time that the vtcxo takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 // a stable output when vtcxo is enabled : usually 2 to 5ms
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 // The SETUP_SLICER value should be smaller than 160(=4,8ms) but this
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 // parameter is directly related to the VTCXO device used in the phone
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 // and consequently must be retrieved from the VTCXO data-sheet.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 #endif
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 #define SETUP_CLK13 31 // The setup_clk13 is time that the slicer takes to deliver
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 // a stable output when slicer is enabled : max conservative value 1ms
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 #endif // BOARD == 34
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 // SETUP_FRAME:
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 //-------------
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 // CF. Reference document: ULYS015 v1.1 page 24
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 // 1) Nominal Frequency = 32.768 Khz => 0.03051757 ms
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 // (0.03051757 ms / 4.615 ms) = 0.006612692 Frames
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 // 2) The use of the RFEN signal is optional. It is necessary if the VTCXO function
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 // is part of an RF IC which must be first powered before enabling the VTCXO.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 // However it can be use for any other purpose.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 // 3) The term (1-DBL_EPSILON) corresponds to the rounding up of SETUP_FRAME.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 #ifndef DBL_EPSILON //CQ16723: For non TI compiler, DBL_EPSILON can be undefined.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 #define DBL_EPSILON 0
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 #endif
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 #define SETUP_FRAME ((( SETUP_RF+SETUP_VTCXO+SETUP_SLICER+SETUP_CLK13)*0.006612692)+(1-DBL_EPSILON))
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 #define MAX_GSM_TIMER 65535 // max duration for the wake up timer
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 // Default values for Cell selection and CS_MODE0
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 //===============================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 #define DEFAULT_HFMHZ_VALUE (13000000*l1_config.dpll)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 #define DEFAULT_32KHZ_VALUE (32768) // real value 32768.29038 hz
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 //with l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE,DEFAULT_32KHZ_VALUE) and dpll = 65Mhz
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 // => DEFAULT_INCSIXTEEN 132
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 // => DEFAULT_INCFRAC 15915
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 // ULPD GSM timer control register description
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 //============================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 #define ULPD_TM_LOAD 0x0001 // load the timer with init value
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205 #define ULPD_TM_FREEZE 0x0002 // 1=> GSM timer is frozen
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 #define ULPD_IT_TIMER_GSM 0x0001 // Interrupt timer occurrence
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 /* TI's dyslexia */
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 #define ULDP_TM_LOAD ULPD_TM_LOAD
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 #define ULDP_TM_FREEZE ULPD_TM_FREEZE
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 /*
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 * The following accessor macros all have dyslexic names, unfortunately.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 * Too much of a pita to rename them all, so I'm leaving them be for now.
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 * -SF
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 */
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 // ULDP_INCFRAC_UPDATE : update INCFRAC (16 bits)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 //================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 #define ULDP_INCFRAC_UPDATE(frac) (* (volatile SYS_UWORD16 *)ULPD_INC_FRAC_REG = frac)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 // ULDP_INCSIXTEEN_UPDATE : update INCSIXTEEN (12 bits)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224 //======================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 #define ULDP_INCSIXTEEN_UPDATE(inc) (* (volatile SYS_UWORD16 *)ULDP_INC_SIXTEENTH_REG = inc)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228 // ULDP_GAUGING_RUN : Start the gauging
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229 //=====================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230 #define ULDP_GAUGING_RUN (* (volatile SYS_UWORD16 *)ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233 // ULDP_GAUGING_STATUS : Return if it gauging occurence
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234 //======================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 #define ULDP_GAUGING_STATUS ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_GAUGING_EN )
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 // ULDP_GAUGING_STOP : Stop the gauging
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 //=====================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 #define ULDP_GAUGING_STOP (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG &= ~ULDP_GAUGING_EN)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 // ULDP_GAUGING_START : Stop the gauging
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 //=====================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 #define ULDP_GAUGING_START (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_EN)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 // ULDP_GAUGING_SET_HF : Set the gauging versus HF clock
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 //======================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 #define ULDP_GAUGING_SET_HF (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_GAUGING_TYPE_HF)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249 // ULDP_GAUGING_HF_PLL : Set the gauging HF versus PLL clock
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 //===========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 #define ULDP_GAUGING_HF_PLL (* (volatile SYS_UWORD16 *) ULDP_GAUGING_CTRL_REG |= ULDP_SEL_HF_PLL)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254 // ULDP_GET_IT_GAG : Return if the interrupt it gauging occurence
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 //================================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 #define ULDP_GET_IT_GAG ((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_IT_GAUGING )
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 // ULDP_GET_OVF_HF : Return overflow occured on the HF counter
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 //=============================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 #define ULDP_GET_OVF_HF (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_HF)>>1)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 // ULDP_GET_OVF_32 : Return overflow occured on the 32 counter
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 //=============================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 #define ULDP_GET_OVF_32 (((* (volatile SYS_UWORD16 *) ULDP_GAUGING_STATUS_REG) & ULDP_OVF_32)>>2)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266 // ULDP_TIMER_INIT : Load the timer_init value
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 //=========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 #define ULDP_TIMER_INIT(value) ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG) = value)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 // READ_ULDP_TIMER_INIT : Read the timer_init value
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271 //=========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 #define READ_ULDP_TIMER_INIT (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_INIT_REG)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274 // READ_ULDP_TIMER_VALUE : Read the timer_init value
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 //=========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276 #define READ_ULDP_TIMER_VALUE (* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_VALUE_REG)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 // ULDP_TIMER_LD : Load the timer with timer_init value
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 //=========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 #define ULDP_TIMER_LD ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_LOAD)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 // ULDP_TIMER_FREEZE : Freeze the timer
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 //=========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 #define ULDP_TIMER_FREEZE ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) |= ULDP_TM_FREEZE)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 // ULDP_GSM_TIME_START : Run the GSM timer
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 //=========================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 #define ULDP_TIMER_START ((* (volatile SYS_UWORD16 *)ULDP_GSM_TIMER_CTRL_REG) &= ~ULDP_TM_FREEZE)
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 // ULDP_GET_IT_TIMER : Return the it GSM timer occurence
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 //===========================================================
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 #define ULDP_GET_IT_TIMER ((* (volatile SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293
3b2e941043d8 nuc-fw/bsp: niq32.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294