FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/cust0/Makefile @ 941:6b0b2f6dbb20

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
gsm-fw/services/ffs/drv.c: AMD multi-bank flash driver fixed for Pirelli and future FreeCalypso hardware
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Sun, 01 Nov 2015 00:07:09 +0000
parents fa119e49673b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
520
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 CC= arm-elf-gcc
527
a6ff7b513bcf gsm-fw/L1/cust0: use -I flags in the Makefile to make C code files less ugly
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 522
diff changeset
2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \
528
1affe428bf72 getting closer to compiling l1_cust.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 527
diff changeset
3 -I../tm_include -I../tm_cust0 -I../tpudrv
520
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 CFLAGS= -O2 -fno-builtin -mthumb-interwork
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 LD= arm-elf-ld
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6
890
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
7 sinclude ../../include/config.mk
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
8
542
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
9 IOBJS= ind_os.o l1_cust_iram.o
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
10 XOBJS= l1_cust_xip.o l1_rf12.o
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
11
890
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
12 ifeq (${CONFIG_TARGET_PIRELLI},1)
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
13 XOBJS+= pirelli.o
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
14 endif
452a4aea3fc5 gsm-fw: implemented reading of Pirelli's factory calibration records
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 543
diff changeset
15
542
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
16 all: iramcode.o xipcode.o
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
17
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
18 l1_cust_iram.o: l1_cust.c
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
19 ${CC} ${CFLAGS} ${CPPFLAGS} -DRUN_INT_RAM -c -o $@ $<
520
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20
542
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
21 l1_cust_xip.o: l1_cust.c
543
2dccd2b4e5a2 gsm-fw/L1/cust0/Makefile: forgot -mthumb for l1_cust_xip.o
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 542
diff changeset
22 ${CC} ${CFLAGS} ${CPPFLAGS} -DRUN_FLASH -mthumb -c -o $@ $<
542
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
23
893
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
diff changeset
24 ifeq (${CONFIG_TARGET_PIRELLI},1)
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
diff changeset
25 pirelli.o: pirelli.c
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
diff changeset
26 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $<
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
diff changeset
27 endif
fa119e49673b gsm-fw/L1/cust0/Makefile: compile pirelli.c XIP module with -mthumb
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 890
diff changeset
28
542
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
29 iramcode.o: ${IOBJS}
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
30 ${LD} -r -o $@ ${IOBJS}
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
31
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
32 xipcode.o: ${XOBJS}
9dd6ca16f13d gsm-fw/L1/cust0: split between IRAM and XIP code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 528
diff changeset
33 ${LD} -r -o $@ ${XOBJS}
520
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 clean:
ed6071292a5c L1: first C module compiles: ind_os.c
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 rm -f *.[oa] *.out *errs