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annotate gsm-fw/bsp/Makefile @ 920:7cb0b32f1997

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fc-pirhackinit works after fixing MAX_MEMREAD_BYTES
author Space Falcon <falcon@ivan.Harhan.ORG>
date Tue, 08 Sep 2015 23:33:38 +0000
parents 2768b4339275
children
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1 CC= arm-elf-gcc
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2 CFLAGS= -O2 -fno-builtin -mthumb-interwork
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3 ASFLAGS=-mthumb-interwork
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4 LD= arm-elf-ld
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6 sinclude ../include/config.mk
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2768b4339275 a flash chip init/reset function added to Application_Initialize(),
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8 IOBJS= flashchipinit.o irq_twiddle.o niq32.o
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9 XTOBJS= armio.o clkm.o init_target.o inth.o niq.o timer.o timer1.o timer2.o
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11 ifeq (${CONFIG_INCLUDE_SIM},1)
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12 XTOBJS+=sim.o
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13 IOBJS+= sim32.o
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14 endif
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16 XOBJS= ${XTOBJS} oldint.o
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17 AOBJS= ${IOBJS} oldint.o
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19 HDRS= armio.h clkm.h dma.h inth.h iq.h mem.h rhea_arm.h sim.h timer.h \
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20 timer1.h timer2.h ulpd.h
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dbfc9ff4e8d2 gsm-fw: starting to compile RTC code
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22 SUBDIR= abb+spi rtc
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23 SUBDIR_XIPCODE= abb+spi/xipcode.o rtc/xipcode.o
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25 all: ${IOBJS} ${XOBJS} ${SUBDIR} iramcode.o xipcode.o
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27 ${AOBJS}: ${HDRS}
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29 ${XTOBJS}: %.o : %.c ${HDRS}
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30 ${CC} ${CFLAGS} -mthumb -c $<
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32 iramcode.o: ${IOBJS}
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33 ${LD} -r -o $@ ${IOBJS}
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35 xipcode.o: ${XOBJS} ${SUBDIR}
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36 ${LD} -r -o $@ ${XOBJS} ${SUBDIR_XIPCODE}
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38 ${SUBDIR}: FRC
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39 cd $@; ${MAKE} ${MFLAGS}
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41 clean:
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42 rm -f *.[oa] *.out *errs
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43 for i in ${SUBDIR}; do (cd $$i; ${MAKE} ${MFLAGS} clean); done
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45 FRC: