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annotate gsm-fw/nucleus/init.S @ 401:7ceeec049be4

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fc-loadtool flash: bank configurations for CFI
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 15 Jun 2014 20:24:51 +0000
parents 9df7f9c72e17
children
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1 /*
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2 * This is a stripped-down version of the Nucleus PLUS int.s module,
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3 * reduced to handle just Nucleus PLUS assembly initialization.
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4 * The IRQ shell code has been moved into irqshell.S, the
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5 * platform-dependent timer code will be moving somewhere else,
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6 * and there no ARM architectured vectors in here: that part will be
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7 * handled by the linked application.
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8 *
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9 ************************************************************************
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10 *
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11 * FILE NAME VERSION
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12 *
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13 * int.s Nucleus PLUS\ARM925\Code Composer 1.14.1
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14 *
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15 * COMPONENT
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16 *
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17 * IN - Initialization
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18 *
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19 * DESCRIPTION
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20 *
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21 * This file contains the target processor dependent initialization
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22 * routines and data.
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23 *
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24 * DATA STRUCTURES
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25 *
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26 * INT_Vectors Interrupt vector table
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27 *
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28 * FUNCTIONS
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29 *
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30 * INT_Initialize Target initialization
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31 * INT_Vectors_Loaded Returns a NU_TRUE if all the
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32 * default vectors are loaded
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33 * INT_Setup_Vector Sets up an actual vector
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34 *
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35 * DEPENDENCIES
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36 *
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37 * nucleus.h System constants
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38 *
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39 * HISTORY
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40 *
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41 * NAME DATE REMARKS
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42 *
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43 * B. Ronquillo 08-28-2002 Released version 1.14.1
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44 *
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45 ************************************************************************
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46 */
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47
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48 #define NU_SOURCE_FILE
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49
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50 /*
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51 ******************************
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52 * INCLUDE ASSEMBLY CONSTANTS *
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53 ******************************
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54 * Define constants used in low-level initialization.
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55 */
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56
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57 #include "asm_defs.h"
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58
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59 .code 32
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60
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61 /* stack sizes - matching the original asm_defs.inc for now */
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62 #define SYSTEM_STACK_SIZE 1024
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63 #define IRQ_STACK_SIZE 128
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64 #define FIQ_STACK_SIZE 128
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65 #define HISR_STACK_SIZE 2048 /* this is for the timer HISR */
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66 #define HISR_PRIORITY 2 /* ditto */
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67
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68 /*
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69 **********************************
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70 * SYSTEM STACK DECLARATIONS *
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71 **********************************
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72 */
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73 .section "system_stack","aw",%nobits
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74 .balign 4
79
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75
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76 INT_System_Stk_Limit:
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77
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78 .space SYSTEM_STACK_SIZE
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79
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80 .balign 4
79
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81
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82 INT_System_Stack_SP:
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83
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84 /*
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85 **********************************
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86 * IRQ STACK DECLARATIONS *
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87 **********************************
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88 */
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89 .section "irq_stack","aw",%nobits
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90 .balign 4
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91
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92 .space IRQ_STACK_SIZE
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93
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94 .balign 4
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95
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96 INT_IRQ_Stack_SP:
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97
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98 /*
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99 **********************************
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100 * FIQ STACK DECLARATIONS *
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101 **********************************
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102 */
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103 .section "fiq_stack","aw",%nobits
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104 .balign 4
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105
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106 .space FIQ_STACK_SIZE
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107
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108 .balign 4
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109
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110 INT_FIQ_Stack_SP:
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111
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112 /*
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113 **********************************
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114 * TIMER HISR STACK DECLARATION *
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115 **********************************
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116 */
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117 .section "timer_hisr_stack","aw",%nobits
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118 .balign 4
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119
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120 INT_HISR_Stack_Mem:
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121
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122 .space HISR_STACK_SIZE
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123
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124 /*
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125 **********************************
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126 * LOCAL VARIABLE DECLARATIONS *
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127 **********************************
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128 */
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129 .text
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130
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131 @ Define various data structure pointers so their addresses can be obtained
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132 @ in a PC-relative manner.
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133
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134 HISR_Stack_Ptr:
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135 .word TMD_HISR_Stack_Ptr
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136
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137 HISR_Stack_Size:
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138 .word TMD_HISR_Stack_Size
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139
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140 HISR_Priority:
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141 .word TMD_HISR_Priority
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142
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143 System_Stack:
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144 .word TCD_System_Stack
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145
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146 System_Limit:
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147 .word TCT_System_Limit
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148
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149 System_Stk_Limit:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 .word INT_System_Stk_Limit
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 System_Stack_SP:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 .word INT_System_Stack_SP
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 IRQ_Stack_SP:
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 .word INT_IRQ_Stack_SP
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 FIQ_Stack_SP:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 .word INT_FIQ_Stack_SP
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 HISR_Stack_Mem:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 .word INT_HISR_Stack_Mem
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 First_Avail_Mem:
80
39b1c369b67f nuc-fw: links to an ELF image
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 79
diff changeset
165 .word _xram_end /* ld script will define this */
79
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 /*
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 ************************************************************************
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170 * FUNCTION
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 * INT_Initialize
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 * DESCRIPTION
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 *
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 * This function sets up the global system stack variable and
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 * transfers control to the target independent initialization
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 * function INC_Initialize. Responsibilities of this function
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 * include the following:
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 * - Setup necessary processor/system control registers
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 * - Initialize the vector table
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 * - Setup the system stack pointers
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 * - Setup the timer interrupt
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 * - Calculate the timer HISR stack and priority
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 * - Calculate the first available memory address
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 * - Transfer control to INC_Initialize to initialize all of
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 * the system components.
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 * Major Revision:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 * M. Kyle Craig, Accelerated Technology, Inc.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 * CALLED BY
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199 * Nothing. This function is the ENTRY point for Nucleus PLUS.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 * CALLS
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 * INC_Initialize Common initialization
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205 * INPUTS
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207 * None
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209 * OUTPUTS
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211 * None
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213 * HISTORY
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215 * NAME DATE REMARKS
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 * W. Lamie 08-27-1994 Created initial version 1.0
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 * D. Lamie 08-27-1994 Verified version 1.0
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 *
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 ************************************************************************
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221 */
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 @VOID INT_Initialize(void)
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224 @{
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226 .globl INT_Initialize
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 INT_Initialize:
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229 @ Insure that the processor is in supervisor mode.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230 MRS r0,CPSR @ Pickup current CPSR
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231 BIC r0,r0,#MODE_MASK @ Clear the mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232 ORR r0,r0,#SUP_MODE @ Set the supervisor mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233 ORR r0,r0,#LOCKOUT @ Insure IRQ/FIQ interrupts are
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234 @ locked out
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 MSR CPSR,r0 @ Setup the new CPSR
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 @ Initialize the system stack pointers. This is done after the BSS is
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 @ clear because the TCD_System_Stack pointer is a BSS variable! It is
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 @ assumed that available memory starts immediately after the end of the
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240 @ BSS section.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 LDR r10,System_Stk_Limit @ Pickup the system stack limit (bottom of system stack)
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 LDR r3,System_Limit @ Pickup sys stack limit addr
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 STR r10,[r3, #0] @ Save stack limit
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 LDR sp,System_Stack_SP @ Set-up the system stack pointer
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 LDR r3,System_Stack @ Pickup system stack address
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 STR sp,[r3, #0] @ Save stack pointer
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 MRS r0,CPSR @ Pickup current CPSR
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 BIC r0,r0,#MODE_MASK @ Clear the mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 ORR r0,r0,#IRQ_MODE @ Set the IRQ mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 MSR CPSR,r0 @ Move to IRQ mode
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 LDR sp,IRQ_Stack_SP @ Setup IRQ stack pointer
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 MRS r0,CPSR @ Pickup current CPSR
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 BIC r0,r0,#MODE_MASK @ Clear the mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 ORR r0,r0,#FIQ_MODE @ Set the FIQ mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 MSR CPSR,r0 @ Move to the FIQ mode
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 LDR sp,FIQ_Stack_SP @ Setup FIQ stack pointer
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263
313
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
264 @ set up abort and undef mode stacks - code from TI
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
265 MRS a1,CPSR @ Pickup current CPSR
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
266 BIC a1,a1,#MODE_MASK @ Clear the mode bits
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
267 ORR a1,a1,#ABORT_MODE @ Set the Abort mode bits
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
268 MSR CPSR,a1 @ Move to the Abort mode
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
269 LDR sp,=_Except_Stack_SP @ Setup Abort stack pointer
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
270
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
271 MRS a1,CPSR @ Pickup current CPSR
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
272 BIC a1,a1,#MODE_MASK @ Clear the mode bits
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
273 ORR a1,a1,#UNDEF_MODE @ Set the Undefined mode bits
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
274 MSR CPSR,a1 @ Move to the Undefined mode
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
275 LDR sp,=_Except_Stack_SP @ Setup Undefined stack pointer
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
276 @ (should never be used)
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
277
9df7f9c72e17 ARM exception handling: stack setup added
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 143
diff changeset
278 @ original Nucleus code continues
79
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 MRS r0,CPSR @ Pickup current CPSR
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 BIC r0,r0,#MODE_MASK @ Clear mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 ORR r0,r0,#SUP_MODE @ Set the supervisor mode bits
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 MSR CPSR,r0 @ All interrupt stacks are setup,
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 @ return to supervisor mode
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 @ Define the global data structures that need to be initialized by this
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 @ routine. These structures are used to define the system timer
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 @ management HISR.
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 @ TMD_HISR_Stack_Ptr = (VOID *) r2;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 @ TMD_HISR_Stack_Size = TIMER_SIZE;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 @ TMD_HISR_Priority = TIMER_PRIORITY;
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 LDR r2,HISR_Stack_Mem @ Get HISR stack memory address
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 LDR r3,HISR_Stack_Ptr @ Pickup variable's address
947b1f473960 beginning of nuc-fw
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 STR r2,[r3, #0] @ Setup timer HISR stack pointer
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295 MOV r1,#HISR_STACK_SIZE @ Pickup the timer HISR stack size
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296 LDR r3,HISR_Stack_Size @ Pickup variable's address
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297 STR r1,[r3, #0] @ Setup timer HISR stack size
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298 MOV r1,#HISR_PRIORITY @ Pickup timer HISR priority (0-2)
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299 LDR r3,HISR_Priority @ Pickup variable's address
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300 STR r1,[r3, #0] @ Setup timer HISR priority
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301
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302 @ Make a call to begin all board specific initialization.
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303 @ Begin with Initializing the Vector table and replacing
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304 @ default interrupts with Plus IRQs. Then setup the timer
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305 @ and begin the system clock.
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306
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307 @ FreeCalypso change: we are now using TI's code structure
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308 @ which handles the interrupts and the timers differently.
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309
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310 @ BL INT_Interrupt_Init @ Install the vector table
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311 @ BL INT_Timer_Initialize @ Initialize the timer
79
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312
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313 @ Call INC_Initialize with a pointer to the first available memory
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314 @ address after the compiler's global data. This memory may be used
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315 @ by the application.
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316 @ INC_Initialize(first_available_memory);
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317
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318 LDR r0,First_Avail_Mem @ Get address of first available memory
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319
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320 B INC_Initialize @ to high-level initialization
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321 @}