freecalypso-sw: nuc-fw/bsp/inth.h annotate

annotate nuc-fw/bsp/inth.h @ 102:7f75ffdd674f

pirexplore FFS: buglet fixed, works now

author	Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date	Mon, 02 Sep 2013 00:41:18 +0000
parents	45911ad957fd
children	91460c8957f0

rev	line source
93 45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 /*******************************************************************************
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 Property of Texas Instruments -- For Unrestricted Internal Use Only
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 Unauthorized reproduction and/or distribution is strictly prohibited. This
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 product is protected under copyright law and trade secret law as an
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 rights reserved.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11 Filename : inth.h
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 Description : Header file for the INTH module
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 Project : drivers
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	17 Author : pmonteil@tif.ti.com Patrice Monteil.
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	18
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	19 Version number : 1.10
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	20
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21 Date and time : 01/30/01 10:22:23
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	22
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23 Previous delta : 01/22/01 10:32:33
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.inth.h
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27 Sccs Id (SID) : '@(#) inth.h 1.10 01/30/01 10:22:23 '
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 *****************************************************************************/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 #include "../include/config.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 #include "../include/sys_types.h"
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 /* Adress of the registers */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9)\|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 #define INTH_IT_REG1 MEM_INTH_ADDR /* INTH IT register 1 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 #define INTH_IT_REG2 (MEM_INTH_ADDR + 0x02) /* INTH IT register 2 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 #define INTH_MASK_REG1 (MEM_INTH_ADDR + 0x08) /* INTH mask register 1 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 #define INTH_MASK_REG2 (MEM_INTH_ADDR + 0x0a) /* INTH mask register 2 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 #define INTH_B_IRQ_REG (MEM_INTH_ADDR + 0x10) /* INTH source binary IRQ reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 #define INTH_B_FIQ_REG (MEM_INTH_ADDR + 0x12) /* INTH source binary FIQ reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 #define INTH_CTRL_REG (MEM_INTH_ADDR + 0x14) /* INTH control register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45 #define INTH_EXT_REG (MEM_INTH_ADDR + 0x20) /* INTH 1st external int. reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 #define INTH_IT_REG MEM_INTH_ADDR /* INTH IT register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 #define INTH_MASK_REG (MEM_INTH_ADDR + 0x02) /* INTH mask register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49 #define INTH_S_IRQ_REG (MEM_INTH_ADDR + 0x04) /* INTH source IRQ register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 #define INTH_S_FIQ_REG (MEM_INTH_ADDR + 0x06) /* INTH source FIQ register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 #define INTH_B_IRQ_REG (MEM_INTH_ADDR + 0x08) /* INTH source binary IRQ reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 #define INTH_B_FIQ_REG (MEM_INTH_ADDR + 0x0a) /* INTH source binary FIQ reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53 #define INTH_CTRL_REG (MEM_INTH_ADDR + 0x0c) /* INTH control register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 #define INTH_EXT_REG (MEM_INTH_ADDR + 0x0e) /* INTH 1st external int. reg. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57 /* Interrupts number */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 #define INTH_TIMER 0 /* number of the TIMER int. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60 #define INTH_AIRQ_FIRST 1 /* first external int. number */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61 #define INTH_AIRQ_LAST 13 /* last external int. number */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62 #define INTH_DMA 14 /* number of the DMA int. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 #define INTH_LEAD 15 /* number of the LEAD int. */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 /* Bit definition of INTH interrupt level registers */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 #define INTH_FIQ_NIRQ 0x0001
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69 #define INTH_PRIORITY 0x007c
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70 #define INTH_EDGE_NLVL 0x0002
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72 #define INTH_PRIORITY 0x001e
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73 #define INTH_EDGE_NLVL 0x0020
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	75
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	76
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	77 /* Bit definition of INTH source binary registers */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	78
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	80 #define INTH_SRC_NUM 0x001f
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	81 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	82 #define INTH_SRC_NUM 0x000f
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	84
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	86 /* Bit definition of INTH Control Register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88 #define INTH_NEW_IRQ_AGR 0x0001
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89 #define INTH_NEW_FIQ_AGR 0x0002
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	90
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91 /* Other useful constants */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 #define INTH_IRQ 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	94 #define INTH_FIQ 1
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	95 #define INTH_LEVEL 0
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 #define INTH_EDGE 1
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	98 /*
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	99 * Macros
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	100 */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102 #define INT_MASK(interrupt) (1 << (interrupt - 1))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 #define PENDING_INT(pendingITs, interrupt) (pendingITs & INT_MASK(interrupt))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 /* INTH_ENABLEONEIT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 /* Parameters : num of the IT to enable */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	110 /* Functionality : Unmask one it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	111 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	112 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	113 #define INTH_ENABLEONEIT(it)( \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 &= ~(1 << it)) : \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 (* (volatile unsigned short *) INTH_MASK_REG2 &= ~(1 << (it-16))) \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	116 )
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 #define INTH_ENABLEONEIT(it)(* (volatile unsigned short *) INTH_MASK_REG &= ~(1 << it))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	120
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	121 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 /* INTH_DISABLEONEIT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	123 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	124 /* Parameters : num of the IT to disable */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	125 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	126 /* Functionality : mask one it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	127 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	128 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	129 #define INTH_DISABLEONEIT(it)( \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	130 (it < 16) ? (* (volatile unsigned short *) INTH_MASK_REG1 \|= (1 << it)) : \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	131 (* (volatile unsigned short *) INTH_MASK_REG2 \|= (1 << (it-16))) \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	132 )
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	133 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	134 #define INTH_DISABLEONEIT(it)(* (volatile unsigned short *) INTH_MASK_REG \|= (1 << it))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	135 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	138 /* INTH_ENABLEALLIT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140 /* Parameters : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	142 /* Functionality : Enable all it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	143 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	146 #define INTH_ENABLEALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147 * (volatile unsigned short *) INTH_MASK_REG1 = 0x0000; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	148 * (volatile unsigned short *) INTH_MASK_REG2 = 0x0000; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	150 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	151 #define INTH_ENABLEALLIT ( * (volatile unsigned short *) INTH_MASK_REG = 0x0000)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	152 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	153
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	154 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	155 /* INTH_DISABLEALLIT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	156 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	157 /* Parameters : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	158 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	159 /* Functionality :mask all it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	160 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	161
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	162 #if (CHIPSET == 4)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	163 #define INTH_DISABLEALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	164 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	165 * (volatile unsigned short *) INTH_MASK_REG2 = 0x000f; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	166 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	167 #elif ((CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 9))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	168 #define INTH_DISABLEALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	169 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	170 * (volatile unsigned short *) INTH_MASK_REG2 = 0x01ff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	171 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	172 #elif (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	173 #define INTH_DISABLEALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	174 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	175 * (volatile unsigned short *) INTH_MASK_REG2 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	176 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	177 #elif (CHIPSET == 12)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	178 #define INTH_DISABLEALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	179 * (volatile unsigned short *) INTH_MASK_REG1 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	180 * (volatile unsigned short *) INTH_MASK_REG2 = 0xffff; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	181 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	182 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	183 #define INTH_DISABLEALLIT (* (volatile unsigned short *) INTH_MASK_REG = 0xffff)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	184 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	185
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	186 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	187 /* INTH_CLEAR() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	188 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	189 /* Parameters : value to write */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	190 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	191 /* Functionality :valid next it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	192 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	193
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	194 #define INTH_CLEAR (* (volatile SYS_UWORD16 *) INTH_CTRL_REG = 0x0003)
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	195
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	196
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	197 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	198 /* INTH_VALIDNEXT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	199 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	200 /* Parameters : num of the processed it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	201 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	202 /* Functionality :valid next it */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	203 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	204
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	205 #define INTH_VALIDNEXT (intARM)( * (volatile SYS_UWORD16 *) INTH_CTRL_REG \|= (1 << intARM))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	206
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	207 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	208 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	209 /* INTH_RESETALLIT() */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	210 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	211 /* Parameters : None */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	212 /* Return : none */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	213 /* Functionality :Reset the inth it register */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	214 /--------------------------------------------------------------/
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	215
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	216 #define INTH_RESETALLIT { \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	217 * (volatile unsigned short *) INTH_IT_REG1 &= 0x0000; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	218 * (volatile unsigned short *) INTH_IT_REG2 &= 0x0000; \
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	219 }
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	220 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	221
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	222 /* Prototypes */
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	223
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	224 #if ((CHIPSET == 4) \|\| (CHIPSET == 5) \|\| (CHIPSET == 6) \|\| (CHIPSET == 7) \|\| (CHIPSET == 8) \|\| (CHIPSET == 9) \|\| (CHIPSET == 10) \|\| (CHIPSET == 11) \|\| (CHIPSET == 12))
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	225 unsigned long INTH_GetPending (void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	226 unsigned long INTH_ResetIT (void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	227 #else
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	228 unsigned short INTH_GetPending (void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	229 unsigned short INTH_ResetIT (void);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	230 #endif
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	231
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	232 unsigned short INTH_Ack (int);
45911ad957fd nuc-fw: beginning to integrate TI's BSP code Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	233 void INTH_InitLevel (int, int, int, int);

FreeCalypso > hg > freecalypso-sw

annotate nuc-fw/bsp/inth.h @ 102:7f75ffdd674f