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annotate gsm-fw/sysglue/sysinit.S @ 582:81753f5e902e

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tpudrv12.c: l1dmacro_RF_sleep() and l1dmacro_RF_wakeup() done
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Fri, 15 Aug 2014 19:25:58 +0000
parents e201f2130c9b
children 7cf154cd3891
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1 /*
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2 * This assembly module, which puts bits of code into several different
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3 * sections, contains those essential entry point etc bits which are common
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4 * to both the regular flashable build and the fc-xram development build.
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5 */
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6
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7 .section iram.vectors,"ax",%progbits
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8 .code 32
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9 /* ARM exceptions */
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10 b _arm_undefined
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11 b _arm_swi
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12 b _arm_abort_prefetch
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13 b _arm_abort_data
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14 b _arm_reserved
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15 /* IRQ */
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16 b _INT_IRQ
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17 /* FIQ */
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18 b _INT_FIQ
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19
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20 .section xip.text,"ax",%progbits
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21 .code 32
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22 .globl _FlashorXram_entry
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23 _FlashorXram_entry:
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24 /* first order of business: copy iram.text to where it's supposed to be */
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25 ldr r8, =__iramtext_flash_addr
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26 ldr r9, =__iramtext_ram_addr
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27 ldr r10, =__iramtext_size
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28 1: ldmia r8!, {r0-r7}
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29 stmia r9!, {r0-r7}
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30 subs r10, r10, #0x20
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31 bhi 1b
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32 /* enable Calypso boot ROM for the ARM exception and IRQ/FIQ vectors */
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33 ldr r1, =0xFFFFFB10
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34 mov r2, #0x0100
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35 strh r2, [r1]
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36 /* now we can call any function w/o worry as to where it lives */
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37 /* clear int.bss and ext.bss, using bzero() from libc */
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38 ldr r0, =__intbss_start
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39 ldr r1, =__intbss_size
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40 bl bzero
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41 ldr r0, =__extbss_start
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42 ldr r1, =__extbss_size
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43 bl bzero
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44 /* we can start Nucleus now! */
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45 b INT_Initialize
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46
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47 /*
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48 * riviera/support/exception.c references exit()
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49 * The following kludge will allow us to pass the link for the time being
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50 * until we can find a better solution, such as hooking into DAR maybe.
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51 */
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52
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53 .globl exit
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54 exit:
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55 b .