FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/include/l1_signa.h @ 1012:93f4fc26b204
fc-shell: arbitrary send command implemented in one-shot mode
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sun, 20 Mar 2016 22:06:11 +0000 |
parents | 25a7fe25864c |
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rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_SIGNA.H |
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4 * |
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5 * Filename l1_signa.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 |
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10 #define P_L1C 0 |
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11 #define P_DLL ( P_L1C + 1 ) |
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12 |
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13 #if ((REL99 == 1) && (FF_BHO == 1)) |
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14 #define P_MSB P_L1C |
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15 #define P_SHIFT1 8 |
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16 #define P_SHIFT2 0 |
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17 #define P_MPHC_UL 0 |
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18 #define P_MPHC_DL 0 |
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19 #endif |
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20 |
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21 // Messages Test/PWRMNGT <-> L1A |
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22 |
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23 /* Message used for software dynamic configuration */ |
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24 #define TST_SW_CONFIG_REQ ( ( P_L1C << 8 ) | 117) |
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25 |
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26 #if (OP_L1_STANDALONE == 1) |
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27 /* Message used for hardware dynamic configuration */ |
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28 #define TST_HW_CONFIG_REQ ( ( P_L1C << 8 ) | 116) |
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29 #endif |
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30 |
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31 #define TST_TEST_HW_REQ ( ( P_L1C << 8 ) | 1 ) // build: trigger |
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32 #define TST_TEST_HW_CON ( ( P_L1C << 8 ) | 2 ) |
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33 #define TST_TIMESTAMP_MSG ( ( P_L1C << 8 ) | 3 ) // build: trigger |
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34 #define TST_SLEEP_REQ ( ( P_L1C << 8 ) | 4 ) // build: T_TST_SLEEP_REQ |
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35 |
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36 |
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37 // Messages L3 <-> L1A |
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38 #define MPHC_RXLEV_REQ ( ( P_L1C << 8 ) | 11 ) // build: T_FULL_LIST_MEAS |
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39 #define MPHC_RXLEV_IND ( ( P_L1C << 8 ) | 12 ) |
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40 |
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41 #define MPHC_STOP_RXLEV_REQ ( ( P_L1C << 8 ) | 13 ) // build: trigger |
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42 #define MPHC_STOP_RXLEV_CON ( ( P_L1C << 8 ) | 14 ) |
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43 |
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44 #define MPHC_NETWORK_SYNC_REQ ( ( P_L1C << 8 ) | 15 ) // build: T_MPHC_NETWORK_SYNC_REQ |
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45 #define MPHC_NETWORK_SYNC_IND ( ( P_L1C << 8 ) | 16 ) |
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46 |
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47 #define MPHC_STOP_NETWORK_SYNC_REQ ( ( P_L1C << 8 ) | 17 ) // build: trigger |
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48 #define MPHC_STOP_NETWORK_SYNC_CON ( ( P_L1C << 8 ) | 18 ) |
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49 |
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50 #define MPHC_NEW_SCELL_REQ ( ( P_L1C << 8 ) | 19 ) // build: T_MPHC_NEW_SCELL_REQ |
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51 #define MPHC_NEW_SCELL_CON ( ( P_L1C << 8 ) | 20 ) |
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52 |
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53 #define MPHC_START_CCCH_REQ ( ( P_L1C << 8 ) | 21 ) // build: T_MPHC_START_CCCH_REQ |
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54 #define MPHC_STOP_CCCH_REQ ( ( P_L1C << 8 ) | 22 ) // build: trigger |
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55 #define MPHC_STOP_CCCH_CON ( ( P_L1C << 8 ) | 23 ) |
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56 |
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57 #define MPHC_SCELL_NBCCH_REQ ( ( P_L1C << 8 ) | 24 ) // build: T_MPHC_SCELL_NBCCH_REQ |
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58 #define MPHC_SCELL_EBCCH_REQ ( ( P_L1C << 8 ) | 25 ) // build: T_MPHC_SCELL_EBCCH_REQ |
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59 #define MPHC_STOP_SCELL_BCCH_REQ ( ( P_L1C << 8 ) | 26 ) // build: trigger |
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60 #define MPHC_STOP_SCELL_BCCH_CON ( ( P_L1C << 8 ) | 27 ) |
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61 |
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62 #define MPHC_NCELL_BCCH_REQ ( ( P_L1C << 8 ) | 28 ) // build: T_MPHC_NCELL_BCCH_REQ |
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63 #define MPHC_NCELL_BCCH_IND ( ( P_L1C << 8 ) | 29 ) |
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64 #define MPHC_STOP_NCELL_BCCH_REQ ( ( P_L1C << 8 ) | 30 ) // build: T_MPHC_STOP_NCELL_BCCH_REQ |
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65 #define MPHC_STOP_NCELL_BCCH_CON ( ( P_L1C << 8 ) | 31 ) |
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66 |
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67 #define MPHC_NCELL_SYNC_REQ ( ( P_L1C << 8 ) | 32 ) // build: T_MPHC_NCELL_SYNC_REQ |
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68 #define MPHC_NCELL_SYNC_IND ( ( P_L1C << 8 ) | 33 ) |
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69 #define MPHC_STOP_NCELL_SYNC_REQ ( ( P_L1C << 8 ) | 34 ) // build: T_MPHC_STOP_NCELL_SYNC_REQ |
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70 #define MPHC_STOP_NCELL_SYNC_CON ( ( P_L1C << 8 ) | 35 ) |
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71 |
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72 #define MPHC_RXLEV_PERIODIC_REQ ( ( P_L1C << 8 ) | 36 ) // build: T_MPHC_RXLEV_PERIODIC_REQ |
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73 #define MPHC_RXLEV_PERIODIC_IND ( ( P_L1C << 8 ) | 37 ) |
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74 #define MPHC_STOP_RXLEV_PERIODIC_REQ ( ( P_L1C << 8 ) | 38 ) // build: trigger |
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75 #define MPHC_STOP_RXLEV_PERIODIC_CON ( ( P_L1C << 8 ) | 39 ) |
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76 |
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77 #define MPHC_CONFIG_CBCH_REQ ( ( P_L1C << 8 ) | 40 ) // build: T_MPHC_CONFIG_CBCH_REQ |
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78 #define MPHC_CBCH_SCHEDULE_REQ ( ( P_L1C << 8 ) | 41 ) // build: T_MPHC_CBCH_SCHEDULE_REQ |
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79 #define MPHC_CBCH_UPDATE_REQ ( ( P_L1C << 8 ) | 42 ) // build: T_MPHC_CBCH_UPDATE_REQ |
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80 #define MPHC_CBCH_INFO_REQ ( ( P_L1C << 8 ) | 43 ) // build: T_MPHC_CBCH_INFO_REQ |
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81 #define MPHC_STOP_CBCH_REQ ( ( P_L1C << 8 ) | 44 ) // build: T_MPHC_STOP_CBCH_REQ |
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82 #define MPHC_STOP_CBCH_CON ( ( P_L1C << 8 ) | 45 ) |
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83 |
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84 #define MPHC_RA_REQ ( ( P_L1C << 8 ) | 46 ) // build: T_MPHC_RA_REQ |
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85 #define MPHC_RA_CON ( ( P_L1C << 8 ) | 47 ) |
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86 |
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87 #define MPHC_STOP_RA_REQ ( ( P_L1C << 8 ) | 48 ) // build: trigger |
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88 #define MPHC_STOP_RA_CON ( ( P_L1C << 8 ) | 49 ) |
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89 |
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90 #define MPHC_DATA_IND ( ( P_L1C << 8 ) | 50 ) |
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91 |
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92 #define MPHC_IMMED_ASSIGN_REQ ( ( P_L1C << 8 ) | 51 ) // build: T_MPHC_IMMED_ASSIGN_REQ |
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93 #define MPHC_CHANNEL_ASSIGN_REQ ( ( P_L1C << 8 ) | 52 ) // build: T_MPHC_CHANNEL_ASSIGN_REQ |
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94 #define MPHC_ASYNC_HO_REQ ( ( P_L1C << 8 ) | 53 ) // build: T_MPHC_ASYNC_HO_REQ |
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95 #define MPHC_SYNC_HO_REQ ( ( P_L1C << 8 ) | 54 ) // build: T_MPHC_SYNC_HO_REQ |
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96 #define MPHC_PRE_SYNC_HO_REQ ( ( P_L1C << 8 ) | 55 ) // build: T_MPHC_PRE_SYNC_HO_REQ |
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97 #define MPHC_PSEUDO_SYNC_HO_REQ ( ( P_L1C << 8 ) | 56 ) // build: T_MPHC_PSEUDO_SYNC_HO_REQ |
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98 #define MPHC_STOP_DEDICATED_REQ ( ( P_L1C << 8 ) | 57 ) // build: trigger |
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99 #define MPHC_STOP_DEDICATED_CON ( ( P_L1C << 8 ) | 128 ) // build: trigger |
115
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100 |
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101 #define MPHC_CHANGE_FREQUENCY_CON ( ( P_L1C << 8 ) | 58 ) |
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102 #define MPHC_ASYNC_HO_CON ( ( P_L1C << 8 ) | 59 ) |
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103 #define MPHC_CHANNEL_ASSIGN_CON ( ( P_L1C << 8 ) | 60 ) |
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104 #define MPHC_CHANNEL_MODE_MODIFY_CON ( ( P_L1C << 8 ) | 61 ) |
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105 #define MPHC_HANDOVER_FAIL_CON ( ( P_L1C << 8 ) | 62 ) |
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106 #define MPHC_IMMED_ASSIGN_CON ( ( P_L1C << 8 ) | 63 ) |
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107 #define MPHC_PRE_SYNC_HO_CON ( ( P_L1C << 8 ) | 64 ) |
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108 #define MPHC_SET_CIPHERING_CON ( ( P_L1C << 8 ) | 65 ) |
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109 #define MPHC_SYNC_HO_CON ( ( P_L1C << 8 ) | 66 ) |
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110 #define MPHC_TA_FAIL_IND ( ( P_L1C << 8 ) | 67 ) |
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111 |
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112 #define MPHC_HANDOVER_FINISHED ( ( P_L1C << 8 ) | 68 ) |
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113 |
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114 #define MPHC_CHANGE_FREQUENCY ( ( P_L1C << 8 ) | 69 ) // build: T_MPHC_CHANGE_FREQUENCY |
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115 #define MPHC_CHANNEL_MODE_MODIFY_REQ ( ( P_L1C << 8 ) | 70 ) // build: T_MPHC_CHANNEL_MODE_MODIFY_REQ |
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116 #define MPHC_HANDOVER_FAIL_REQ ( ( P_L1C << 8 ) | 71 ) // build: trigger |
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117 #define MPHC_SET_CIPHERING_REQ ( ( P_L1C << 8 ) | 72 ) // build: T_MPHC_SET_CIPHERING_REQ |
115
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118 |
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119 #define MPHC_MEAS_REPORT ( ( P_L1C << 8 ) | 73 ) // build: T_MPHC_MEAS_REPORT |
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120 #define MPHC_UPDATE_BA_LIST ( ( P_L1C << 8 ) | 74 ) // build: T_NEW_BA_LIST |
115
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121 |
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122 #define MPHC_NCELL_FB_SB_READ ( ( P_L1C << 8 ) | 75 ) // build: T_MPHC_NCELL_FB_SB_READ |
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123 #define MPHC_NCELL_SB_READ ( ( P_L1C << 8 ) | 76 ) // build: T_MPHC_NCELL_SB_READ |
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124 #define MPHC_NCELL_BCCH_READ ( ( P_L1C << 8 ) | 77 ) // build: T_MPHC_NCELL_BCCH_READ |
115
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125 |
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126 // Messages L1S -> L1A |
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127 #define L1C_VALID_MEAS_INFO ( ( P_L1C << 8 ) | 80 ) |
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128 #define L1C_FB_INFO ( ( P_L1C << 8 ) | 81 ) |
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129 #define L1C_SB_INFO ( ( P_L1C << 8 ) | 82 ) |
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130 #if ((REL99 == 1) && (FF_BHO == 1)) |
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131 #define L1C_FBSB_INFO ( ( ( ( P_MSB << P_SHIFT1 ) | 118 ) << P_SHIFT2 ) | P_MPHC_DL ) |
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132 #endif |
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133 #define L1C_SBCONF_INFO ( ( P_L1C << 8 ) | 83 ) |
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134 #define L1C_BCCHS_INFO ( ( P_L1C << 8 ) | 84 ) |
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135 #define L1C_BCCHN_INFO ( ( P_L1C << 8 ) | 85 ) |
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136 #define L1C_NP_INFO ( ( P_L1C << 8 ) | 86 ) |
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137 #define L1C_EP_INFO ( ( P_L1C << 8 ) | 87 ) |
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138 #define L1C_ALLC_INFO ( ( P_L1C << 8 ) | 88 ) |
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139 #define L1C_RXLEV_PERIODIC_DONE ( ( P_L1C << 8 ) | 89 ) |
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140 #define L1C_CB_INFO ( ( P_L1C << 8 ) | 90 ) |
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141 #define L1C_RA_DONE ( ( P_L1C << 8 ) | 91 ) |
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142 #define L1C_SACCH_INFO ( ( P_L1C << 8 ) | 92 ) |
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143 #define L1C_MEAS_DONE ( ( P_L1C << 8 ) | 93 ) |
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144 #define L1C_DEDIC_DONE ( ( P_L1C << 8 ) | 94 ) |
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145 #define L1C_HANDOVER_FINISHED ( ( P_L1C << 8 ) | 95 ) |
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146 #define L1C_REDEF_DONE ( ( P_L1C << 8 ) | 96 ) |
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147 #define L1C_STOP_DEDICATED_DONE ( ( P_L1C << 8 ) | 129 ) |
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148 |
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149 // Messages O&M <-> L1A |
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150 #define OML1_CLOSE_TCH_LOOP_REQ ( ( P_L1C << 8 ) | 97 ) // build: T_OML1_CLOSE_TCH_LOOP_REQ |
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151 #define OML1_OPEN_TCH_LOOP_REQ ( ( P_L1C << 8 ) | 98 ) // build: trigger |
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152 #define OML1_START_DAI_TEST_REQ ( ( P_L1C << 8 ) | 99 ) // build: T_OML1_START_DAI_TEST_REQ |
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153 #define OML1_STOP_DAI_TEST_REQ ( ( P_L1C << 8 ) | 100 ) // build: trigger |
115
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154 |
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155 #define OML1_CLOSE_TCH_LOOP_CON ( ( P_L1C << 8 ) | 101 ) |
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156 #define OML1_OPEN_TCH_LOOP_CON ( ( P_L1C << 8 ) | 102 ) |
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157 #define OML1_START_DAI_TEST_CON ( ( P_L1C << 8 ) | 103 ) |
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158 #define OML1_STOP_DAI_TEST_CON ( ( P_L1C << 8 ) | 104 ) |
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159 |
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160 |
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161 // Message Custom I/F <- L1S |
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162 #define CST_ADC_RESULT ( ( P_L1C << 8 ) | 105 ) |
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163 |
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164 |
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165 // Messages for trace |
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166 #define L1_STATS_REQ ( ( P_L1C << 8 ) | 107 ) // build: T_L1_STATS_REQ |
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167 #define L1_DUMMY_FOR_SIM ( ( P_L1C << 8 ) | 108 ) // build: trigger |
115
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168 |
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169 #define TRACE_DSP_DEBUG ( ( P_L1C << 8 ) | 106 ) |
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170 #define TRACE_CONFIG ( ( P_L1C << 8 ) | 123 ) |
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171 #define TRACE_CONDENSED_PDTCH ( ( P_L1C << 8 ) | 124 ) |
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172 #define TRACE_INFO ( ( P_L1C << 8 ) | 125 ) |
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173 #define QUICK_TRACE ( ( P_L1C << 8 ) | 126 ) |
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174 #define TRACE_DSP_AMR_DEBUG ( ( P_L1C << 8 ) | 127 ) |
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175 |
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176 #define MPHC_NETWORK_LOST_IND ( ( P_L1C << 8 ) | 110 ) // build: trigger |
115
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177 |
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178 // Messages MMI <-> L1A |
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179 #define MMI_ADC_REQ ( ( P_L1C << 8 ) | 111 ) // build: T_MMI_ADC_REQ |
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180 #define MMI_STOP_ADC_REQ ( ( P_L1C << 8 ) | 112 ) // build: trigger |
115
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181 #define MMI_STOP_ADC_CON ( ( P_L1C << 8 ) | 113 ) |
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182 |
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183 #define L1_TEST_HW_INFO ( ( P_L1C << 8 ) | 119 ) |
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184 |
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185 // Multi-band selection E-GSM900/DCS1800/PCS1900/GSM850 |
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186 #define MPHC_INIT_L1_REQ ( ( P_L1C << 8 ) | 114 ) // build: T_MPHC_INIT_L1_REQ |
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187 #define MPHC_INIT_L1_CON ( ( P_L1C << 8 ) | 115 ) |
115
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188 |
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189 // Message RR -> L1A for Enhanced meas. |
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190 #if (L1_12NEIGH ==1) |
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191 #define MPHC_NCELL_LIST_SYNC_REQ ( ( P_L1C << 8 ) | 122 ) // build: T_MPHC_NCELL_LIST_SYNC_REQ |
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192 #endif |
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193 |
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194 // Messages L2 <-> L1A |
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195 #define PH_DATA_IND ( ( P_DLL << 8 ) | 109 ) |
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196 |