annotate gsm-fw/L1/cfile/l1_pwmgr.c @ 544:96a96ec34139

gsm-fw/L1/cfile: initial import from LoCosto source
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 03 Aug 2014 06:06:45 +0000
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children 67ab5f240b7d
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_PWMGR.C
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4 *
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5 * Filename l1_pwmgr.c
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9 // pinghua add these programe code section to put some sleep code into internal ram.
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10 #pragma CODE_SECTION(l1s_sleep_manager,".emifconf")
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11 #pragma CODE_SECTION(EMIF_SetConfReg,".emifconf")
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12 #pragma CODE_SECTION(audio_madc_sleep,".emifconf")
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13 #pragma CODE_SECTION(Check_Peripheral_App,".emifconf")
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14 #pragma CODE_SECTION(DBB_Configure_DS,".emifconf")
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15 #pragma CODE_SECTION(DBB_Wakeup_DS,".emifconf")
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16 #pragma CODE_SECTION(l1ctl_pgm_clk32,".emifconf")
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17 #pragma CODE_SECTION(l1ctl_gauging,".emifconf")
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18 #pragma CODE_SECTION(GAUGING_Handler,".emifconf")
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19 #pragma CODE_SECTION(l1s_get_HWTimers_ticks,".emifconf")
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20 #pragma CODE_SECTION(l1s_adapt_traffic_controller,".emifconf")
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21 #pragma CODE_SECTION(l1s_wakeup,".emifconf")
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22 #pragma CODE_SECTION(l1s_wakeup_adjust,".emifconf")
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23 #pragma CODE_SECTION(l1s_compute_wakeup_ticks,".emifconf")
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24 #pragma CODE_SECTION(l1s_recover_Frame,".emifconf")
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25 #pragma CODE_SECTION(l1s_recover_HWTimers,".emifconf")
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26 #pragma CODE_SECTION(l1s_get_next_gauging_in_Packet_Idle,".emifconf")
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27 #pragma CODE_SECTION(l1s_gauging_decision_with_PNP,".emifconf")
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28 #pragma CODE_SECTION(l1s_gauging_decision_with_NP,".emifconf")
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29 #pragma CODE_SECTION(l1s_gauging_task,".emifconf")
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30 #pragma CODE_SECTION(l1s_gauging_task_end,".emifconf")
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31 // 2-03-2007 pinghua added end
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32 #define L1_PWMGR_C
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33 //#pragma DUPLICATE_FOR_INTERNAL_RAM_START
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34
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35 //sajal added .....................................
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36 #if (CODE_VERSION == SIMULATION)
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37 //#include "l1_pwmgr.h"
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38 //omaps00090550 #303 warning removal typedef unsigned char UWORD_8;
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39
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40 // typedef volatile unsigned short REG_UWORD16; //omaps00090550
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41 // #define REG16(A) (*(REG_UWORD16*)(A)) //omaps00090550
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42 // typedef volatile unsigned short REGISTER_UWORD16; //omaps00090550
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43
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44 #define MAP_ULPD_REG 0xFFFE2000 //ULPD registers start address (CS4)
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45 #define ULPD_SETUP_CLK13_REG (*(REGISTER_UWORD16*)((REGISTER_UWORD16 *)(MAP_ULPD_REG) + 14))
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46 #define ULPD_SETUP_SLICER_REG (*(REGISTER_UWORD16*)((REGISTER_UWORD16 *)(MAP_ULPD_REG) + 15))
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47 #define ULPD_SETUP_VTCXO_REG (*(REGISTER_UWORD16*)((REGISTER_UWORD16 *)(MAP_ULPD_REG) + 16))
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48
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49 #define MAP_CLKM_REG 0xFFFFFD00 //CLOCKM registers start address (CS31)
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50 #define CLKM_CNTL_CLK_OFFSET 0x02
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51 #define CLKM_CNTL_CLK_REG REG16 (MAP_CLKM_REG + CLKM_CNTL_CLK_OFFSET)
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52
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53 #define EMIF_CONFIG_PWD_POS 0
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54 #define EMIF_CONFIG_PDE_POS 1
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55 #define EMIF_CONFIG_PREFETCH_POS 3
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56 #define EMIF_CONFIG_FLUSH_PREFETCH_POS 5
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57 #define EMIF_CONFIG_WP_POS 6
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58
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59 #define EMIF_CONFIG REG16(EMIF_CONFIG_BASE_ADDR+EMIF_CONFIG_REG_OFFSET)
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60 #define EMIF_CONFIG_BASE_ADDR 0xFFFFFB00 //External Memory inter registers address (CS31) (NEW)
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61 #define EMIF_CONFIG_REG_OFFSET 0x02 // Emif configuration register
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62
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63 #endif
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64 //sajal added till here......
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65
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66
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67
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68 #include "timer/timer2.h"
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69 #include "armio/armio.h"
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70
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71 //omaps00090550 #include "l1_macro.h"
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72 #include "l1_confg.h"
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73
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74 #if (OP_L1_STANDALONE == 1)
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75 #include "uart/serialswitch_core.h"
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76 #else
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77 #include "uart/serialswitch.h"
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78 #endif
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79
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80 #if (OP_L1_STANDALONE == 0)
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81 #include "sim/sim.h"
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82 #include "rv_swe.h"
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83 #endif
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84
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85
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86 #if (CODE_VERSION == SIMULATION)
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87 #include "l1_types.h"
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88 #include "l1_const.h"
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89
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90 #if (CHIPSET == 12) || (CHIPSET == 15)
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91 #include "inth/sys_inth.h"
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92 #include "sys_dma.h"
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93 #include "ulpd.h"
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94 #include "clkm.h"
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95
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96 // typedef volatile unsigned short REG_UWORD16; //omaps00090550
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97 #define REG16(A) (*(REG_UWORD16*)(A))
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98
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99 #else
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100 #include "inth/iq.h"
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101 #endif
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102
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103 #if TESTMODE
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104 #include "l1tm_defty.h"
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105 #endif // TESTMODE
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106
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107 #if (AUDIO_TASK == 1)
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108 #include "l1audio_const.h"
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109 #include "l1audio_cust.h"
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110 #include "l1audio_defty.h"
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111 #endif // AUDIO_TASK
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112
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113 #if (L1_GTT == 1)
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114 #include "l1gtt_const.h"
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115 #include "l1gtt_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 #if (L1_MP3 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 #include "l1mp3_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122 #if (L1_MIDI == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123 #include "l1midi_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 //ADDED FOR AAC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 #if (L1_AAC == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 #include "l1aac_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 #include "l1_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 #include "l1_varex.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 #include "l1_tabs.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 #include "cust_os.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 #include "l1_msgty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 #include "l1_proto.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 #include "ulpd.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136 #include "l1_trace.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #include "l1p_cons.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 #include "l1p_msgt.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 #include "l1p_deft.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 #include "l1p_vare.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 #endif // L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145 #include <stdio.h>
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 #include "sim_cfg.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 #include "sim_cons.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 #include "sim_def.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 #include "sim_var.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151 #include "nucleus.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 extern NU_TASK L1S_task;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 STATUS status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #else // NO SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 #include "l1_types.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 #include "l1_const.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 #include "abb/abb.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 #include "dma/sys_dma.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 #include "hci_ll_simul.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 #if TESTMODE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 #include "l1tm_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 #endif // TESTMODE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 #if (AUDIO_TASK == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 #include "l1audio_const.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 #include "l1audio_cust.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 #include "l1audio_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 #endif // AUDIO_TASK
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 #if (L1_GTT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 #include "l1gtt_const.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 #include "l1gtt_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 #if (L1_MP3 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 #include "l1mp3_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 #if (L1_MIDI == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 #include "l1midi_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 //ADDED FOR AAC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 #if (L1_AAC == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 #include "l1aac_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
198 #include "l1_defty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
199 #include "l1_varex.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
200 #include "l1_tabs.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
201 #include "sys_types.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
202 #include "tpudrv.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
203 #include "cust_os.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
204 #include "l1_msgty.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
205 #include "l1_proto.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
206 #include "l1_trace.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
207 #include "timer/timer.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
208
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
209
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
210 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
211 #include "timer/timer_sec.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
212 #include "inth/sys_inth.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
213
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
214
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
215
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
216 #if(CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
217 #include "l1_pwmgr.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
218 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
219 #include "lcc/lcc_api.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
220 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
221
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
222 /* If NAND is enabled */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
223 #if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
224 unsigned int temp_NAND_Reg1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
225 unsigned int temp_NAND_Reg2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
226 unsigned int temp_NAND_Reg3;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
227 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
228
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
229
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
230
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
231
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
232
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
233 #if (OP_L1_STANDALONE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
234
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
235 const t_peripheral_interface Peripheral_interface [MAX_PERIPHERAL]=
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
236 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
237 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
238 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
239 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
240 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
241 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
242 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
243 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
244 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
245 madc_outen_check, /* MADC_AS_ID = 8 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
246 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
247 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
248 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
249 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
250 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
251 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
252 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
253 };
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
254
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
255 const t_application_interface Application_interface [MAX_APPLICATIONS] =
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
256 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
257 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
258 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
259 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
260 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
261 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
262 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
263 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
264 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
265 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
266 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
267 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
268 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
269 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
270 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
271 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
272 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
273 };
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
274 #else // For integrated Build
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
275 const t_peripheral_interface Peripheral_interface [MAX_PERIPHERAL]=
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
276 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
277 uart_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
278 #ifdef RVM_USB_SWE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
279 usb_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
280 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
281 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
282 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
283 usim_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
284 i2c_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
285 lcd_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
286 #ifdef RVM_CAMD_SWE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
287 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
288 camera_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
289 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
290 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
291 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
292 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
293 backlight_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
294 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
295 audio_madc_sleep, /* MADC_AS_ID = 8 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
296 lcc_pwr_interface,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 f_peripheral_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 };
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305 const t_application_interface Application_interface [MAX_APPLICATIONS] =
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307 #ifdef BTS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 BTHAL_PM_HandleSleepManagerReq,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327 f_application_interface_dummy,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 };
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331 #endif // (OP_L1_STANDALONE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 #endif // omaps00090550 #14 -d removal (CHIPSET = 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 #else //(CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337 #include "inth/iq.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 #include "inth/inth.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 // #include "timer1.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341 #include "ulpd/ulpd.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 #include "clkm/clkm.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 #include "memif/mem.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344 #if L2_L3_SIMUL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 #include "hw_debug.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
347
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
349 #include "csmi/sleep.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
350 #endif // OP_WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
351 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 #include "sys_memif.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
353 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
354
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 #if (OP_L1_STANDALONE == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357 #include "csmi_simul.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 #include "csmi/csmi.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 #include "drp_api.h"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365 #endif // NO SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 // for PTOOL compatibility
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 extern void INT_DisableIRQ(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 extern void INT_EnableIRQ(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 extern void l1dmacro_RF_sleep(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 extern void l1dmacro_RF_wakeup(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 WORD32 l1s_get_HWTimers_ticks(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 // file timer1.h
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 SYS_UWORD16 Dtimer1_Get_cntlreg(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 void Dtimer1_AR(unsigned short Ar);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378 void Dtimer1_PTV(unsigned short Ptv);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379 void Dtimer1_Clken(unsigned short En);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 void Dtimer1_Start (unsigned short startStop);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 void Dtimer1_Init_cntl (SYS_UWORD16 St, SYS_UWORD16 Reload, SYS_UWORD16 clockScale, SYS_UWORD16 clkon);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 SYS_UWORD16 Dtimer1_WriteValue (SYS_UWORD16 value);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 SYS_UWORD16 Dtimer1_ReadValue (void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
386 void l1s_wakeup(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 BOOL l1s_compute_wakeup_ticks(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 void l1s_recover_Frame(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389 UWORD8 Cust_recover_Os(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 void l1s_recover_HWTimers(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 UWORD8 Cust_check_system(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392 void f_arm_sleep_cmd(UWORD8 d_sleep_mode);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 //#if (TRACE_TYPE == 2) || (TRACE_TYPE == 3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 extern void L1_trace_string(char *s);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 extern void L1_trace_char (char s);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 //#endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 extern UWORD16 slp_debug_flag;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 extern void l1s_trace_mftab(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 extern T_DRP_REGS_STR *drp_regs;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 UWORD32 l1s_get_next_gauging_in_Packet_Idle(void);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 //#pragma DUPLICATE_FOR_INTERNAL_RAM_END
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 #if !((MOVE_IN_INTERNAL_RAM == 1) && (GSM_IDLE_RAM !=0)) // MOVE TO INTERNAL MEM IN CASE GSM_IDLE_RAM enabled
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 //#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_START // KEEP IN EXTERNAL MEM otherwise
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 /************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 /* Macros for power management */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 /************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419 #define MIN(min, operand1) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420 if (operand1 <= min) min = operand1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 // ex: RATIO T32khz/T4.33Mhz = 132.2428385417
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 // => root = integer part of the ratio
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 // = 132
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425 // => frac = fractionnal part of the ratio multiplied by 65536 rounded to make it integer
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 // = 0.2428385417 * 65536 (Cf. ULPD specification)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 // = 0.2428385417 * 2^16
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 // = 15914.66666689 = 15914
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #define RATIO(HF,LF, root, frac) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 root = (UWORD32)(HF/LF); \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 frac = (UWORD32)(((HF - (root*LF)) << 16) / LF);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 // previous ratio with frac + 0.5
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 #define RATIO2(HF,LF, root, frac) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 if(LF){ \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 root = (UWORD32)(HF/LF); \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 frac = (UWORD32)((((HF - (root*LF)) << 16) + 0.5*LF) / LF);}
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 #define HFTHEO(LF, root, frac, hftheo) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 hftheo = root*LF + ((frac*LF) >>16);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 #define SUM(HF, LF, nb, ind) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444 LF=HF=0; \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445 for(ind=0; ind<nb; ind++) \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 { \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 LF = LF +l1s.pw_mgr.histo[ind][0]; \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448 HF = HF +l1s.pw_mgr.histo[ind][1]; \
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 T_PWMGR_DEBUG l1_pwmgr_debug;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 #if(CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 /************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 /* Configure EMIF for optimal consumption */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 /************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 void EMIF_SetConfReg(const UWORD8 wp,const UWORD8 flush_prefetch,const UWORD8 Prefetch_mode,const UWORD8 pde,const UWORD8 pwd_en)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 UWORD16 Emif_config_Reg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467 Emif_config_Reg = (pwd_en << EMIF_CONFIG_PWD_POS | pde << EMIF_CONFIG_PDE_POS | Prefetch_mode << EMIF_CONFIG_PREFETCH_POS | flush_prefetch << EMIF_CONFIG_FLUSH_PREFETCH_POS | wp << EMIF_CONFIG_WP_POS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 /*p_Emifreg -> EMIF_Config = (Emif_config_Reg & EMIF_CONFIG_REG_MASK );*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 EMIF_CONFIG = Emif_config_Reg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470 } // End of EMIF_SetConfReg
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 #if (OP_L1_STANDALONE == 1) // API for Audio and MADC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478 T_AUDIO_OUTEN_REG audio_outen_pm;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 // L1 Standalone function for Configuring Audio registers.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481 // Argument CLK_MASK checks if Audio path is active
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 // Argument SLEEP_CMD configures Audio registers for optimal consumption
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 // Argument WAKE_CMD reconfigure audio registers after wakeup
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485 Uint8 madc_outen_check(Uint8 cmd) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486 BspTwl3029_ReturnCode returnVal = BSP_TWL3029_RETURN_CODE_FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487 /* I2C array */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
488 Bsp_Twl3029_I2cTransReqArray i2cTransArray;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489 Bsp_Twl3029_I2cTransReqArrayPtr i2cTransArrayPtr= &i2cTransArray;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 /* twl3029 I2C reg info struct */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 BspTwl3029_I2C_RegisterInfo regInfo[8] ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493 BspTwl3029_I2C_RegisterInfo* regInfoPtr = regInfo;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494 BspTwl3029_I2C_RegData shadow_pwronstatus, ston_bit;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
495 Uint8 count = 0;//OMAPS90550-new
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498 switch( cmd ) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 case CLK_MASK:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_PWRONSTATUS_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 &shadow_pwronstatus);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 ston_bit = (shadow_pwronstatus & (1 << BSP_TWL3029_LLIF_AUDIO_PWRONSTATUS_STON_OFFSET));
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 if (ston_bit == 1) return DCXO_CLOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 else return NO_CLOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507 // omaps00090550 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 case SLEEP_CMD:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 /* store the output enable 1 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 &audio_outen_pm.outen1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516 &audio_outen_pm.outen2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 &audio_outen_pm.outen3);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
521
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523 /* write default values into OUTEN1,OUTEN2 & OUTEN3 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 BSP_TWL_3029_MAP_AUDIO_OUTEN1_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 BSP_TWL_3029_MAP_AUDIO_OUTEN2_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535 BSP_TWL_3029_MAP_AUDIO_OUTEN3_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 /* now request to I2C manager to write to Triton registers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543 (BspI2c_TransactionRequest*)i2cTransArrayPtr);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 else return FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 // omaps00090550 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 case WAKE_CMD:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552 /* write default values into OUTEN1,OUTEN2 & OUTEN3 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554 audio_outen_pm.outen1,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 audio_outen_pm.outen2,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 audio_outen_pm.outen3,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 /* now request to I2C manager to write to Triton registers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570 if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572 returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 (BspI2c_TransactionRequest*)i2cTransArrayPtr);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576 if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 else return FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 // omaps00090550 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580 return SUCCESS;//omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 #else // Integrated build API for Audio and MADC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
584 // Full PS build function for Configuring Audio registers.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
585 // Argument CLK_MASK checks if Audio path is active
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
586 // Argument SLEEP_CMD configures Audio registers for optimal consumption
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
587 // Argument WAKE_CMD reconfigure audio registers after wakeup
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
589
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
590 T_AUDIO_OUTEN_REG audio_outen_pm;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
591 BspTwl3029_I2C_RegData audio_ctrl3;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
592
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
593 Uint8 audio_madc_sleep(Uint8 cmd) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
594 BspTwl3029_ReturnCode returnVal = BSP_TWL3029_RETURN_CODE_FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
595 /* I2C array */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
596 //Bsp_Twl3029_I2cTransReqArray i2cTransArray;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
597 //Bsp_Twl3029_I2cTransReqArrayPtr i2cTransArrayPtr= &i2cTransArray;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
598
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
599 /* twl3029 I2C reg info struct */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
600 //BspTwl3029_I2C_RegisterInfo regInfo[8] ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601 //BspTwl3029_I2C_RegisterInfo* regInfoPtr = regInfo;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602 BspTwl3029_I2C_RegData shadow_pwronstatus, ston_bit;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
603
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605 Uint8 count = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
606
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
608 switch( cmd ) {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
610 case CLK_MASK:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
611 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_PWRONSTATUS_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612 &shadow_pwronstatus);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613 ston_bit = (shadow_pwronstatus & (1 << BSP_TWL3029_LLIF_AUDIO_PWRONSTATUS_STON_OFFSET));
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 if (ston_bit == 1) return DCXO_CLOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616 else return NO_CLOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
617 //omaps00090550 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619 case SLEEP_CMD:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
620 #if 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 /* store the output enable 1 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
623 &audio_outen_pm.outen1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
626 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
627 &audio_outen_pm.outen2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
628
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
629 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
630 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
631 &audio_outen_pm.outen3);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
632
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
633 returnVal = BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
634 &audio_ctrl3);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
635
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
636 if( audio_outen_pm.outen1 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
637 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
638 /* write default values into OUTEN1,OUTEN2 & OUTEN3 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
639 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
640 BSP_TWL_3029_MAP_AUDIO_OUTEN1_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
641 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
642 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
643
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
644 if( audio_outen_pm.outen2 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
645 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
646
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
647 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
648 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
649 BSP_TWL_3029_MAP_AUDIO_OUTEN2_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
650 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
651 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
652
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
653 if( audio_outen_pm.outen3 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
654 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
655 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
656 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
657 BSP_TWL_3029_MAP_AUDIO_OUTEN3_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
658 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
659 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
660
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
661 /* Selectively checking if INMODE is set or not. Write is queued only when INMODE(0-3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
662 is non-zero */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
663 if( audio_ctrl3 & 0xf)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
664 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
665 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
666 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
667 BSP_TWL_3029_MAP_AUDIO_CTRL3_DEFAULT,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
668 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
669 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
670
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
671 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUX,BSP_TWL3029_MAP_AUX_REG_TOGGLE1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
672 1 << BSP_TWL3029_LLIF_AUX_REG_TOGGLE1_MADCR_OFFSET, regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
673 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
674
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
675 //Turn off the USB leakage currrent
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
676
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
677 // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0xb6,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
678 // count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
679
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
680 //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2, BSP_TWL3029_MAP_USB_PSM_EN_TEST_SET_OFFSET,0x80,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
681 //count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
682
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
683 // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_VBUS_EN_TEST_OFFSET,0x00,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
684 // count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
685
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
686 //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0, BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0x00,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
687 //count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
688
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
689 // now request to I2C manager to write to Triton registers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
690 //if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE && !is_i2c_bus_locked())
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
691 if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
692 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
693 returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
694 (BspI2c_TransactionRequest*)i2cTransArrayPtr);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
695 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
696
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
697 if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
698 else return FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
699
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
700 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
701
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
702 //omaps00090550 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
703
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
704 case WAKE_CMD:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
705 #if 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
706
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
707 if( audio_outen_pm.outen1 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
708 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
709 /* write default values into OUTEN1,OUTEN2 & OUTEN3 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
710 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
711 audio_outen_pm.outen1,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
712 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
713 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
714
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
715 if( audio_outen_pm.outen2 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
716 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
717
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
718 /* store the output enable 2 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
719 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN2_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
720 audio_outen_pm.outen2,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
721 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
722 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
723
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
724 if( audio_outen_pm.outen3 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
725 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
726 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
727 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_OUTEN3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
728 audio_outen_pm.outen3,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
729 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
730 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
731
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
732 /* Selectively checking if INMODE is set or not. Write is queued only when INMODE(0-3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
733 is non-zero */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
734 if( audio_ctrl3 & 0xf)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
735 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
736 /* store the output enable 3 register */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
737 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUD, BSP_TWL_3029_MAP_AUDIO_CTRL3_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
738 audio_ctrl3,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
739 count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
740 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
741
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
742
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
743 //wake up mode: Enable MADC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
744 returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_AUX,BSP_TWL3029_MAP_AUX_REG_TOGGLE1_OFFSET,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
745 1 << BSP_TWL3029_LLIF_AUX_REG_TOGGLE1_MADCS_OFFSET, regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
746
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
747 count++; //TI_SH added to set the madc on correctly
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
748
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
749 //Enable the USB leakage current after wake up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
750
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
751 // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0,BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0xb6,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
752 // count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
753
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
754 // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_VBUS_EN_TEST_OFFSET,0x0F,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
755 // count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
756
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
757 //returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE2,BSP_TWL3029_MAP_USB_PSM_EN_TEST_CLR_OFFSET,0x80,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
758 //count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
759
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
760 // returnVal = BspTwl3029_I2c_regQueWrite(BSP_TWL3029_I2C_PAGE0,BSP_TWL_3029_MAP_CKG_TESTUNLOCK_OFFSET,0x00,regInfoPtr++);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
761 // count++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
762
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
763 // now request to I2C manager to write to Triton registers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
764 //if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE && !is_i2c_bus_locked())
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
765 if (returnVal != BSP_TWL3029_RETURN_CODE_FAILURE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
766 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
767 returnVal = BspTwl3029_I2c_regInfoSend(regInfo,(Uint16)count,NULL,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
768 (BspI2c_TransactionRequest*)i2cTransArrayPtr);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
769 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
770
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
771 if (returnVal == BSP_TWL3029_RETURN_CODE_SUCCESS) return SUCCESS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
772 else return FAILURE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
773 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
774 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
775 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
776 return SUCCESS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
777 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
778 #endif // API for Audio and MADC
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
779
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
780
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
781
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
782 //Function to check status of Backlight Only Argument 0 is valid
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
783
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
784
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
785 Uint8 backlight_pwr_interface(Uint8 cmd)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
786 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
787 BspTwl3029_I2C_RegData regData;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
788
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
789
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
790 if(cmd == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
791 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
792 BspTwl3029_I2c_shadowRegRead(BSP_TWL3029_I2C_PAGE0,PWDNSTATUS,&regData);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
793 if((regData) & 0x70)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
794 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
795 return(DCXO_CLOCK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
796 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
797 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
798 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
799 return(NO_CLOCK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
800 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
801
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
802 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
803 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
804 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
805 return(SUCCESS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
806 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
807 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
808
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
809 //Dummy Function for peripheral check to populate Function pointer table for unused APIs
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
810
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
811
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
812 Uint8 f_peripheral_interface_dummy(Uint8 cmd)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
813 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
814 if(cmd == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
815 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
816 return(NO_CLOCK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
817 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
818 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
819 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
820 return(SUCCESS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
821 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
822
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
823 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
824
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
825 //Dummy Function for Application check to populate Function pointer table for unused APIs
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
826
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
827 Uint8 f_application_interface_dummy(Uint8 cmd)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
828 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
829 if(cmd == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
830 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
831 return(PM_INACTIVE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
832 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
833 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
834 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
835 return(SUCCESS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
836 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
837 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
838
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
839 //Function not used as of now //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
840 void Update_Sleep_Status( Uint8 ID, Uint8 state)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
841 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
842 if(state)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
843 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
844 SLEEP_STATE |= (state << ID); //omaps00090550 ! was present before
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
845 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
846 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
847 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
848 SLEEP_STATE &=((Uint8)~1 <<ID); //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
849 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
850 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
851
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
852 //Function polls the status of the following peripherals to take
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
853 //Sleep Decision:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
854 //UART, USB, I2C, LCD, Camera, Backlight, Audio Stereo path,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
855 //Bluetooth and USIM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
856 //All peripherals either cause Deep Sleep or No Sleep.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
857 //Only USIM can also cause Big Sleep.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
858
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
859
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
860
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
861 UWORD32 Check_Peripheral_App(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
862 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
863 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
864 UWORD8 ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
865 /* Check Peripherals */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
866 ret_value = Peripheral_interface[UART_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
867 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
868 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
869 l1_pwmgr_debug.fail_id = UART_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
870 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
871 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
872 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
873 ret_value = Peripheral_interface[USB_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
874 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
875 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
876 l1_pwmgr_debug.fail_id = USB_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
877 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
878 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
879 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
880 ret_value = Peripheral_interface[I2C_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
881 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
882 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
883 l1_pwmgr_debug.fail_id = I2C_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
884 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
885 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
886 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
887 ret_value = Peripheral_interface[LCD_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
888 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
889 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
890 l1_pwmgr_debug.fail_id = LCD_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
891 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
892 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
893 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
894 ret_value = Peripheral_interface[CAMERA_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
895 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
896 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
897 l1_pwmgr_debug.fail_id = CAMERA_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
898 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
899 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
900 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
901 ret_value = Peripheral_interface[BACKLIGHT_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
902 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
903 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
904 l1_pwmgr_debug.fail_id = BACKLIGHT_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
905 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
906 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
907 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
908 ret_value = Peripheral_interface[MADC_AS_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
909 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
910 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
911 l1_pwmgr_debug.fail_id = MADC_AS_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
912 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
913 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
914 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
915 /* check battery charger */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
916 ret_value = Peripheral_interface[BCI_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
917 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
918 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
919 l1_pwmgr_debug.fail_id = BCI_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
920 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
921 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
922 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
923
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
924 /* Check Applications */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
925 ret_value = Application_interface[BT_Stack_ID](APP_ACTIVITY);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
926 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
927 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
928 // L1_APPLICATION_OFFSET is added to distinguish Application interface
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
929 l1_pwmgr_debug.fail_id = BT_Stack_ID + (L1_PWMGR_APP_OFFSET);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
930 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
931 return(DO_NOT_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
932 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
933 ret_value = Peripheral_interface[USIM_ID](CLK_MASK);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
934 if(ret_value)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
935 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
936 l1_pwmgr_debug.fail_id = USIM_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
937 l1_pwmgr_debug.fail_ret_val = ret_value;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
938 l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_SIM;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
939 return(FRAME_STOP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
940 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
941 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
942 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
943 return(CLOCK_STOP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
944 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
945 #endif //NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
946 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
947
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
948 //This function Configures DBB for optimal Power Consumption
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
949 //during Deep Sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
950
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
951
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
952
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
953 void DBB_Configure_DS()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
954 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
955 // FDP enabling and disabling of burst configuration in flash not required in Locosto
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
956 // Hardware Settings as per Power Bench
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
957
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
958 // Stop RNG oscillators
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
959 RNG_CONFIG &= 0xF03F;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
960
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
961
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
962 /* Set GPIOs 19 to 22 as outputs to avoid floating pins */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
963 GPIO1_CNTL_REG &= ~0x0078;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
964
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
965 /* Set PD on VDR and VFSRX for VSP bus to avoid floating pins */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
966 CONF_VDR |= 0x0008;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
967 CONF_VFSRX |= 0x0008;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
968
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
969 /* Set HASH in auto-idle */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
970 SHA_MASK = 0x0001;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
971
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
972 /* Set DES in auto-idle */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
973 DES_MASK = 0x0001;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
974
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
975 /* Set RNG in auto-idle */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
976 RNG_MASK = 0x0001;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
977
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
978
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
979 /* uart_in_pull_down(); */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
980
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
981 #if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
982
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
983
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
984 temp_NAND_Reg1 = COMMAND_REG;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
985 temp_NAND_Reg2 = CONTROL_REG;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
986 temp_NAND_Reg3 = STATUS_IT_REG;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
987
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
988 COMMAND_REG = 0x06;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
989 CONTROL_REG = 0x0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
990 STATUS_IT_REG = 0x0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
991
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
992 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
993 // RANGA: All these bit fields should be replaced by macros
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
994 // Set DPLL in idle mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
995 // Cut C-PORT (new), IRQ, BRIDGE and TIMER clocks
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
996 /* Set DPLL in idle mode */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
997 /* Cut C-PORT (new), IRQ, BRIDGE and TIMER clocks */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
998 CLKM_CNTL_CLK_REG &= ~0x0010 ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
999 CLKM_CNTL_CLK_REG |= 0x000F ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1000
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1001 CNTL_APLL_DIV_CLK &= ~0x0001; /* Disable APLL */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1002
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1003 // Statements below are not required for the current hardware version.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1004 // This was done to solve the problem of DCXO taking 10 frames
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1005 // to wake-up from Deep Sleep in older hardware versions.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1006
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1007 //DCXO_THRESH_L = 0xC040; // Setting DCXO Thresholds
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1008 //DCXO_THRESH_H = 0x051F; // to solve Deep Sleep problem
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1009 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1010
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1011 //This function Restores DBB after wakeup from Deep Sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1012
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1013
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1014 void DBB_Wakeup_DS()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1015 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1016 // FDP re-enabling and burst re-configuration are not required if FDP is disabled
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1017 // during deep-sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1018
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1019 CLKM_CNTL_CLK_REG |= 0x0010 ; // Enable CPORT Clock
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1020
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1021 CNTL_APLL_DIV_CLK |= 0x0001; // Enable APLL clock
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1022
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1023 #if defined(RVM_DATALIGHT_SWE) || defined(RVM_NAN_SWE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1024
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1025 // Restoring NAND
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1026 COMMAND_REG = temp_NAND_Reg1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1027 CONTROL_REG = temp_NAND_Reg2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1028 STATUS_IT_REG = temp_NAND_Reg3;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1029 // Restoring NAND
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1030 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1031
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1032
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1033 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1034
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1035
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1036 //This function shuts down APC Bandgap.Cannot be used for PG 1.0 Can be used only for PG 2.0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1037
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1038
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1039 void Disable_APC_BG() //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1040 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1041 while (RHSW_ARM_CNF & DSP_PERIPH_LOCK)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1042 RHSW_ARM_CNF |= ARM_PERIPH_LOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1043 APCCTRL2 &= ~BGEN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1044 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1045 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1046
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1047 //This function enables APC Bandgap.Cannot be used for PG 1.0 Can be used only for PG 2.0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1048
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1049 void Enable_APC_BG() //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1050 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1051 while (RHSW_ARM_CNF & DSP_PERIPH_LOCK)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1052 RHSW_ARM_CNF |= ARM_PERIPH_LOCK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1053 APCCTRL2 |= BGEN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1054 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1055 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1056
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1057 #endif //CHIPSET = 15
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1058
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1059
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1060
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1061
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1062
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1063
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1064
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1065
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1066
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1067
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1068 // l1ctl_pgm_clk32()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1069 // convert ratio in 4.33Mhz and pgm INC_FRAC,INC_SIXTEEN.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1070
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1071 void l1ctl_pgm_clk32(UWORD32 nb_hf, UWORD32 nb_32khz)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1072 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1073 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1074 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1075 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1076 UWORD32 inc_sixteen= 0, inc_frac=0, lf;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1077
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1078 // REM: nb_hf is the real value of the high frequency (ex in nbr of 65Mhz clock)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1079 // To compute the ratio, nb_hf must be expressed in nbr of clock 4.33 Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1080 // that's why nb_hf is divided by 3*l1_config.dpll
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1081 // RATIO2(nb_hf/(3*l1_config.dpll),nb_32khz,inc_sixteen,inc_frac);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1082 // this line above is equal to the ligne below:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1083 lf=(UWORD32)((UWORD32)(3*((UWORD32)((UWORD32)(l1_config.dpll)*nb_32khz)))); //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1084 RATIO2(nb_hf,lf,inc_sixteen,inc_frac);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1085
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1086 // integer part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1087 ULDP_INCSIXTEEN_UPDATE(inc_sixteen);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1088
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1089 // fractional part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1090 ULDP_INCFRAC_UPDATE(inc_frac);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1091 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1092 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1093 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1094
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1095
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1096 // l1ctl_gauging()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1097 // Description: management of the gauging results
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1098 // At RESET state reset histogram and then go to INIT.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1099 // At INIT state, go back to RESET on each */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1100 // gauging > +- 100 ppm. If NB_INIT good gauging go to ACQUIS state.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1101 // At ACQUIS state, go back to RESET on each gauging > (+- 20ppm +- 1us). If NB_ACQU good gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1102 // go to UPDATE state. Allow deep sleep feature.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1103 // At UPDATE state, count consecutive gauging >+- 1 us.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1104 // If MAX_BAD_GAUGING results go back to RESET.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1105 // Otherwise re-enable deep sleep feature and reset bad results counter.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1106
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1107 void l1ctl_gauging ( UWORD32 nb_32khz, UWORD32 nb_hf)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1108 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1109 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1110 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1111 enum states
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1112 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1113 RESET = 0,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1114 INIT = 1,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1115 ACQUIS = 2,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1116 UPDATE = 3
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1117 };
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1118
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1119 static UWORD8 bad_count; // bad gauging values
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1120 static UWORD8 gauging_state= RESET; // RESET,INIT, ACQUIS, UPDATE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1121 static UWORD8 nb_gaug; // number of gauging in ACQUIS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1122 static UWORD8 idx,i; // index
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1123 static UWORD32 root, frac; // ratio of HF and LF average
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1124 UWORD32 sumLF=0 , sumHF=0; // sum of HF and LF counts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1125 double nbHF_theo;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1126
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1127
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1128 // AFC or TEMPERATURE variation
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1129
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1130 //if ( (ABS( (WORD32)(l1s.pw_mgr.previous_afc-l1s.afc) ) > AFC_VARIATION) ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1131 // (ABS( (WORD32)(l1s.pw_mgr.previous_temp-l1s.afc) > TEMP_VARIATION) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1132 // gauging_state = RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1133
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1134 // reset state machine if not in IDLE mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1135 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1136 if ((l1a_l1s_com.l1s_en_task[NP] != TASK_ENABLED) && (l1a_l1s_com.l1s_en_task[PNP] != TASK_ENABLED))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1137 gauging_state = RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1138 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1139 if ((l1a_l1s_com.l1s_en_task[NP] != TASK_ENABLED) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1140 gauging_state = RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1141
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1142 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1143
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1144 switch (gauging_state)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1145 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1146
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1147 case RESET:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1148 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1149 UWORD8 i;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1150
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1151 // Reset Histogram
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1152 for (i=0; i < SIZE_HIST; i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1153 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1154 l1s.pw_mgr.histo[i][0] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1155 l1s.pw_mgr.histo[i][1] = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1156 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1157 idx = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1158 l1s.pw_mgr.enough_gaug= FALSE; // forbid Deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1159 gauging_state = INIT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1160 nb_gaug = NB_INIT; // counter for ACQUIS state
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1161 bad_count = 0; // reset count of BAD gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1162
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1163 #if (TRACE_TYPE != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1164 l1_trace_gauging_reset();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1165 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1166 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1167
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1168
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1169 case INIT:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1170 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1171
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1172 // Acquire NB_INIT gauging wtw +- 100 ppm
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1173
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1174 if (l1a_l1s_com.mode != I_MODE) return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1175
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1176 // compute clocks ratio from measurements.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1177 RATIO(nb_hf,nb_32khz,root,frac)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1178
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1179
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1180 // allow [-500ppm,+100ppm] derive on 32Khz at startup.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1181 // Commenting section below for OMAPS00148004
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1182 /* if (
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1183 (root > l1s.pw_mgr.c_clk_min ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1184 (root == l1s.pw_mgr.c_clk_min &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1185 frac >= l1s.pw_mgr.c_clk_init_min) ) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1186 (root < l1s.pw_mgr.c_clk_max ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1187 (root == l1s.pw_mgr.c_clk_max &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1188 frac <= l1s.pw_mgr.c_clk_init_max ) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1189 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1190 if (
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1191 ( l1s.pw_mgr.c_clk_min == l1s.pw_mgr.c_clk_max &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1192 frac >= l1s.pw_mgr.c_clk_init_min &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1193 frac <= l1s.pw_mgr.c_clk_init_max )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1194 ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1195 ( l1s.pw_mgr.c_clk_min != l1s.pw_mgr.c_clk_max &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1196 ( (root == l1s.pw_mgr.c_clk_min &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1197 frac >= l1s.pw_mgr.c_clk_init_min ) ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1198 (root > l1s.pw_mgr.c_clk_min &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1199 root < l1s.pw_mgr.c_clk_max ) ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1200 (root == l1s.pw_mgr.c_clk_max &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1201 frac <= l1s.pw_mgr.c_clk_init_max ) ) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1202 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1203 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1204 l1s.pw_mgr.histo[idx ][0] = nb_32khz; // init histo with the number of 32kHz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1205 l1s.pw_mgr.histo[idx++][1] = nb_hf; // init histo with the number of hf (13Mhz)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1206
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1207 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1208 #if (TRACE_TYPE==5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1209 trace_ULPD("Gauging INIT Case ", l1s.actual_time.fn);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1210 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1211 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1212
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1213 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1214 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1215 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1216 // out of the allowed derive -> reset
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1217 idx=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1218 #if (TRACE_TYPE != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1219 l1_trace_gauging_reset();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1220 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1221 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1222
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1223 if (idx == NB_INIT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1224 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1225 // enough measurement -> ACQUIS state
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1226 gauging_state = ACQUIS;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1227 // compute clk ratio on count average
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1228 SUM(sumHF,sumLF, NB_INIT,i) // returns sumHF and sumLF
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1229 RATIO(sumHF,sumLF,root, frac) // returns root and frac*2E16, computed on the average
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1230 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1231 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1232 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1233
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1234
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1235 case ACQUIS:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1236 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1237 // Acquire NB_ACQU gauging at +-25ppm
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1238 // with jitter +- 1 us
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1239 UWORD8 n;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1240
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1241 // from nb_32khz "measured"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1242 // compute nbHF_theo
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1243 HFTHEO(nb_32khz,root,frac,nbHF_theo)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1244
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1245 if ( (nb_hf >= (nbHF_theo - l1s.pw_mgr.c_delta_hf_acquis)) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1246 (nb_hf <= (nbHF_theo + l1s.pw_mgr.c_delta_hf_acquis)) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1247 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1248 l1s.pw_mgr.histo[idx][0] = nb_32khz;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1249 l1s.pw_mgr.histo[idx++][1] = nb_hf;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1250 idx = idx % SIZE_HIST;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1251
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1252 // compute clk ratio on count average
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1253 if(++nb_gaug >= SIZE_HIST) n=SIZE_HIST;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1254 else n= nb_gaug;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1255 SUM(sumHF,sumLF, n,i)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1256 RATIO(sumHF,sumLF,root, frac)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1257
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1258 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1259 #if (TRACE_TYPE==5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1260 trace_ULPD("Gauging ACQUIS Case ", l1s.actual_time.fn);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1261 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1262 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1263
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1264 if ( nb_gaug == (NB_INIT+NB_ACQU)) // NB_ACQU good gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1265 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1266 gauging_state = UPDATE; // UPDATE state
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1267 l1s.pw_mgr.enough_gaug = TRUE; // allow Deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1268 l1ctl_pgm_clk32(sumHF,sumLF); // clocks ratio in 4.33Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1269 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1270 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1271 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1272 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1273 gauging_state = RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1274 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1275 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1276 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1277
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1278 case UPDATE:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1279 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1280
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1281 // Update gauging histogram
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1282 // compute nbHF theoric for ratio_avg
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1283 HFTHEO(nb_32khz,root,frac,nbHF_theo)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1284
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1285 if ( (nb_hf >= (nbHF_theo-l1s.pw_mgr.c_delta_hf_update)) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1286 (nb_hf <= (nbHF_theo+l1s.pw_mgr.c_delta_hf_update)) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1287 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1288 l1s.pw_mgr.histo[idx][0] = nb_32khz;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1289 l1s.pw_mgr.histo[idx++][1] = nb_hf;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1290
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1291 // compute clk ratio on count average
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1292 SUM(sumHF,sumLF, SIZE_HIST,i)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1293 l1ctl_pgm_clk32(sumHF,sumLF); // clocks ratio in 4.33Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1294
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1295 l1s.pw_mgr.enough_gaug = TRUE; // allow Deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1296 bad_count = 0; // reset count of BAD gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1297
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1298 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1299 #if (TRACE_TYPE==5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1300 trace_ULPD("Gauging UPDATE Case ", l1s.actual_time.fn);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1301 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1302 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1303
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1304 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1305 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1306 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1307 bad_count ++;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1308 if (bad_count >= MAX_BAD_GAUGING) gauging_state = RESET;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1309 l1s.pw_mgr.enough_gaug= FALSE; // forbid Deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1310 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1311 idx = idx % SIZE_HIST;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1312 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1313 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1314 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1315 #if (TRACE_TYPE != 0) // Trace gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1316 // save parameters in the corresponding structure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1317 l1s.pw_mgr.state = gauging_state;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1318 l1s.pw_mgr.lf = nb_32khz ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1319 // WARNING WARNING, this case gauging_state == UPDATE modify the algo.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1320 // In case of trace the parameter root and frac are refresh.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1321 // it is not the case if no trace and it seems there is mistake
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1322 if (gauging_state == UPDATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1323 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1324 RATIO2(sumHF,sumLF,root,frac);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1325 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1326 //End of Warning.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1327 l1s.pw_mgr.hf = nb_hf ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1328 l1s.pw_mgr.root = root ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1329 l1s.pw_mgr.frac = frac ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1330 #endif // End Trace gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1331 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1332 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1333
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1334
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1335
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1336
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1337 /* GAUGING_Handler() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1338 /* Description: update increment counter for 32Khz */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1339 /* This interrupt function computes the ratio between */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1340 /* HF/32Khz gauging counters and program ULPD increment */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1341 /* values. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1342
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1343 void GAUGING_Handler(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1344 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1345 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1346 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1347 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1348 UWORD32 nb_32khz, nb_hf;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1349
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1350 // Gauging task is ended
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1351 l1s.pw_mgr.gauging_task = INACTIVE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1352 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1353 F_INTH_DISABLE_ONE_IT(C_INTH_ULPD_GAUGING_IT); // Mask ULPD GAUGING int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1354 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1355 INTH_DISABLEONEIT(IQ_ULPD_GAUGING); // Mask ULPD GAUGING int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1356 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1357
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1358 // Number of 32 Khz clock at the end of the gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1359 nb_32khz = ((*( UWORD16 *)ULDP_COUNTER_32_MSB_REG) * 65536) +
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1360 (*( UWORD16 *)ULDP_COUNTER_32_LSB_REG);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1361
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1362 // Number of high frequency clock at the end of the gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1363 // Convert it in nbr of 13 Mhz clocks (5*13=65Mhz)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1364 nb_hf = ( ((*( UWORD16 *)ULDP_COUNTER_HI_FREQ_MSB_REG) * 65536) +
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1365 (*( UWORD16 *)ULDP_COUNTER_HI_FREQ_LSB_REG) ); // Divide by PLL ratio
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1366
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1367 l1ctl_gauging(nb_32khz, nb_hf);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1368 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1369 #else //Simulation part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1370
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1371 // Gauging task is ended
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1372 l1s.pw_mgr.gauging_task = INACTIVE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1373
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1374 l1ctl_gauging(DEFAULT_32KHZ_VALUE,DEFAULT_HFMHZ_VALUE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1375 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1376 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1377
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1378
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1379
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1380
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1381 // l1s_get_HWTimers_ticks()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1382 // Description:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1383 // evaluate the loading of the HW Timers for dep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1384 // BIG SLEEP: timers CLK may be stopped (user dependant)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1385 // DEEP SLEEP:timers CLK and WTCHDOG CLK are stopped
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1386 // CLKS are enabled after VTCX0+SLICER+13MHZ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1387 // setup time
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1388
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1389 WORD32 l1s_get_HWTimers_ticks(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1390 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1391 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1392 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1393 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1394 WORD32 timer1,timer2,watchdog,HWTimer;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1395 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1396 WORD32 watchdog_sec;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1397 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1398 UWORD16 cntlreg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1399 UWORD16 modereg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1400 WORD32 old = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1401
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1402 // read Hercules Timers & Watchdog
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1403 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1404 // Tint = Tclk * (LOAD_TIM+1) * 2^(PTV+1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1405 // Tclk = 1.2308us for Fclk=13Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1406 // PTV = X (pre-scaler field)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1407 //-------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1408 timer1 = timer2 = watchdog = HWTimer = -1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1409 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1410 watchdog_sec = -1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1411 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1412
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1413 cntlreg = Dtimer1_Get_cntlreg(); // AND 0x1F
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1414 if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1415 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1416 cntlreg = cntlreg&0x1F;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1417 cntlreg >>= 2; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1418 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1419 timer1 = (WORD32) ( ((Dtimer1_ReadValue()+1) * cntlreg * 0.0012308) / 4.615 );
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1420 if (timer1 <= MIN_SLEEP_TIME) return(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1421 old = Dtimer1_ReadValue();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1422 HWTimer = timer1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1423 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1424
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1425 cntlreg = Dtimer2_Get_cntlreg();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1426 if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1427 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1428 cntlreg = cntlreg&0x1F;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1429 cntlreg >>= 2; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1430 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1431 timer2 = (WORD32) ( ((Dtimer2_ReadValue()+1) * cntlreg * 0.0012308) / 4.615 );
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1432 if (timer2 <= MIN_SLEEP_TIME) return(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1433 if (HWTimer == -1) HWTimer = timer2;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1434 else MIN(HWTimer,timer2)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1435 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1436
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1437 cntlreg = TIMER_Read(0); // AND 0x0f80
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1438 modereg = TIMER_Read(2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1439
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1440 if ( (cntlreg & TIMER_ST) || (modereg & TIMER_WDOG))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1441 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1442 // in watchdog mode PTV is forced to 7
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1443 if ( modereg & TIMER_WDOG )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1444 cntlreg |= TIMER_PTV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1445
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1446 cntlreg = (cntlreg & TIMER_PTV) >> 9; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1447 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1448 watchdog = (WORD32) ( ((TIMER_ReadValue()+1) * cntlreg * 0.001078) / 4.615 );
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1449 if (watchdog <= MIN_SLEEP_TIME) return(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1450 if (HWTimer == -1) HWTimer = watchdog;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1451 else MIN(HWTimer,watchdog)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1452 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1453
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1454 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1455 /*
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1456 * Secure Watchdog Timer management
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1457 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1458 cntlreg = TIMER_SEC_Read(0); // AND 0x0f80
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1459 modereg = TIMER_SEC_Read(2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1460 if ( (cntlreg & TIMER_ST) || (modereg & TIMER_WDOG))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1461 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1462 // in watchdog mode PTV is forced to 7
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1463 if ( modereg & TIMER_WDOG )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1464 cntlreg |= TIMER_PTV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1465
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1466 cntlreg = (cntlreg & TIMER_PTV) >> 9; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1467 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1468 watchdog_sec = (WORD32) ( ((TIMER_SEC_ReadValue()+1) * cntlreg * 0.001078) / 4.615 );
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1469 if (watchdog_sec <= MIN_SLEEP_TIME) return(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1470 if (HWTimer == -1) HWTimer = watchdog_sec;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1471 else MIN(HWTimer,watchdog_sec)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1472 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1473
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1474 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1475
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1476 return (HWTimer);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1477 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1478 #else // simulation part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1479 return (-1); // no HW timer in simulation
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1480 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1481 return(-1); //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1482 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1483
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1484 #if (GSM_IDLE_RAM != 0) // Compile only if GSM_IDLE_RAM enabled
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1485
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1486 void l1s_adapt_traffic_controller(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1487 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1488 BOOL l1s_extram;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1489 UWORD8 nb_bitmap;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1490 T_L1S_GSM_IDLE_INTRAM * gsm_idle_ram_ctl;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1491
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1492 gsm_idle_ram_ctl = &(l1s.gsm_idle_ram_ctl);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1493
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1494 l1s_extram = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1495
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1496 for(nb_bitmap=0; ((nb_bitmap < SIZE_TAB_L1S_MONITOR) && (l1s_extram == FALSE)); nb_bitmap++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1497 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1498 if (nb_bitmap == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1499 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1500 l1s_extram |= (((INT_RAM_GSM_IDLE_L1S_PROCESSES1 ^ gsm_idle_ram_ctl->task_bitmap_idle_ram[nb_bitmap]) & gsm_idle_ram_ctl->task_bitmap_idle_ram[nb_bitmap]) != 0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1501 }else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1502 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1503 l1s_extram |= (gsm_idle_ram_ctl->task_bitmap_idle_ram[nb_bitmap] != 0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1504 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1505 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1506
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1507 if ((l1s_extram != FALSE) && (!READ_TRAFFIC_CONT_STATE))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1508 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1509 CSMI_TrafficControllerOn();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1510 #if (TRACE_TYPE==1) || (TRACE_TYPE==4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1511 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1512 l1s_trace_mftab();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1513 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1514 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1515 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1516 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1517 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1518
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1519
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1520 // l1s_sleep_manager()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1521 // Description:
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1522 // evaluate the loading of the system
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1523 // - SIM, UART, LCD ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1524 // - Nucleus tasks, Hisrs, timers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1525 // - Timer1, Timer2, Watchdog
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1526 // program Big or Deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1527
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1528 void l1s_sleep_manager()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1529 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1530 //UWORD8 temp=0; OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1531
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1532 UWORD16 temp_clear_intr;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1533
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1534 // fn when l1s_sleep_manager function is called
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1535 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1536 UWORD32 sleep_time = l1s.actual_time.fn_mod42432;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1537 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1538 UWORD32 sleep_time = l1s.actual_time.fn;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1539 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1540
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1541 #if(CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1542 Uint8 sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1543 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1545 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1546 T_L1S_GSM_IDLE_INTRAM * gsm_idle_ram_ctl;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1547 BOOL flag_traffic_controller_state = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1548 gsm_idle_ram_ctl = &(l1s.gsm_idle_ram_ctl);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1549
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1550 #if (AUDIO_TASK == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1551 gsm_idle_ram_ctl->l1s_full_exec = l1s.l1_audio_it_com;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1552 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1553
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1554 if (gsm_idle_ram_ctl->l1s_full_exec == TRUE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1555 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1556 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1557
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1558 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1559 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1560 // Power management is enabled
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1561 WORD32 min_time, OSload, HWtimer,wake_up_time,min_time_gauging;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1562 UWORD32 sleep_mode;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1563 #if (ANLG_FAM != 11)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1564 WORD32 afc_fix;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1565 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1566 UWORD32 uw32_store_next_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1567 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1568 static UWORD32 previous_sleep = FRAME_STOP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1569 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1570 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1571 BOOL extended_page_mode_state = 0; //Store state of extended page mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1572 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1573 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1574 WORD32 time_from_last_wakeup=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1575 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1576
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1577 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1578 WORD32 hci_ll_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1579 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1580
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1581 // init for trace and debug
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1582 l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_UNDEFINED;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1583 l1s.pw_mgr.wakeup_type = WAKEUP_FOR_UNDEFINED;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1584
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1585 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1586 time_from_last_wakeup = (sleep_time - l1s.pw_mgr.wakeup_time + 42432) % 42432;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1587 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1588
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1589
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1590 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1591 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1592 // Protect System structures
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1593 // must be called BEFORE INT_DisableIRQ() while
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1594 // Nucleus does not restore IRQ/FIQ bits !!!!
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1595 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1596 OS_system_protect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1597 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1598 // Disable IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1599 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1600 INT_DisableIRQ();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1601 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1602 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1603 // check System (SIM, UART, LDC ..... )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1604 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1605 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1606 #if (WCP_PROF == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1607 sleep_mode = Check_Peripheral_App(); /* For Locosto */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1608 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1609 sleep_mode = DO_NOT_SLEEP; //Check_Peripheral_App(); /* For Locosto */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1610 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1611 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1612 sleep_mode = Cust_check_system();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1613 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1614
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1615 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1616 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1617 // check System (SIM, UART, LDC ..... )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1618 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1619 gsm_idle_ram_ctl->sleep_mode = sleep_mode;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1620 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1621
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1622 if (sleep_mode == DO_NOT_SLEEP)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1623 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1624 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1625 // free System structure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1626 // Enable all IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1627 //l1_pwmgr_irq_dis_flag = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1628 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1629 INT_EnableIRQ();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1630 l1_trace_fail_sleep(FAIL_SLEEP_PERIPH_CHECK, l1_pwmgr_debug.fail_id, l1_pwmgr_debug.fail_ret_val);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1631 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1632 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1633 gsm_idle_ram_ctl->os_load = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1634 gsm_idle_ram_ctl->hw_timer = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1635 #endif // GSM_IDLE_RAM
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1636 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1637 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1638
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1639
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1640 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1641 /*GC_Sleep(); OMAPS00134004*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1642 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1643 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1644 // check OS loading
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1645 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1646 OSload = OS_get_inactivity_ticks();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1647 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1648 if ((OSload >= 0) && (OSload <= MIN_SLEEP_TIME)){
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1649 l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_OSLOAD;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1650 l1_pwmgr_debug.fail_ret_val = OSload;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1651 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1652 #endif //NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1653
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1654 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1655 // check HW Timers loading
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1656 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1657 HWtimer= l1s_get_HWTimers_ticks();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1658 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1659 if (HWtimer == 0){
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1660 l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_HWTIMER;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1661 l1_pwmgr_debug.fail_ret_val = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1662 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1663 #endif //NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1664
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1665 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1666 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1667 // check OS loading
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1668 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1669 gsm_idle_ram_ctl->os_load = OSload;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1670
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1671 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1672 // check HW Timers loading
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1673 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1674 gsm_idle_ram_ctl->hw_timer = HWtimer;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1675 #endif // GSM_IDLE_RAM
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1676
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1677 if ((OSload > 0) && (OSload <= MIN_SLEEP_TIME))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1678 OSload =0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1679
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1680 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1681 // check next gauging task for Packet Idle
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1682 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1683 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1684 min_time_gauging = l1s_get_next_gauging_in_Packet_Idle();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1685 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1686 min_time_gauging = -1; // not used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1687 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1688 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1689 if (min_time_gauging == 0){
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1690 l1_pwmgr_debug.fail_id = FAIL_SLEEP_DUE_TO_MINTIMEGAUGING;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1691 l1_pwmgr_debug.fail_ret_val = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1692 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1693 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1694
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1695
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1696 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1697 hci_ll_status = hci_ll_ok_for_sleep();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1698 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1699 // check if immediate activity planned
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1700 // 0 means immediate activity
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1701 // in case big sleep is choosen (sleep mode == FRAME_STOP) because of UART or SIM,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1702 // return and wait end of this activity (few TDMA frames) then check on next TDMA frames
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1703 // if MS can go in deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1704 if ( !OSload
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1705 || !HWtimer
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1706 || !min_time_gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1707 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1708 || ((sleep_mode != CLOCK_STOP) && ((l1s.pw_mgr.why_big_sleep == BIG_SLEEP_DUE_TO_UART) || (l1s.pw_mgr.why_big_sleep == BIG_SLEEP_DUE_TO_SIM)))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1709 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1710 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1711 || !hci_ll_status
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1712 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1713 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1714 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1715
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1716
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1717
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1718 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1719 /*GC_Wakeup(); OMAPS00134004*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1720 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1721
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1722 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1723 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1724 // free System structure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1725 // Enable all IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1726 INT_EnableIRQ();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1727 // Wake up UART
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1728 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1729 // Traffic controller has to be enabled before calling SER_WakeUpUarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1730 // as this function can access the external RAM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1731 // Reset the flag that will indicates if an interrup will put the traffic
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1732 // controller ON during that time.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1733 l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1734 if (!READ_TRAFFIC_CONT_STATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1735 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1736 flag_traffic_controller_state = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1737 CSMI_TrafficControllerOn();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1738 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1739 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1740
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1741 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1742 SER_WakeUpUarts(); // Wake up Uarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1743 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1744 // To be checked if this needs a change
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1745 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1746
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1747 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1748 // The traffic controller state shall be restored as it was before
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1749 // calling SER_WakeUpUarts. Do not disable it if an interrup occured
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1750 // in between and activated the traffic controller.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1751 if ((flag_traffic_controller_state == 1) && (l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int == FALSE))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1752 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1753 CSMI_TrafficControllerOff();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1754 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1755 flag_traffic_controller_state = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1756 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1757 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1758 #if (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1759 l1_trace_fail_sleep(FAIL_SLEEP_OSTIMERGAUGE, l1_pwmgr_debug.fail_id, l1_pwmgr_debug.fail_ret_val);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1760 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1761 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1762 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1763 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1764 // Select sleep duration ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1765 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1766 // remember: -1 means no activity planned
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1767 min_time = OSload;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1768 //l1a_l1s_com.time_to_next_l1s_task is UW32, min_time is W32. Max value of l1a_l1s_com.time_to_next_l1s_task will be 2p31
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1769 //and ,min_time max value will be 2p30. If min_time > l1a_l1s_com.time_to_next_l1s_task,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1770 //means MSB of l1a_l1s_com.time_to_next_l1s_task is zero. so, we can use- uw32_store_next_time & 0x7FFFFFFF
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1771 uw32_store_next_time = l1a_l1s_com.time_to_next_l1s_task;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1772
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1773 if (min_time == -1) min_time = (WORD32)uw32_store_next_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1774 //else MIN(min_time, (WORD32)l1a_l1s_com.time_to_next_l1s_task)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1775 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1776 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1777 if(min_time > l1a_l1s_com.time_to_next_l1s_task) min_time = uw32_store_next_time & 0x7FFFFFFF;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1778 //else min_time = min_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1779 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1780 if (HWtimer != -1) MIN(min_time, HWtimer)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1781 if (min_time_gauging != -1) MIN(min_time, min_time_gauging)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1782
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1783 #if (TRACE_TYPE !=0 ) && (TRACE_TYPE != 2) && (TRACE_TYPE != 3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1784 // to trace the Wake up source
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1785 // depending of min_time choose the wakeup_type
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1786 l1s.pw_mgr.wakeup_type = WAKEUP_FOR_L1_TASK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1787 if (min_time == l1a_l1s_com.time_to_next_l1s_task) l1s.pw_mgr.wakeup_type = WAKEUP_FOR_L1_TASK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1788 if (min_time == HWtimer) l1s.pw_mgr.wakeup_type = WAKEUP_FOR_HW_TIMER_TASK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1789 if (min_time == min_time_gauging) l1s.pw_mgr.wakeup_type = WAKEUP_FOR_GAUGING_TASK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1790 if (min_time == OSload) l1s.pw_mgr.wakeup_type = WAKEUP_FOR_OS_TASK;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1791 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1792
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1793 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1794 // Choose DEEP or BIG SLEEP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1795 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1796 if ( ((l1s.pw_mgr.mode_authorized == DEEP_SLEEP) && (sleep_mode == CLOCK_STOP)) ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1797 ((l1s.pw_mgr.mode_authorized == ALL_SLEEP) && (sleep_mode == CLOCK_STOP)) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1798 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1799 // Check now gauging histogramme or if in inactive period of cell selection
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1800 #if (W_A_DSP_IDLE3 == 1) && (CODE_VERSION!=SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1801 if (((l1s.pw_mgr.enough_gaug == TRUE) || (l1a_l1s_com.mode == CS_MODE0)) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1802 ( l1s_dsp_com.dsp_ndb_ptr->d_dsp_state == C_DSP_IDLE3))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1803 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1804 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1805 if (((l1s.pw_mgr.enough_gaug == TRUE) || (l1a_l1s_com.mode == CS_MODE0)) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1806 !CLKM_READ_nIDLE3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1807 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1808 if ((l1s.pw_mgr.enough_gaug == TRUE) || (l1a_l1s_com.mode == CS_MODE0))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1809 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1810 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1811 l1s.pw_mgr.sleep_performed = CLOCK_STOP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1812 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1813 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1814 // BIG SLEEP is chosen : check the reason
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1815 l1s.pw_mgr.sleep_performed = FRAME_STOP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1816 if ((l1s.pw_mgr.enough_gaug != TRUE) && (l1a_l1s_com.mode != CS_MODE0))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1817 l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_GAUGING;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1818 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1819 l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_DSP_TRACES;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1820 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1821 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1822 if (l1s.pw_mgr.mode_authorized == BIG_SLEEP)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1823 l1s.pw_mgr.why_big_sleep = BIG_SLEEP_DUE_TO_SLEEP_MODE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1824
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1825 if ( ((l1s.pw_mgr.mode_authorized == BIG_SLEEP) && (sleep_mode >= FRAME_STOP)) ||
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1826 ((l1s.pw_mgr.mode_authorized >= DEEP_SLEEP) && (sleep_mode == FRAME_STOP)) )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1827 l1s.pw_mgr.sleep_performed = FRAME_STOP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1828
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1829
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1830
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1831 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1832 if ((previous_sleep == CLOCK_STOP) && (time_from_last_wakeup < 7))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1833 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1834 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1835 OS_system_Unprotect(); // free System structure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1836 INT_EnableIRQ(); // Enable all IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1837 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1838 // Traffic controller has to be enabled before calling SER_WakeUpUarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1839 // as this function can access the external RAM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1840 // Reset the flag that will indicates if an interrup will put the traffic
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1841 // controller ON during that time.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1842 l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1843 if (!READ_TRAFFIC_CONT_STATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1844 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1845 flag_traffic_controller_state = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1846 CSMI_TrafficControllerOn();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1847 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1848 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1849
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1850
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1851 SER_WakeUpUarts(); // Wake up Uarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1852
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1853
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1854
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1855 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1856 // The traffic controller state shall be restored as it was before
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1857 // calling SER_WakeUpUarts. Do not disable it if an interrup occured
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1858 // in between and activated the traffic controller.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1859 if ((flag_traffic_controller_state == 1) && (l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int == FALSE))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1860 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1861 CSMI_TrafficControllerOff();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1862 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1863 flag_traffic_controller_state = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1864 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1865 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1866 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1867 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1868 #else // CHIPSET == 15
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1869
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1870
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1871
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1872 if (l1s.pw_mgr.sleep_performed == CLOCK_STOP)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1873 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1874
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1875 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1876 UWORD8 local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1877
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1878
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1879 local_sleep_status = Peripheral_interface[UART_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1880 sleep_status = local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1881 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1882 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1883 l1_pwmgr_debug.fail_id = UART_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1884 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1885 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1886
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1887 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1888 local_sleep_status = Peripheral_interface[MADC_AS_ID](SLEEP_CMD); /* Call MADC & Stereo Sleep before I2C */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1889 OS_system_protect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1890 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1891 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1892 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1893 l1_pwmgr_debug.fail_id = MADC_AS_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1894 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1895 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1896
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1897 local_sleep_status = Peripheral_interface[USB_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1898 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1899 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1900 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1901 l1_pwmgr_debug.fail_id = USB_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1902 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1903 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1904
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1905 local_sleep_status = Peripheral_interface[USIM_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1906 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1907 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1908 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1909 l1_pwmgr_debug.fail_id = USIM_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1910 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1911 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1912
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1913 local_sleep_status = Peripheral_interface[I2C_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1914 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1915 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1916 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1917 l1_pwmgr_debug.fail_id = I2C_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1918 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1919 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1920
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1921 local_sleep_status = Peripheral_interface[LCD_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1922 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1923 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1924 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1925 l1_pwmgr_debug.fail_id = LCD_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1926 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1927 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1928
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1929 local_sleep_status = Peripheral_interface[CAMERA_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1930 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1931 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1932 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1933 l1_pwmgr_debug.fail_id = CAMERA_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1934 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1935 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1936 local_sleep_status = Peripheral_interface[BCI_ID](SLEEP_CMD);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1937 sleep_status &= local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1938 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1939 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1940 l1_pwmgr_debug.fail_id = BCI_ID;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1941 l1_pwmgr_debug.fail_ret_val = sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1942 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1943
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1944 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1945 if(!sleep_status)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1946 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1947
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1948 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1949 /*GC_Wakeup(); OMAPS00134004*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1950 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1951
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1952 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1953 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1954 l1_trace_fail_sleep(FAIL_SLEEP_PERIPH_SLEEP, l1_pwmgr_debug.fail_id, l1_pwmgr_debug.fail_ret_val);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1955 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1956 local_sleep_status = Peripheral_interface[UART_ID](WAKE_CMD); //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1957 local_sleep_status = Peripheral_interface[USB_ID](WAKE_CMD); //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1958 local_sleep_status = Peripheral_interface[USIM_ID](WAKE_CMD); //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1959 local_sleep_status = Peripheral_interface[I2C_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1960 local_sleep_status = Peripheral_interface[LCD_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1961 local_sleep_status = Peripheral_interface[CAMERA_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1962 local_sleep_status = Peripheral_interface[MADC_AS_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1963 local_sleep_status = Peripheral_interface[BCI_ID](WAKE_CMD); //wake up for battery charger interface//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1964 INT_EnableIRQ();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1965 return;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1966 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1967 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1968
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1969 #endif // CHIPSET == 15
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1970
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1971 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1972 // update previous sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1973 previous_sleep = l1s.pw_mgr.sleep_performed;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1974 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1975
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1976
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1977 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1978
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1979 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1980 F_INTH_DISABLE_ONE_IT(C_INTH_FRAME_IT); // mask Frame int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1981 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1982 INTH_DISABLEONEIT(IQ_FRAME); // mask Frame int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1983 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1984 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1985
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1986 //=====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1987 // if CLOCK_STOP : stop RF, TPU, asleep Omega, DPLL, SPI
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1988 // if FRAME_STOP : asleep Omega, SPI
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1989 //=====================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1990 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1991 if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1992 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1993 // ==== STop RF and TPU..... ===================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1994
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1995 //L1_trace_string("Proceeding to Deep Sleep\n");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1996
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1997
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1998 l1dmacro_RF_sleep();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1999
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2000 // (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) =TPU_CTRL_RESET |
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2001 // TSP_CTRL_RESET |TPU_CTRL_CLK_EN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2002 // (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) =0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2003
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2004 //===== SET default value for gauging =========
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2005 // If we have come in here during the inactive period of cell
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2006 // selection, then load the ULPD timers with default values
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2007 // (used when the MS lost the network: in this case the deep sleep may be used)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2008 if (l1a_l1s_com.mode == CS_MODE0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2009 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2010 l1ctl_pgm_clk32(DEFAULT_HFMHZ_VALUE*8,DEFAULT_32KHZ_VALUE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2011 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2012
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2013 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2014
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2015
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2016 /* These APIs are to be provided by BSP */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2017 // Disable_APC_BG();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2018 gpio_sleep(); //LCD_Floating Pin Fix
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2019 DBB_Configure_DS();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2020
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2021 //gpio_sleep(); //LCD_Floating Pin Fix
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2022
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2023 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2024
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2025
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2026 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2027 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2028 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2029 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2030 //DBB_Configure_BS(); // Not used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2031 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2032 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2033
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2034
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2035 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2036 // The following command writes '0' into CKM_OCPCLK register in DRP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2037 // This is done before disabling DPLL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2038 // CKM_OCPCLK (R/W) = Address 0xFFFF040C
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2039 // Bit 0: 0 ?OCP clock is the DCXO clock.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2040 // 1 ?OCP clock is the divided DSP clock
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2041 // Bit 31:1 Not Used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2042 (drp_regs->CKM_OCPCLKL) &= (~(0x1));
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2043 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2044 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2045 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2046
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2047
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2048
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2049 //==============================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2050 // disable DPLL (do not provide clk to DSP & RIF (RIF))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2051 //==============================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2052 #if ((CHIPSET ==4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2053 // disable DPLL (do not provide clk to DSP & RIF (Bridge))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2054 ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) |= CLKM_DPLL_DIS ; /* CLKM_BRIDGE_DIS removed by Ranga*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2055 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2056
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2057 //==============================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2058 // if CLOCK_STOP or FRAME-STOP : Asleep OMEGA (ABB)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2059 //==============================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2060 #if (ANLG_FAM != 11)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2061 afc_fix = ABB_sleep(l1s.pw_mgr.sleep_performed, l1s.afc,l1s.pw_mgr.afc_bypass_mode);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2062 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2063 // Nothing to be done as it should be handled by BSP_TWL3029_Configure_DS/BS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2064 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2065
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2066 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2067 hci_ll_go_to_sleep();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2068 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2069 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2070 // STop SPI .....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2071 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2072
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2073 #if(CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2074 *((volatile UWORD16 *)MEM_SPI)&=0xFFFE; // SPI CLK DISABLED
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2075 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2076 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2077
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2078
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2079 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2080 // CQ19599: For Calypso+ chipset, extended page mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2081 // shall be disabled before entering deep sleep and
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2082 // restored at wake up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2083 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2084 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2085 extended_page_mode_state = (BOOL) f_memif_extended_page_mode_read_bit();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2086 f_memif_extended_page_mode_disable();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2087 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2088
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2089 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2090 // Init the timer :
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2091 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2092 // a margin of 4 frames (>MIN_SLEEP_TIME) is taken
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2093 // when evaluating system loading, because 1 frame
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2094 // is lost for wakeup only, and because sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2095 // duration less than 1 frame is not worth ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2096 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2097 // 1 2 3 4 5 6 7 8
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2098 // SLEEP_CTRL SLEEP WAKEUP TASK (RF,Timer, ...)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2099 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2100 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2101 //ULPD Timer can be loaded up to MAX_GSM_TIMER (possible in CS_MODE0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2102 if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2103 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2104 // DEEP SLEEP -> need time to setup afc and rf
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2105 wake_up_time = min_time - l1_config.params.rf_wakeup_tpu_scenario_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2106 #if (CODE_VERSION == NOT_SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2107 // Sleep one more TDMA - this is done as part of merging init and TPU control
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2108 wake_up_time += 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2109 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2110
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2111 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2112 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2113 // BIG SLEEP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2114 wake_up_time = min_time - 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2115
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2116
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2117
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2118 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2119 if ( wake_up_time >= MAX_GSM_TIMER)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2120 ULDP_TIMER_INIT(MAX_GSM_TIMER);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2121 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2122 ULDP_TIMER_INIT(wake_up_time);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2123
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2124 ULDP_TIMER_LD; // Load the timer
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2125
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2126 // BUG3060. Clear pending IQ_TGSM from ULPD. This could happen in case ULPD was frozen
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2127 // with zero into its GSM counter. In that case, the interrupt is still pending
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2128 // and if it is not cleared, it wakes the board up just after switching the clock.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2129 // Clear it into the ULPD...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2130 // The ULDP_GSM_TIMER_IT_REG is a read only register and is cleared on
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2131 //reading the register.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2132 temp_clear_intr =(* (volatile UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2133 // ... and next into the INTH. (must be done in this order
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2134
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2135 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2136 F_INTH_RESET_ONE_IT(C_INTH_TGSM_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2137 F_INTH_ENABLE_ONE_IT(C_INTH_TGSM_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2138 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2139 INTH_RESETONEIT(IQ_TGSM); // clear TDMA IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2140 INTH_ENABLEONEIT(IQ_TGSM); // Unmask ULPD GSM int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2141 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2142
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2143 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2144 if (READ_TRAFFIC_CONT_STATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2145 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2146 CSMI_TrafficControllerOff();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2147 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2148 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2149
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2150 ULDP_TIMER_START; // start count down
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2151
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2152
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2153 #if (GSM_IDLE_RAM_DEBUG == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2154 (*( volatile unsigned short* )(0xFFFE4802)) &= ~ (1 << 2); // GPIO-2=0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2155 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2156
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2157 if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2158 // DEEP SLEEP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2159 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2160 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2161 // specific sleep for WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2162 arm7_deep_sleep();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2163 #else // NO OP_WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2164 #if (W_A_CALYPSO_BUG_01435 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2165 f_arm_sleep_cmd(DEEP_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2166 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2167 //EMIF_SetConfReg ( 0, 0, 2 ,1 ,0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2168 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2169 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2170 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2171 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2172 *((volatile UWORD16 *)CLKM_ARM_CLK) &= ~(CLKM_DEEP_SLEEP); // set deep sleep mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2173 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2174 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2175 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2176 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2177 // set deep sleep mode in case it is not set back by hardware
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2178 *((volatile UWORD16 *)CLKM_ARM_CLK) |= (CLKM_DEEP_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2179
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2180 //EMIF_SetConfReg ( 0, 0, 2 ,0 ,0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2181 // *((volatile UWORD16 *)CLKM_ARM_CLK) &= 0xFFFF; // set deep sleep mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2182 // *((volatile UWORD16 *)CLKM_ARM_CLK) &= ~(CLKM_MCLK_EN); // For Debug only
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2183
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2184
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2185 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2186 #endif // OP_WCP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2187 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2188 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2189 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2190 // BIG SLEEP / l1s.pw_mgr.sleep_performed == FRAME_STOP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2191
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2192 //==========================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2193 //Shut down PERIPHERALS clocks UWIRE and ARMIO if authorized
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2194 //==========================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2195
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2196 #if(CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2197 UWORD16 clocks_stopped; //OMAPS90550- new
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2198 clocks_stopped = (l1s.pw_mgr.clocks & l1s.pw_mgr.modules_status);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2199 if((clocks_stopped & ARMIO_CLK_CUT) == ARMIO_CLK_CUT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2200 *((volatile UWORD16 *)ARMIO_CNTL_REG) &= ~(ARMIO_CLOCKEN);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2201 if((clocks_stopped & UWIRE_CLK_CUT) == UWIRE_CLK_CUT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2202 *((volatile UWORD16 *)(MEM_UWIRE + 0x8)) &= ~(0x0001);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2203 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2204 // Nothing to be done as it is taken care by Locosto_Configure_BS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2205 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2206
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2207 #if (W_A_CALYPSO_BUG_01435 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2208 f_arm_sleep_cmd(BIG_SLEEP);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2209 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2210
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2211 *((volatile UWORD16 *)CLKM_ARM_CLK) &= ~(CLKM_MCLK_EN); // set big sleep mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2212 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2213 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2214 #else // Simulation part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2215 l1s.pw_mgr.sleep_duration = wake_up_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2216 hw.deep_sleep_en = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2217 status = NU_Suspend_Task(&L1S_task);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2218 // check status value...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2219 if (status)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2220 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2221 #if (TRACE_TYPE==5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2222 sprintf(errormsg,"Error somewhere in the L1S application to suspend : deep sleep\n");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2223 log_sim_error(ERR);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2224 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2225 EXIT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2226 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2227 #endif // SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2228
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2229 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2230 // Wake-up procedure
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2231 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2232 // Restore L1 data base, Nucleus, HW Timers ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2233 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2234
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2235 #if (GSM_IDLE_RAM_DEBUG == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2236 (*( volatile unsigned short* )(0xFFFE4802)) |= (1 << 2); // GPIO-2=1
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2237 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2238
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2239
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2240 l1s_wakeup();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2241
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2242 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2243 // The following command writes '1' into CKM_OCPCLK register in DRP;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2244 // This is done after the DPLL is up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2245 // CKM_OCPCLK (R/W) = Address 0xFFFF040C
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2246 // Bit 0: 0 ?OCP clock is the DCXO clock.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2247 // 1 ?OCP clock is the divided DSP clock
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2248 // Bit 31:1 Not Used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2249 (drp_regs->CKM_OCPCLKL) |= (0x1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2250 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2251 asm(" NOP");
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2252 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2253
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2254 l1s.pw_mgr.wakeup_time = l1s.actual_time.fn_mod42432;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2255
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2256 if (l1s.pw_mgr.wakeup_time == sleep_time)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2257 // sleep duration == 0 -> wakeup in the same frame as sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2258 l1s.pw_mgr.wakeup_type = WAKEUP_ASYNCHRONOUS_SLEEP_DURATION_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2259
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2260 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2261 // Update counters with sleep duration -> will be used case expiration in next wake up phase before traffic controller is enabled by msg sending
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2262 gsm_idle_ram_ctl->os_load -= (l1s.pw_mgr.sleep_duration);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2263 gsm_idle_ram_ctl->hw_timer -= (l1s.pw_mgr.sleep_duration);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2264
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2265 if (l1s.pw_mgr.wakeup_type != WAKEUP_FOR_L1_TASK)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2266 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2267 if (!READ_TRAFFIC_CONT_STATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2268 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2269 CSMI_TrafficControllerOn();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2270 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2271 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2272 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2273 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2274 //if CLOCK_STOP : restart TPU and RF....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2275 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2276 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2277 if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2278 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2279 // (*(volatile UWORD16 *)l1s_tpu_com.reg_cmd) = TPU_CTRL_CLK_EN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2280 UWORD8 local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2281
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2282
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2283 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2284
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2285 DBB_Wakeup_DS();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2286
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2287 gpio_wakeup(); //LCD_Floating Pin Fix
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2288
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2289 /* These APIs to be provided by BSP */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2290 //Enable_APC_BG();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2291 //BT_Wakeup();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2292 //IRDA_Wakeup();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2293 local_sleep_status = Peripheral_interface[UART_ID](WAKE_CMD); //OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2294 local_sleep_status = Peripheral_interface[USB_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2295 local_sleep_status = Peripheral_interface[USIM_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2296 local_sleep_status = Peripheral_interface[I2C_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2297 local_sleep_status = Peripheral_interface[LCD_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2298 local_sleep_status = Peripheral_interface[CAMERA_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2299
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2300 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2301 local_sleep_status = Peripheral_interface[MADC_AS_ID](WAKE_CMD);//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2302 local_sleep_status = Peripheral_interface[BCI_ID](WAKE_CMD); //wake up for battery charger//OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2303 OS_system_protect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2304 //added for OMAPS00090550 warning removal
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2305 if(local_sleep_status == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2306 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2307 l1_pwmgr_debug.fail_ret_val = local_sleep_status;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2308 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2309 //upto this OMAPS00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2310
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2311
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2312 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2313 l1dmacro_RF_wakeup();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2314
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2315 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2316
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2317 #if ((CHIPSET ==4) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2318 // enable DPLL (provide clk to DSP & RIF(Bridge) in small/big sleep)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2319 // On CALYPSO, BRIDGE clock can be cut according to the ARM sleep mode even during DMA transfer
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2320 ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) &= ~(CLKM_DPLL_DIS | CLKM_BRIDGE_DIS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2321 #elif (CHIPSET == 12)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2322 // Nothing to be done because if DSP wants clock, it will exit from IDLE3 mode, which wakes up the DPLL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2323 #elif (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2324 ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) &= ~(CLKM_DPLL_DIS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2325 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2326
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2327 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2328 //if CLOCK_STOP or FRAME-STOP : ReStart SPI
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2329 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2330 #if(CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2331 *((volatile UWORD16 *)MEM_SPI)|=0x0001; // SPI CLK ENABLED
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2332 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2333
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2334 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2335 // Wake up ABB
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2336 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2337 #if (ANLG_FAM != 11)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2338 ABB_wakeup(l1s.pw_mgr.sleep_performed,l1s.afc,l1s.pw_mgr.afc_bypass_mode);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2339 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2340 // Nothing to be done here as it will be handled by BSP_TWL3029_Wakeup_DS/BS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2341 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2342
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2343 #if (OP_BT == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2344 hci_ll_wake_up();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2345 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2346 #endif //CODE VERSION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2347
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2348 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2349 // CQ19599: For Calypso+ chipset, restore the extended
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2350 // page mode if it was enabled before entering in sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2351 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2352 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2353 if ( extended_page_mode_state != 0 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2354 f_memif_extended_page_mode_enable();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2355 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2356
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2357 #if (OP_L1_STANDALONE == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2358 /*GC_Wakeup(); OMAPS00134004*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2359 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2360
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2361 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2362 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2363 // enable IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2364 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2365 OS_system_Unprotect();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2366 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2367
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2368 #if (TRACE_TYPE != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2369 if (l1a_l1s_com.mode != CS_MODE0) // in this mode the trace prevent from going to deep sleep due to UART activity
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2370 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2371 #if (GSM_IDLE_RAM == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2372 l1_trace_sleep(sleep_time,l1s.actual_time.fn_mod42432,l1s.pw_mgr.sleep_performed,l1s.pw_mgr.wakeup_type,l1s.pw_mgr.why_big_sleep, l1s.pw_mgr.wake_up_int_id);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2373 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2374 l1_trace_sleep_intram(sleep_time,l1s.actual_time.fn_mod42432,l1s.pw_mgr.sleep_performed,l1s.pw_mgr.wakeup_type,l1s.pw_mgr.why_big_sleep, l1s.pw_mgr.wake_up_int_id);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2375 #if (TRACE_TYPE==1) || (TRACE_TYPE==4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2376 l1s_trace_mftab();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2377 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2378 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2379 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2380 l1s.pw_mgr.wake_up_int_id = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2381 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2382
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2383 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2384 trace_info.sleep_performed = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2385 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2386
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2387 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2388
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2389 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2390 // enable IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2391 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2392 INT_EnableIRQ();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2393
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2394 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2395 // Be careful:in case of asynchronous wake-up after sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2396 // an IT_TDMA may be unmasked and executed just after OS_system_Unprotect().
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2397 // As we already are inside an hisr(), it implies the execution of an another hisr().
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2398 // In order to avoid issues with the execution of an hisr() inside the hisr()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2399 // do not add code here after !!!
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2400 // if possible respect this rule !
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2401 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2402
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2403 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2404 // wake-up UARTs
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2405 //this function must be call after the UART interrupt,
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2406 //it means after the function INT_EnableIRQ()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2407 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2408 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2409 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2410 // Traffic controller has to be enabled before calling SER_WakeUpUarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2411 // as this function can access the external RAM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2412 // Reset the flag that will indicates if an interrup will put the traffic
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2413 // controller ON during that time.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2414 l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2415 if (!READ_TRAFFIC_CONT_STATE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2416 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2417 flag_traffic_controller_state = 1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2418 CSMI_TrafficControllerOn();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2419 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2420 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2421
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2422
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2423
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2424 #if (CHIPSET != 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2425 SER_WakeUpUarts(); // Wake up Uarts
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2426 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2427 // To be checked if this needs a change
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2428 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2429
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2430
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2431 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2432 // The traffic controller state shall be restored as it was before
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2433 // calling SER_WakeUpUarts. Do not disable it if an interrup occured
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2434 // in between and activated the traffic controller.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2435 if ((flag_traffic_controller_state == 1) && (l1s.gsm_idle_ram_ctl.trff_ctrl_enable_cause_int == FALSE))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2436 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2437 CSMI_TrafficControllerOff();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2438 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2439 flag_traffic_controller_state = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2440 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2441 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2442 #endif // NOT SIMULATION
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2443 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2444 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2445
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2446 // l1s_wakeup() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2447 // Description: wake-up of the MCU from GSM Timer it OR unscheduled wake-up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2448 // This function read the TPU timer and fix the :
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2449 // - system clock
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2450 // - Nucleus timers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2451 // - L1 frame counter
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2452 // - L1 next task counter
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2453 // - Hardware timers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2454
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2455 void l1s_wakeup(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2456 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2457 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2458 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2459 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2460 // Restore interrupts ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2461
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2462 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2463 // mask TGSM int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2464 F_INTH_DISABLE_ONE_IT(C_INTH_TGSM_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2465 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2466 INTH_DISABLEONEIT(IQ_TGSM); // mask TGSM int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2467 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2468
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2469 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2470 l1s.pw_mgr.wake_up_int_id = ((* (SYS_UWORD16 *) C_INTH_B_IRQ_REG) & C_INTH_SRC_NUM);// For debug: Save IRQ that causes the waking up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2471 if ( l1s.pw_mgr.wake_up_int_id >= 256 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2472 l1s.pw_mgr.wake_up_int_id = ((* (SYS_UWORD16 *) C_INTH_B_FIQ_REG) & C_INTH_SRC_NUM)+100;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2473 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2474 l1s.pw_mgr.wake_up_int_id = ((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM);// For debug: Save IRQ that causes the waking up
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2475 if ( l1s.pw_mgr.wake_up_int_id >= 256 )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2476 l1s.pw_mgr.wake_up_int_id = ((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)+100;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2477 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2478
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2479 // clear pending IQ_FRAME it and unmask it
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2480 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2481 F_INTH_RESET_ONE_IT(C_INTH_FRAME_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2482 F_INTH_ENABLE_ONE_IT(C_INTH_FRAME_IT); // Unmask FRAME int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2483 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2484 INTH_RESETONEIT(IQ_FRAME); // clear TDMA IRQ
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2485 INTH_ENABLEONEIT(IQ_FRAME); // Unmask FRAME int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2486 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2487
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2488 #if (CHIPSET == 8)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2489 // if deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2490 if ( l1s.pw_mgr.sleep_performed == CLOCK_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2491 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2492 UWORD8 i;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2493
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2494 // Loop with check whether DPLL is locked: 100 us max.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2495 for (i=0;i<16;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2496 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2497 if (DPLL_READ_DPLL_LOCK)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2498 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2499 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2500 wait_ARM_cycles(convert_nanosec_to_cycles(50000)); // 50us
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2501
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2502 // Enable DPLL
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2503 //--------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2504 DPLL_SET_PLL_ENABLE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2505
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2506 // Loop with check whether DPLL is locked: 100 us max.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2507 for (i=0;i<16;i++)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2508 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2509 if (DPLL_READ_DPLL_LOCK)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2510 break;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2511 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2512 wait_ARM_cycles(convert_nanosec_to_cycles(50000)); // 50us
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2513 } // if deep sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2514
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2515 #endif // CHIPSET == 8
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2516
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2517 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2518 //Restart PERIPHERALS clocks if necessary after a big sleep period
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2519 // WARNING: restart other clocks modules!!!
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2520 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2521
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2522
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2523 #if(CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2524 if(l1s.pw_mgr.sleep_performed == FRAME_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2525 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2526
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2527 //ABB_Wakeup_BS(); //Not Used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2528 //DBB_Wakeup_BS(); //Not Used
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2529 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2530 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2531 // if big sleep
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2532 if ( l1s.pw_mgr.sleep_performed == FRAME_STOP )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2533 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2534
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2535 UWORD16 clocks_stopped;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2536 clocks_stopped = (l1s.pw_mgr.clocks & l1s.pw_mgr.modules_status);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2537 if((clocks_stopped & ARMIO_CLK_CUT) == ARMIO_CLK_CUT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2538 *((volatile UWORD16 *)ARMIO_CNTL_REG) |= ARMIO_CLOCKEN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2539 if((clocks_stopped & UWIRE_CLK_CUT) == UWIRE_CLK_CUT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2540 *((volatile UWORD16 *)(MEM_UWIRE + 0x8)) |= 0x0001;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2541
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2542 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2543 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2544
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2545
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2546 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2547 /* Compute effective sleeping time .... */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2548 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2549 /* sleep duration is */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2550 /* - TIMER_INIT */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2551 /* - or TIMER_INIT - TIMER_VALUE */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2552 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2553 /* "frame_adjust" = TRUE for unschedules wake-up */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2554 /* FALSE for scheduled wake-up */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2555 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2556 l1s.pw_mgr.frame_adjust = l1s_compute_wakeup_ticks();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2557
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2558 #if (TRACE_TYPE !=0 ) && (TRACE_TYPE != 2) && (TRACE_TYPE != 3)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2559 if ((l1s.pw_mgr.frame_adjust == TRUE))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2560 l1s.pw_mgr.wakeup_type = WAKEUP_BY_ASYNC_INTERRUPT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2561 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2562
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2563
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2564 /* Fix Frame */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2565
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2566 l1s_recover_Frame();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2567
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2568
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2569 /* Fix Hardware Timers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2570 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2571 /* GSM 1.0 : ntd - timer clock not cut */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2572 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2573 /* GSM 1.5 : deep sleep - need to fix timers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2574
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2575 if (l1s.pw_mgr.sleep_performed == CLOCK_STOP)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2576 l1s_recover_HWTimers();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2577
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2578
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2579 /* Fix Os */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2580
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2581 if (Cust_recover_Os()) l1s.pw_mgr.Os_ticks_required = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2582 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2583 #else // SIMULATION part
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2584 // update L1 timers (FN,...)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2585 l1s_recover_Frame();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2586 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2587 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2588
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2589
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2590
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2591 /* l1s_wakeup_adjust() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2592 /* Description: 1 frame adjust a fter unscheduled wake-up */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2593 /* This function fix the : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2594 /* - system clock */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2595 /* - Nucleus timers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2596 /* - L1 frame counter */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2597 /* - L1 next task counter */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2598 /* - Hardware timers */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2599
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2600
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2601 void l1s_wakeup_adjust ()
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2602 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2603 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2604 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2605 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2606
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2607 UWORD32 previous_sleep_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2608
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2609 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2610 // Freeze GSM Timer .... */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2611 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2612 ULDP_TIMER_FREEZE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2613
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2614 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2615 // Compute effective sleeping time ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2616 //
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2617 // compute sleep duration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2618 // - TIMER_INIT
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2619 // - or TIMER_INIT - TIMER_VALUE
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2620 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2621 // save sleep duration that was computed at "unscheduled wakeup"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2622 previous_sleep_time = l1s.pw_mgr.sleep_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2623
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2624 l1s_compute_wakeup_ticks();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2625
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2626 // reset flag for adjustment request ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2627 l1s.pw_mgr.frame_adjust = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2628
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2629 // fix sleep duration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2630 // => compute difference with duration computed at
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2631 // "unscheduled wakeup"
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2632 l1s.pw_mgr.sleep_duration -= previous_sleep_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2633
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2634 // adjust system with 1 frame IF NECESSARY ....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2635 if (l1s.pw_mgr.sleep_duration)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2636 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2637 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2638 /* Fix Frame */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2639 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2640 l1s_recover_Frame();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2641
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2642 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2643 /* Fix Os */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2644 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2645 if (Cust_recover_Os()) l1s.pw_mgr.Os_ticks_required = TRUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2646 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2647 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2648 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2649 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2650
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2651
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2652 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2653 /* l1s_compute_wakeup_Ticks() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2654 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2655 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2656 /* Description: wake-up */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2657 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2658 /* This function compute the sleep duration according to */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2659 /* current value of count down counter. */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2660 /* - if TIMER_VALUE = 0 it returns TIMER_INIT */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2661 /* - else it returns TIMER_INIT-TIMER_VALUE*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2662 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2663 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2664 BOOL l1s_compute_wakeup_ticks(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2665 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2666 UWORD16 temp_clear_intr;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2667 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2668 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2669 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2670 // read current value of count down counter
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2671 l1s.pw_mgr.sleep_duration = READ_ULDP_TIMER_VALUE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2672
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2673 // if count down=0 it's a scheduled wake-up....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2674 if (l1s.pw_mgr.sleep_duration == 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2675 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2676 // read sleeping planned value in TPU INIT register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2677 l1s.pw_mgr.sleep_duration = READ_ULDP_TIMER_INIT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2678 // INTH is different from the ULPD interrupt -> aynchronous wakeup
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2679 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2680 if (l1s.pw_mgr.wake_up_int_id != C_INTH_TGSM_IT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2681 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2682 if (l1s.pw_mgr.wake_up_int_id != IQ_TGSM)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2683 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2684 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2685 l1s.pw_mgr.wakeup_type = WAKEUP_ASYNCHRONOUS_ULPD_0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2686 // RESET IT_ULPD in ULPD module
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2687 // The ULDP_GSM_TIMER_IT_REG is a read only register and is cleared on reading the register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2688 temp_clear_intr =(* (volatile UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2689 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2690 // RESET IQ_TGSM (IT_ULPD) in IT register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2691 F_INTH_RESET_ONE_IT(C_INTH_TGSM_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2692 // RESET IQ_FRAME in IT register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2693 F_INTH_RESET_ONE_IT(C_INTH_FRAME_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2694 l1s.pw_mgr.wake_up_int_id = C_INTH_TGSM_IT;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2695 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2696 // RESET IQ_TGSM (IT_ULPD) in IT register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2697 INTH_RESETONEIT(IQ_TGSM);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2698 // RESET IQ_FRAME in IT register
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2699 INTH_RESETONEIT(IQ_FRAME);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2700 l1s.pw_mgr.wake_up_int_id = IQ_TGSM;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2701 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2702 return(FALSE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2703 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2704 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2705 return(FALSE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2706 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2707 else // Unscheduled wakeup
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2708 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2709 // read sleeping planned value in TPU INIT register & compute time elapsed
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2710 l1s.pw_mgr.sleep_duration = READ_ULDP_TIMER_INIT - l1s.pw_mgr.sleep_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2711 return(TRUE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2712 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2713 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2714 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2715 return(FALSE);//omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2716 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2717
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2718 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2719 /* l1s_recover_Frame() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2720 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2721 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2722 /* Description: adjust layer1 data from sleep duration */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2723 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2724 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2725 void l1s_recover_Frame(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2726 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2727 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2728 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2729 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2730 /* Fix Frame counters . */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2731 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2732 l1s.debug_time += l1s.pw_mgr.sleep_duration; // used for debug and by L3 scenario.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2733
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2734 // Time...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2735 // Update "actual time".
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2736 l1s_increment_time(&(l1s.actual_time), l1s.pw_mgr.sleep_duration);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2737
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2738 // Update "next time".
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2739 l1s.next_time = l1s.actual_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2740 l1s_increment_time(&(l1s.next_time), 1); // Next time is actual_time + 1
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2741
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2742 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2743 // Update "next plus time".
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2744 l1s.next_plus_time = l1s.next_time;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2745 l1s_increment_time(&(l1s.next_plus_time), 1); // Next_plus time is next_time + 1
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2746 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2747
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2748 #if (TRACE_TYPE == 1) || (TRACE_TYPE == 4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2749 trace_fct(CST_L1S_ADJUST_TIME, (UWORD32)(-1));
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2750 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2751
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2752 // Multiframe table...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2753 // Increment active frame % mftab size.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2754 l1s.afrm = (l1s.afrm + l1s.pw_mgr.sleep_duration) % MFTAB_SIZE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2755
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2756 // Control function counters...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2757 // Increment frame count from last AFC update.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2758 l1s.afc_frame_count+= l1s.pw_mgr.sleep_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2759 // reset counter to mask SNR/TOA results for 2 fr.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2760 #if (TOA_ALGO == 2)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2761 l1s.toa_var.toa_snr_mask=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2762 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2763 l1s.toa_snr_mask=0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2764 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2765
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2766 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2767 /* Fix next L1S task counter */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2768 /***************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2769 // Decrement time to next L1S task.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2770 if((l1a_l1s_com.time_to_next_l1s_task > 0) &&
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2771 (l1a_l1s_com.time_to_next_l1s_task < MAX_FN))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2772 l1a_l1s_com.time_to_next_l1s_task -= l1s.pw_mgr.sleep_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2773 } // l1_config.pwr_mngt == PWR_MNGT
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2774 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2775
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2776
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2777 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2778 /* l1s_recover_HWTimers() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2779 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2780 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2781 /* Description: adjust hardware timers from sleep */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2782 /* ------------ duration */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2783 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2784 /* Timers clocks are enabled after VTCX0+SLICER+13MHZ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2785 /* setup times. So sleep duration is : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2786 /* GSM TIMER - SETUP_FRAME + SETUP_SLICER + SETUP_VTCXO */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2787 /* + SETUP_CLK13 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2788 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2789
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2790 void l1s_recover_HWTimers(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2791 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2792 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2793
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2794 #define SETUP_FRAME_IN_CLK32 (SETUP_FRAME*4.615*32.768)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2795 #if (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2796 #define DELTA_TIME (0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2797 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2798 #define DELTA_TIME (SETUP_FRAME_IN_CLK32 -SETUP_SLICER - SETUP_VTCXO)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2799 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2800
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2801
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2802 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2803 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2804 WORD32 timer1,timer2,timer;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2805 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2806 WORD32 timer_sec;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2807 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2808 UWORD16 cntlreg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2809 UWORD16 modereg;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2810 double duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2811
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2812
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2813
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2814
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2815
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2816
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2817
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2818
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2819
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2820
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2821
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2822
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2823 //WORD32 old;- OMAPS 90550 new
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2824
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2825 // read Hercules Timers & Watchdog
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2826 //=================================================
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2827 // Tint = Tclk * (LOAD_TIM+1) * 2^(PTV+1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2828 // Tclk = 1.2308us for Fclk=13Mhz
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2829 // PTV = 7 (pre-scaler field)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2830 //-------------------------------------------------
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2831
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2832 cntlreg = Dtimer1_Get_cntlreg();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2833 if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2834 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2835 cntlreg = cntlreg&0x1F;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2836 cntlreg >>= 2; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2837 cntlreg = 1 << (cntlreg+1); // compute 2^(PTV+1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2838 // convert sleep duration in HWTimers ticks....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2839 duration = (l1s.pw_mgr.sleep_duration * 4.615 - (DELTA_TIME/32.768)) / (cntlreg * 0.0012308);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2840 if (duration < 0.0){
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2841 duration = 0.0; // This needs to be done for all the timers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2842 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2843 timer1 = Dtimer1_ReadValue() - (UWORD16) duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2844
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2845 Dtimer1_Start(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2846 Dtimer1_WriteValue(timer1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2847 Dtimer1_Start(1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2848 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2849
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2850 cntlreg = Dtimer2_Get_cntlreg();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2851 if ( (cntlreg & D_TIMER_RUN) == D_TIMER_RUN)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2852 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2853 cntlreg = cntlreg&0x1F;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2854 cntlreg >>= 2; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2855 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2856 // convert sleep duration in HWTimers ticks....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2857 duration = (l1s.pw_mgr.sleep_duration * 4.615 - (DELTA_TIME/32.768)) / (cntlreg * 0.0012308);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2858 if (duration < 0.0){
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2859 duration = 0.0; // This needs to be done for all the timers
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2860 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2861 timer2 = Dtimer2_ReadValue() - (UWORD16) duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2862 Dtimer2_Start(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2863 Dtimer2_WriteValue(timer2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2864 Dtimer2_Start(1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2865 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2866
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2867 cntlreg = TIMER_Read(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2868 modereg = TIMER_Read(2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2869 if ( (cntlreg & TIMER_ST) || (modereg & TIMER_WDOG))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2870 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2871 // in watchdog mode PTV is forced to 7
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2872 if ( modereg & TIMER_WDOG )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2873 cntlreg |= TIMER_PTV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2874
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2875 cntlreg = (cntlreg & TIMER_PTV) >> 9; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2876 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2877 // convert sleep duration in HWTimers ticks....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2878 duration = (l1s.pw_mgr.sleep_duration * 4.615 - (DELTA_TIME/32.768)) / (cntlreg * 0.001078);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2879
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2880 timer = TIMER_ReadValue() - (UWORD16) duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2881 TIMER_START_STOP(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2882 TIMER_WriteValue(timer);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2883 TIMER_START_STOP(1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2884 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2885
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2886 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2887 cntlreg = TIMER_SEC_Read(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2888 modereg = TIMER_SEC_Read(2);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2889 if ( (cntlreg & TIMER_ST) || (modereg & TIMER_WDOG))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2890 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2891 // in watchdog mode PTV is forced to 7
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2892 if ( modereg & TIMER_WDOG )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2893 cntlreg |= TIMER_PTV;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2894
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2895 cntlreg = (cntlreg & TIMER_PTV) >> 9; // take PTV
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2896 cntlreg = 1 << (cntlreg+1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2897 // convert sleep duration in HWTimers ticks....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2898 duration = (l1s.pw_mgr.sleep_duration * 4.615 - (DELTA_TIME/32.768)) / (cntlreg * 0.001078);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2899
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2900 timer_sec = TIMER_SEC_ReadValue() - (UWORD16) duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2901 TIMER_SEC_START_STOP(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2902 TIMER_SEC_WriteValue(timer_sec);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2903 TIMER_SEC_START_STOP(1);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2904 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2905 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2906
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2907 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2908 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2909 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2910 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2911 /* l1s_get_next_gauging_in_Packet_Idle() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2912 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2913 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2914 /* Description: */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2915 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2916 /* return the nbr of frames before the next gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2917 /* return -1 means no activity planned */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2918 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2919 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2920 UWORD32 l1s_get_next_gauging_in_Packet_Idle(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2921 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2922 WORD32 next_gauging;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2923
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2924 // gauging performed with Normal Paging (we are in Idle mode)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2925 if (l1a_l1s_com.l1s_en_task[NP] == TASK_ENABLED)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2926 return ((UWORD32)(-1)); // no activity planned //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2927
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2928 // we are not in Packet Idle Mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2929 if (l1a_l1s_com.l1s_en_task[PNP] != TASK_ENABLED)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2930 return ((UWORD32)(-1)); // no activity planned //omaps00090550
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2931
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2932 next_gauging = l1s.next_gauging_scheduled_for_PNP - l1s.actual_time.fn ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2933 if (next_gauging < 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2934 next_gauging+=MAX_FN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2935
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2936 if (next_gauging <= MIN_SLEEP_TIME)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2937 return(0);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2938
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2939 return (next_gauging);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2940 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2941 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2942 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2943 /* l1s_gauging_decision_with_PNP() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2944 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2945 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2946 /* Description: */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2947 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2948 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2949 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2950 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2951 BOOL l1s_gauging_decision_with_PNP(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2952 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2953 #define TWO_SECONDS_IN_FRAME (UWORD16)(2000/4.615)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2954 WORD32 time_to_next_gauging=0; //changed to WORD32- sajal
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2955 // It's time to perform the next gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2956 time_to_next_gauging = l1s.next_gauging_scheduled_for_PNP - l1s.actual_time.fn;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2957 if (time_to_next_gauging < 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2958 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2959 time_to_next_gauging += MAX_FN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2960 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2961
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2962 if( (time_to_next_gauging == 0) || (time_to_next_gauging > TWO_SECONDS_IN_FRAME))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2963 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2964
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2965 l1s.next_gauging_scheduled_for_PNP = l1s.actual_time.fn + TWO_SECONDS_IN_FRAME;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2966 if (l1s.next_gauging_scheduled_for_PNP >= MAX_FN) l1s.next_gauging_scheduled_for_PNP -= MAX_FN;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2967 return (TRUE);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2968 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2969
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2970 return (FALSE); // do not perform gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2971 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2972 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2973 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2974 /* l1s_gauging_decision_with_NP() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2975 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2976 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2977 /* Description: */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2978 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2979 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2980 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2981 BOOL l1s_gauging_decision_with_NP(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2982 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2983
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2984 static UWORD8 time_to_gaug;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2985
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2986 // a paging is scheduled or , was scheduled but discarded by a higher priority task
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2987 if (l1s.pw_mgr.paging_scheduled == TRUE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2988 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2989 l1s.pw_mgr.paging_scheduled = FALSE; // reset Flag.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2990
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2991 // A gauging session is needed : start gauging session with this paging bloc !
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2992
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2993 //Nina modify to save power, not forbid deep sleep, only force gauging in next paging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2994 #if 0
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2995 if (l1s.pw_mgr.enough_gaug != TRUE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2996 time_to_gaug = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2997 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2998 if ((l1s.pw_mgr.enough_gaug != TRUE)||(l1s.force_gauging_next_paging_due_to_CCHR == 1))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2999 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3000 time_to_gaug = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3001 l1s.force_gauging_next_paging_due_to_CCHR = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3002 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3003 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3004 if (time_to_gaug > 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3005 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3006 time_to_gaug--; // perform the gauging with an another paging.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3007 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3008 else // perform the gauging with this paging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3009 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3010 if (l1s.task_status[NP].current_status == ACTIVE )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3011 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3012 time_to_gaug = GAUG_VS_PAGING_RATE[l1a_l1s_com.bs_pa_mfrms-2]-1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3013
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3014 return (TRUE); // gauging allowed
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3015 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3016 else // a gauging is scheduled to be perform here but the paging is missing
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3017 { // (paging discarded by a higher priority task ?)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3018 l1s.pw_mgr.enough_gaug= FALSE; // forbid Deep sleep until next gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3019 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3020 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3021 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3022 return (FALSE); // gauging not allowed
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3023 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3024
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3025 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3026 /* Gauging task management : */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3027 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3028 /* CALYPSO */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3029 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3030 /* 9 8 7 6 5 4 3 2 1 0 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3031 /* C0 C1 C2 C3 C4 W R - - - */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3032 /* | | */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3033 /* | | */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3034 /* |_ start gauging |_ stop gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3035 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3036 /*OTHERS: */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3037 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3038 /* 11 10 9 8 7 6 5 4 3 2 1 0 */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3039 /* C0 C1 C2 C3 C4 W R - - - - - */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3040 /* | | | | | */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3041 /* | | |_ start gauging |_ stop gauging */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3042 /* | | | | */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3043 /* | |_ (ITCOM) | |(ITCOM) */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3044 /* | | */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3045 /* |_ pgm PLL |_restore PLL */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3046 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3047 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3048 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3049 void l1s_gauging_task(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3050 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3051 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3052 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3053 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3054 if (l1s.pw_mgr.gauging_task == ACTIVE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3055 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3056 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3057 // COUNT = 10 ==> PLL is at 65 Mhz, start the gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3058 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3059 #if (CHIPSET==7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3060 // the gauging was started with the begining of the paging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3061 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3062 if (l1s.pw_mgr.gaug_count == (l1s.pw_mgr.gaug_duration-1))
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3063 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3064 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3065 ULDP_GAUGING_START; // start gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3066 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3067
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3068 #if (TRACE_TYPE != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3069 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3070 l1_trace_gauging_intram();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3071 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3072 l1_trace_gauging();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3073 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3074 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3075 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3076 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3077
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3078 l1s.pw_mgr.gaug_count--; // decrement counter
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3079
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3080
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3081 // When a MISC task is enabled L1S must be ran every frame
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3082 // to be able to enable the frame interrupt for DSP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3083 l1a_l1s_com.time_to_next_l1s_task = 0;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3084 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3085
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3086 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3087 // REQUEST A GAUGING PROCESS ON EACH PAGING BLOCK
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3088 // IN IDLE MODE .....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3089 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3090
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3091 else if (l1s.pw_mgr.gauging_task == INACTIVE )
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3092 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3093 BOOL decision = FALSE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3094
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3095 if (l1a_l1s_com.l1s_en_task[NP] == TASK_ENABLED)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3096 decision = l1s_gauging_decision_with_NP();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3097 #if L1_GPRS
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3098 else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3099 if (l1a_l1s_com.l1s_en_task[PNP] == TASK_ENABLED)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3100 decision = l1s_gauging_decision_with_PNP();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3101 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3102
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3103 if (decision == TRUE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3104 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3105 // gauging duration
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3106 l1s.pw_mgr.gaug_count = l1s.pw_mgr.gaug_duration;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3107
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3108 #if (CHIPSET==7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3109 // start ULPD gauging immediately with Calypso because we needn't IT_COM.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3110 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3111 ULDP_GAUGING_START;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3112 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3113 // Force the DPLL to be active
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3114 ( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) &= ~(CLKM_DPLL_DIS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3115 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3116 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3117
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3118 #if (TRACE_TYPE != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3119 #if (GSM_IDLE_RAM != 0)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3120 l1_trace_gauging_intram();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3121 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3122 l1_trace_gauging();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3123 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3124 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3125 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3126
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3127 // DSP programmation .......
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3128 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3129 #if (CHIPSET==4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3130 l1s_dsp_com.dsp_ndb_ptr->d_pll_config |= B_32KHZ_CALIB;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3131 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3132 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3133 l1s_dsp_com.dsp_ndb_ptr->d_pll_clkmod1 = CLKMOD2; // IDLE1 only for DSP
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3134 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3135
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3136 l1s.pw_mgr.gauging_task = ACTIVE;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3137 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3138 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3139 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3140 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3141 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3142 /* l1s_gauging_task_end() */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3143 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3144 /* */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3145 /* Description: */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3146 /* ------------ */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3147 /* stop the gauging activity */
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3148 /*-------------------------------------------------------*/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3149 void l1s_gauging_task_end(void)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3150 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3151 if (l1_config.pwr_mngt == PWR_MNGT)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3152 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3153 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3154 if (l1s.pw_mgr.gauging_task == ACTIVE)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3155 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3156 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3157 // COUNT = 1 ==> stop the gauging and free DSP idle modes....
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3158 /*************************************************************/
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3159 if (l1s.pw_mgr.gaug_count == 1)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3160 {
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3161 // wait for end of gauging interrupt ...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3162 l1s.pw_mgr.gauging_task = WAIT_IQ;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3163
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3164 // Unmask ULPD GAUGING int.
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3165 #if (CODE_VERSION != SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3166 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3167 F_INTH_ENABLE_ONE_IT(C_INTH_ULPD_GAUGING_IT);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3168 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3169 INTH_ENABLEONEIT(IQ_ULPD_GAUGING);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3170 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3171 ULDP_GAUGING_STOP; // stop ULPD gauging
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3172 #if (CHIPSET == 12) || (CHIPSET == 15)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3173 // Allow the DPLL to be cut according to ARM sleep mode
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3174 //( * (volatile SYS_UWORD16 *) CLKM_CNTL_CLK) |= (CLKM_DPLL_DIS);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3175 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3176 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3177
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3178 // DSP programmation : free IDLE modes...
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3179 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3180 #if (CHIPSET==4)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3181 l1s_dsp_com.dsp_ndb_ptr->d_pll_config &= ~B_32KHZ_CALIB;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3182 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3183 #else
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3184 l1s_dsp_com.dsp_ndb_ptr->d_pll_clkmod1 = CLKMOD1;
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3185 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3186
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3187
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3188 #if (CODE_VERSION == SIMULATION)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3189 // in order to simulate the Gauging interrupt
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3190 GAUGING_Handler();
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3191
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3192 #if (TRACE_TYPE==5)
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3193 trace_ULPD("Stop Gauging", l1s.actual_time.fn);
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3194 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3195 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3196 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3197 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3198 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3199 }
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3200
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3201 //#pragma GSM_IDLE_DUPLICATE_FOR_INTERNAL_RAM_END
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3202 #endif
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3203
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3204
96a96ec34139 gsm-fw/L1/cfile: initial import from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3205