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annotate gsm-fw/bsp/abb+spi/Makefile @ 1003:9b147d0b2cab

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gsm-fw feature tch-reroute: started laying the foundation
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Fri, 18 Mar 2016 16:37:28 +0000
parents 6fd70825db76
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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47754cdb6248 abb.c compiles!
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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1 CC= arm-elf-gcc
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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2 CFLAGS= -O2 -fno-builtin -mthumb-interwork -mthumb
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3 LD= arm-elf-ld
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4
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05342cadbaf1 gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 157
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5 sinclude ../../include/config.mk
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6
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e48ea5875df7 gsm-fw: SPI task code compiles and links
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 154
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7 OBJS= abb.o spi_api.o spi_drv.o spi_env.o spi_process.o spi_task.o
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8
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05342cadbaf1 gsm-fw/bsp/abb+spi: abb_core_inth.c compiles with L1 enabled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 157
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9 ifeq (${CONFIG_INCLUDE_L1},1)
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6fd70825db76 gsm-fw/bsp/abb+spi: abb_inth.c compiles with L1 enabled
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parents: 590
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10 OBJS+= abb_core_inth.o abb_inth.o
590
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parents: 157
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11 endif
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parents: 157
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12
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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13 HDRS= abb.h abb_core_inth.h abb_inline.h abb_inth.h spi_api.h spi_drv.h \
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14 spi_env.h spi_pool_size.h spi_process.h spi_task.h
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15
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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16 all: xipcode.o
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17
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18 ${OBJS}: ${HDRS}
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19
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20 xipcode.o: ${OBJS}
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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21 ${LD} -r -o $@ ${OBJS}
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22
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23 clean:
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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24 rm -f *.[oa] *errs