annotate gsm-fw/L1/cfile/Makefile @ 992:a7b0b426f9ca

target-utils: boot ROM UART autodetection revamped The new implementation should work with both the familiar Calypso C035 boot ROM version found in our regular targets as well as the older Calypso F741979B version found on the vintage D-Sample board.
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 30 Dec 2015 21:28:41 +0000
parents 3f178b3ac50a
children 9b147d0b2cab
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1 CC= arm-elf-gcc
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2 CPPFLAGS=-I../../include -I../include -I../audio_include -I../audio_cust0 \
926
3f178b3ac50a gsm-fw: preparations for building with L1_DYN_DSP_DWNLD enabled
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 602
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3 -I../dyn_dwl_include -I../tm_include -I../tm_cust0 -I../cust0 \
3f178b3ac50a gsm-fw: preparations for building with L1_DYN_DSP_DWNLD enabled
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4 -I../tpudrv -DMOVE_IN_INTERNAL_RAM
546
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5 CFLAGS= -O2 -fno-builtin -mthumb-interwork
571
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 569
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6 ASFLAGS=-mthumb-interwork
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c7e53436c451 L1: starting to compile core C files
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7 LD= arm-elf-ld
551
2e662daa7441 L1: l1_cmplx.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 550
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8 INTSED= ../intram.sed
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9
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335f9b00f8fc L1: l1_mfmgr.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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10 IOBJS= l1_api_hisr.o l1_cmplx_intram.o l1_ctl.o l1_drive.o l1_func.o \
600
3fea71719423 L1: l1_isr_glue.c moved to cfile directory; compiles successfully
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 575
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11 l1_mfmgr.o l1_small_asm.o l1_sync_intram.o l1_isr_glue.o
571
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 569
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12 XOBJS= l1_afunc.o l1_async.o l1_cmplx.o l1_init.o l1_pwmgr.o l1_small_defs.o \
602
5f93a9a8f9a0 L1: [rt]x_tch_data() stubs implemented
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 600
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13 l1_sync.o l1_trace.o dummy_tch_data.o
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14
575
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 574
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15 all: iramcode.o xipcode.o
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c7e53436c451 L1: starting to compile core C files
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c7e53436c451 L1: starting to compile core C files
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17 ${XOBJS}: %.o : %.c
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18 ${CC} ${CFLAGS} ${CPPFLAGS} -mthumb -c $<
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19
551
2e662daa7441 L1: l1_cmplx.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 550
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20 l1_cmplx_intram.c: l1_cmplx.c ${INTSED}
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parents: 550
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21 sed -n -f ${INTSED} l1_cmplx.c > $@
2e662daa7441 L1: l1_cmplx.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 550
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22
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9df89f93d311 L1: l1_sync.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 568
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23 l1_sync_intram.c: l1_sync.c ${INTSED}
9df89f93d311 L1: l1_sync.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 568
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24 sed -n -f ${INTSED} l1_sync.c > $@
9df89f93d311 L1: l1_sync.c compiles for IRAM
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parents: 568
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25
575
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 574
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26 iramcode.o: ${IOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 574
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27 ${LD} -r -o $@ ${IOBJS}
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28
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built
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29 xipcode.o: ${XOBJS}
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parents: 574
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30 ${LD} -r -o $@ ${XOBJS}
1d7a12925b8e gsm-fw/L1/cfile: iramcode.o and xipcode.o built
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31
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c7e53436c451 L1: starting to compile core C files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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32 clean:
551
2e662daa7441 L1: l1_cmplx.c compiles for IRAM
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 550
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33 rm -f *.[oa] l1_*_intram.c *.out *errs