annotate gsm-fw/riviera/init/create_RVtasks.c @ 992:a7b0b426f9ca

target-utils: boot ROM UART autodetection revamped The new implementation should work with both the familiar Calypso C035 boot ROM version found in our regular targets as well as the older Calypso F741979B version found on the vintage D-Sample board.
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 30 Dec 2015 21:28:41 +0000
parents 60afcd233b04
children
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1 /******************************************************************************
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2 * *
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3 * Name create_RVtasks.c *
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4 * *
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5 * Function this file contains functions allowing tasks creation in *
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6 * the Riviera environment *
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7 * *
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8 * Version 0.1 *
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9 * *
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10 * Date Modification *
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11 * ------------------------------------ *
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12 * 03 August 2000 Create *
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13 * *
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14 * Author Pascal Puel *
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15 * *
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16 * (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved *
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17 * *
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18 * -------------------------------------------------------------------------- *
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19 * *
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20 * History: *
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21 * *
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22 * 10/18/2001 - Updated for R2D by Christophe Favergeon *
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23 * 08/28/2002 - Clean-Up by Gerard Cauvy *
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24 * *
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25 *****************************************************************************/
129
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26
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27 #include "../../include/config.h"
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28
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29 #include "../rv/rv_general.h"
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30 #include "../rvf/rvf_api.h"
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31 #include "../rvm/rvm_api.h"
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32 #include "../rvm/rvm_use_id_list.h"
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33 #include "../rvt/rvt_gen.h"
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34
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35 #if 0
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36 //sys_types.h is necessary for function prototypes in buzzer.h
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37 #include "sys_types.h"
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38 #include "buzzer/buzzer.h"
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39 #endif
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40
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41 #include "../rv/rv_defined_swe.h"
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42
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43 #if 0 //#ifndef _WINDOWS
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44 # include "power/power.h"
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45 #endif
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46
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47 #include <stdio.h>
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48 #include <string.h>
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49
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50 #define START_TASK_ID (MAX_RVF_TASKS-1)
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51 #define RV_START_TASK_PRIO (249)
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52
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53 T_RVT_USER_ID rv_trace_user_id = 0xff;
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54 T_RVT_USER_ID etm_trace_user_id;
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55
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56 extern void etm_receive(unsigned char *inbuf, unsigned short size);
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57
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58 #ifdef MIXED_TRACE
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59 T_RVT_USER_ID l23_trace_user_id;
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60 extern void ext_processExtInput (T_RVT_BUFFER, UINT16);
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61 #endif
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62
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63 #ifdef RVM_RNET_BR_SWE
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64 T_RVT_USER_ID rnet_trace_user_id;
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65 extern void rnet_receive (UINT8 *inbuf, UINT16 size);
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66 #endif
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67
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68 #if (TEST==1)
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69
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70 // The name that uniquely identifies the Memory Bank MUST be
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71 // 'TEST1', whereas it might be used by some other software
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72 // entity for testing purpose.
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73 #define RVTEST_MENU_MB_NAME ("TEST1")
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74
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75 // Memory requirements.
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76 #define RVTEST_MENU_MB_SIZE (5000)
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77 #define RVTEST_MENU_MB_WATERMARK (4000)
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78
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79 extern void rv_test (UINT32 p);
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80 #endif
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81
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82
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83 /*******************************************************************************
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84 **
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85 ** Function rvt_init_trace
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86 **
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87 ** Description This function is called by the RV_START task to register
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88 ** the Riviera Frame in the trace module
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89 **
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90 ** Returns void
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91 **
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92 *******************************************************************************/
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93 void rvt_init_trace (void)
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94 {
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95 rvt_register_id ("RV", &rv_trace_user_id, rvt_set_trace_level);
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96 }
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97
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98 #ifdef RVM_ETM_SWE
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99 /*******************************************************************************
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100 **
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101 ** Function etm_init_trace
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102 **
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103 ** Description This function is called by the RV_START task to register
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104 ** the ETM in the trace module
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105 **
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106 ** Returns void
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107 **
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108 *******************************************************************************/
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109 void etm_init_trace (void)
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110 {
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111 extern T_RVT_USER_ID tm_trace_user_id;
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112
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113 rvt_register_id("TM", &etm_trace_user_id, etm_receive);
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114
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115 #if 0 //(PSP_STANDALONE != 1)
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116 tm_trace_user_id = etm_trace_user_id; // TML1 use the tm_trace_user_id
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117 #endif
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118 }
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119 #endif
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120
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121 #ifdef MIXED_TRACE
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122 /*******************************************************************************
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123 **
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124 ** Function l23_init_trace
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125 **
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126 ** Description This function is called by the RV_START task to register
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127 ** the Protocol Stack (Layers 2 & 3) in the trace module
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128 **
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129 ** Returns void
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130 **
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131 *******************************************************************************/
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132 void l23_init_trace (void)
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133 {
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134 rvt_register_id ("L23", &l23_trace_user_id, ext_processExtInput);
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135 }
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136 #endif
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137
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138 #ifdef RVM_RNET_BR_SWE
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139 /*******************************************************************************
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140 **
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141 ** Function rnet_init_trace
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142 **
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143 ** Description This function is called by the RV_START task to register
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144 ** RNET in the trace module
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145 **
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146 ** Returns void
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147 **
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148 *******************************************************************************/
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149 void rnet_init_trace (void)
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150 {
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151 rvt_register_id ("RNET", &rnet_trace_user_id, rnet_receive);
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152 }
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153 #endif
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154
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155
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156 /*******************************************************************************
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157 **
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158 ** Function rv_start_swe_and_check
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159 **
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160 ** Description This internal function is called by the stater task to
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161 ** start the basic SWEs in the system and to check if
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162 ** they started successfully or not.
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163 **
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164 ** Returns void
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165 **
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166 *******************************************************************************/
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167 BOOLEAN rv_start_swe_and_check (T_RVM_USE_ID swe_use_id, T_RVM_NAME swe_name)
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168 {
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169 T_RV_RETURN return_path = {0};
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170 T_RV_HDR *msg_ptr = NULL;
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171 UINT16 rec_evt = 0;
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172 char error_msg[150] = "";
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173
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174 /* temporary initialization of addr_id */
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175 return_path.addr_id = START_TASK_ID;
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176 return_path.callback_func = NULL;
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177
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178 /* attempt to initialize the required SWE */
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179 if (rvm_start_swe (swe_use_id, return_path) != RVM_OK)
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180 {
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181 sprintf (error_msg,
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182 "create_RVtasks: Unable to start %s (0x%.8x). Error in rvm_start_swe",
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183 (char *)swe_name,
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184 swe_use_id);
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185 rvf_send_trace ((char *)error_msg,
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186 strlen((char *)error_msg),
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187 NULL_PARAM,
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188 RV_TRACE_LEVEL_WARNING, RVM_USE_ID);
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189 return FALSE;
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190 }
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191
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192 /*
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193 * wait for the SWE to be actually started.
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194 * note that the 'RVM_EVT_TO_APPLI' notification is sent back
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195 * once xxx_start () is invoked.
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196 */
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197 while (rec_evt = rvf_evt_wait (START_TASK_ID, \
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198 0xFFFF, \
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199 0xFFFFFFFFL))
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200 {
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201 if (rec_evt & ~RVF_TASK_MBOX_0_EVT_MASK)
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202 {
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203 sprintf (error_msg,
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204 "create_RVtasks: Starting %s (0x%.8x). Event ",
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205 (char *)swe_name,
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206 swe_use_id);
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207 rvf_send_trace ((char *)error_msg,
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208 strlen((char *)error_msg),
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209 (UINT32)rec_evt,
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210 RV_TRACE_LEVEL_WARNING,
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211 RVM_USE_ID);
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212 }
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213 if (rec_evt & RVF_TASK_MBOX_0_EVT_MASK)
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214 {
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215 if ((msg_ptr = (T_RV_HDR *) rvf_read_addr_mbox (START_TASK_ID, \
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216 RVF_TASK_MBOX_0)) == NULL)
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217 {
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218 sprintf (error_msg,
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219 "create_RVtasks: Starting %s (0x%.8x). Message NULL",
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220 (char *)swe_name,
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221 swe_use_id);
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222 rvf_send_trace ((char *)error_msg,
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223 strlen((char *)error_msg),
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224 NULL_PARAM,
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225 RV_TRACE_LEVEL_WARNING,
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226 RVM_USE_ID);
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227 continue;
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228 }
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229 if (msg_ptr->msg_id != RVM_EVT_TO_APPLI)
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230 {
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231 sprintf (error_msg,
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232 "create_RVtasks: Starting %s (0x%.8x). Message ID ",
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233 (char *)swe_name,
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234 swe_use_id);
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235 rvf_send_trace ((char *)error_msg,
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236 strlen((char *)error_msg),
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237 msg_ptr->msg_id,
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238 RV_TRACE_LEVEL_WARNING,
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239 RVM_USE_ID);
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240 rvf_free_buf (msg_ptr);
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241 continue;
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242 }
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243 break;
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244 }
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245 }
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246 switch (((T_RVM_APPLI_RESULT *)msg_ptr)->result)
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247 {
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248 case RVM_OK:
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249 {
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250 sprintf (error_msg,
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251 "create_RVtasks: %s (0x%.8x) started",
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252 (char *)swe_name,
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253 swe_use_id);
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254 rvf_send_trace ((char *)error_msg,
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255 strlen ((char *)error_msg),
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256 NULL_PARAM,
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257 RV_TRACE_LEVEL_DEBUG_HIGH,
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258 RVM_USE_ID);
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259 rvf_free_buf (msg_ptr);
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260 return TRUE;
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261 }
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262 case RVM_NOT_READY:
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263 {
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diff changeset
264 sprintf (error_msg,
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diff changeset
265 "create_RVtasks: %s (0x%.8x) already started",
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266 (char *)swe_name,
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267 swe_use_id);
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268 rvf_send_trace ((char *)error_msg,
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269 strlen ((char *)error_msg),
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270 NULL_PARAM,
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271 RV_TRACE_LEVEL_DEBUG_MEDIUM,
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272 RVM_USE_ID);
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273 rvf_free_buf (msg_ptr);
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274 return TRUE;
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275 }
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276 default:
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277 {
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278 break;
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279 }
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280 }
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281 sprintf (error_msg,
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282 "create_RVtasks: Unable to start %s (0x%.8x). Error ",
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283 (char *)swe_name,
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284 swe_use_id);
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285 rvf_send_trace ((char *)error_msg,
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286 strlen ((char *)error_msg),
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287 ((T_RVM_APPLI_RESULT *)msg_ptr)->result,
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288 RV_TRACE_LEVEL_WARNING,
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289 RVM_USE_ID);
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290 rvf_free_buf (msg_ptr);
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291 return FALSE;
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292 }
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293
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294 /*******************************************************************************
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295 **
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296 ** Function rv_start
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297 **
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298 ** Description This function is called by the RV_START task. It starts the
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299 ** Riviera environment and the TRACE task. This start must be
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300 ** done after Application_initialize().
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301 **
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302 ** Returns void
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303 **
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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304 *******************************************************************************/
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305 void rv_start (void)
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306 {
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307 #if (TEST==1)
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308 T_RVF_MB_ID mb_id = RVF_INVALID_MB_ID;
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309 T_RVF_MB_PARAM mb_requirements = {0};
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310 volatile UINT16 result = 0;
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311 #endif
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312
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313 /* initialize the RVM and the RVF at the same time */
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314 rvm_start_environment ();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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315 /*
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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316 ** Init trace module
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317 */
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318 rvt_init_trace ();
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319 #ifdef RVM_ETM_SWE
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320 etm_init_trace ();
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321 #endif
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322
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323 #if CONFIG_GSM
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324 #ifdef MIXED_TRACE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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325 l23_init_trace ();
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326 #endif
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327 #endif // if (_GSM==1)
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328
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329 #ifdef RVM_RNET_BR_SWE
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330 rnet_init_trace ();
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331 #endif
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332
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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333 #if (REMU==1)
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334 #ifdef RVM_LLS_SWE
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335 /* initialize LLS SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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336 lls_init();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff changeset
337 #endif
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338
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339 #ifdef RVM_RNG_SWE
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diff changeset
340 /* initialize RNG SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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341 rng_init ();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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343 #endif
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344
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345 #ifdef RVM_RVT_SWE
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parents:
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346 /* initialize TRACE SWE */
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parents:
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347 rv_start_swe_and_check (RVT_USE_ID, "RVT");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348 #endif
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349
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff changeset
350 #ifdef RVM_I2C_SWE
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parents:
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351 rv_start_swe_and_check (I2C_USE_ID, "I2C");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 #endif
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353
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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354 #ifdef RVM_DMA_SWE
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parents:
diff changeset
355 rv_start_swe_and_check (DMA_USE_ID, "DMA");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358 #ifdef RVM_DMG_SWE
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parents:
diff changeset
359 rv_start_swe_and_check (DMG_USE_ID, "DMG");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 #ifdef RVM_NAN_SWE
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parents:
diff changeset
363 rv_start_swe_and_check (NAN_USE_ID, "NAN");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366 #ifdef RVM_MC_SWE
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parents:
diff changeset
367 rv_start_swe_and_check (MC_USE_ID, "MC");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 #endif
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parents:
diff changeset
369
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 #ifdef RVM_FFS_SWE
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parents:
diff changeset
371 /* initialize FFS SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 rv_start_swe_and_check (FFS_USE_ID, "FFS");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 #ifdef RVM_SPI_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 /* initialize SPI SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 rv_start_swe_and_check (SPI_USE_ID, "SPI");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 #ifdef RVM_PWR_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 /* initialize PWR SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 rv_start_swe_and_check (PWR_USE_ID, "PWR");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385 #ifdef RVM_LCC_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
386 /* initialize LCC(PWR) SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 rv_start_swe_and_check (LCC_USE_ID, "LCC");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 #ifdef RVM_KPD_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 /* initialize KPD SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392 rv_start_swe_and_check (KPD_USE_ID, "KPD");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 #ifdef RVM_DAR_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396 /* initialize DAR SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
397 rv_start_swe_and_check (DAR_USE_ID, "DAR");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 #ifdef RVM_R2D_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 /* initialize R2D SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 rv_start_swe_and_check (R2D_USE_ID, "R2D");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 #ifdef RVM_LCD_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 /* initialize LCD SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407 rv_start_swe_and_check (LCD_USE_ID, "LCD");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 #ifdef RVM_ETM_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412 /* initialize ETM SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 rv_start_swe_and_check (ETM_USE_ID, "ETM");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 #ifdef RVM_TTY_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417 /* initialize TTY SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 rv_start_swe_and_check (TTY_USE_ID, "TTY");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
419 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 #ifdef RVM_AUDIO_MAIN_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 /* initialize AUDIO SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 rv_start_swe_and_check (AUDIO_USE_ID, "AUDIO");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 #if 1 //(PSP_STANDALONE==0)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 #ifdef RVM_AUDIO_BGD_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429 /* initialize AUDIO BACKGROUND SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 rv_start_swe_and_check (AUDIO_BGD_USE_ID, "AUDIO_BGD");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 #if 1 //(PSP_STANDALONE==0)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 #ifdef RVM_BAE_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436 /* initialize BAE SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437 rv_start_swe_and_check (BAE_USE_ID, "BAE");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 #ifdef RVM_AS_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 /* initialize AS (Audio Services) SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 rv_start_swe_and_check (AS_USE_ID, "AS");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 #if 1 //(PSP_STANDALONE==0)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 #ifdef RVM_BPR_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448 /* initialize sample BPR SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 rv_start_swe_and_check (BPR_USE_ID, "BPR");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451 #endif /* PSP_STANDALONE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 #ifdef RVM_RTC_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 /* initialize RTC SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 rv_start_swe_and_check (RTC_USE_ID, "RTC");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458 #ifdef RVM_LLS_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 /* initialize LLS SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
460 rv_start_swe_and_check (LLS_USE_ID, "LLS");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 #ifdef RVM_TUT_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 /* initialize TUT SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 // rv_start_swe_and_check (TUT_USE_ID, "TUT");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 #ifdef RVM_RGUI_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 /* initialize RGUI SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470 rv_start_swe_and_check (RGUI_USE_ID, "RGUI");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 #ifdef RVM_ATP_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 /* initialize ATP SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475 rv_start_swe_and_check (ATP_USE_ID, "ATP");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478 #ifdef RVM_MKS_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479 rv_start_swe_and_check (MKS_USE_ID, "MKS");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 #ifdef RVM_IMG_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 rv_start_swe_and_check (IMG_USE_ID, "IMG");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486 #ifdef RVM_GBI_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487 rv_start_swe_and_check (GBI_USE_ID, "GBI");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
488 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490 #ifdef RVM_CAMD_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 rv_start_swe_and_check (CAMD_USE_ID, "CAMD");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494 #ifdef RVM_USB_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
495 /* initialize USB SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496 rv_start_swe_and_check (USB_USE_ID, "USB");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 #ifdef RVM_CAMA_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 rv_start_swe_and_check (CAMA_USE_ID, "CAMA");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 #ifdef RVM_MFW_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504 /* initialize MFW SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 rv_start_swe_and_check (MFW_USE_ID, "MFW");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508 #ifdef RVM_SMBS_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509 /* initialize SMBS SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 rv_start_swe_and_check (SMBS_USE_ID, "SMBS");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
511 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 #ifdef RVM_USBFAX_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 /* initialize USB SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 rv_start_swe_and_check (USBFAX_USE_ID, "USBFAX");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 #ifdef RVM_USBTRC_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 /* initialize USBTRC SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 rv_start_swe_and_check (USBTRC_USE_ID, "USBTRC");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
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parents:
diff changeset
521 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522
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parents:
diff changeset
523 #ifdef RVM_USBMS_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 /* initialize USBMS SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 rv_start_swe_and_check (USBMS_USE_ID, "USBMS");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 #ifdef RVM_RFS_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529 /* initialize RFS SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 rv_start_swe_and_check (RFS_USE_ID, "RFS");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 #ifdef RVM_CCI_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535 /* initialize CCI SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536 rv_start_swe_and_check (CCI_USE_ID, "CCI");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 #ifdef RVM_BTUI_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 /* initialize sample BTUI SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541 rv_start_swe_and_check (BTUI_USE_ID, "BTUI");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543 #ifdef RVM_JPEG_SWE
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544 /* initialize sample JPEG SWE */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545 rv_start_swe_and_check (JPEG_USE_ID, "JPEG");
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 #ifdef RVM_JPEG_SWE
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548 /* initialize sample JPEG SWE */
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 rv_start_swe_and_check (JPEG_USE_ID, "JPEG");
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 // WARNING WARNING ----------------------------------------------------
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552 // Do not perform any SWE initialization after this line !
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 // WARNING WARNING ----------------------------------------------------
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 #if 0 //(REMU==0)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556 /* moved this to kpd start function. rv_start function for REMU. rv_start is called from Application Initialize
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557 context. Since this is a blocking call, we cannot afford to block in Application_Initialization. */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 #ifndef _WINDOWS
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 // Perform switch ON processing.
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 Switch_ON();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563 #if (_GSM==1)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 BZ_KeyBeep_ON (); // Audio feedback if ON/OFF pushed
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 #endif // if (_GSM==1)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 #if 1 //(CHIPSET!=15) || (REMU==0)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570 /* dump the Riviera memory state */
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571 rvf_delay (RVF_MS_TO_TICKS (300)) ;
136
3b5c3f3646fb RV bring-up: lack of timer ticks fixed,
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parents: 129
diff changeset
572 rvf_dump_mem ();
129
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parents:
diff changeset
573 rvf_dump_pool();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 rvf_dump_tasks();
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575 #endif
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 #if (TEST==1)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 // create a Memory Bank for the 'Test Selection Menu'.
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 mb_requirements.size = RVTEST_MENU_MB_SIZE;
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
580 mb_requirements.watermark = RVTEST_MENU_MB_WATERMARK;
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
581 mb_requirements.pool_id = RVF_POOL_EXTERNAL_MEM;
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
582 if (rvf_create_mb (RVTEST_MENU_MB_NAME,
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
583 mb_requirements,
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
584 &mb_id) != RVF_OK)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
585 {
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
586 // error case.
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
587 result++;
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
588 }
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
589
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
590 // Go to the 'Test Selection Menu' (using rv_test ()).
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
591 rv_test (0);
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
592 #endif // (TEST==1)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
593
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
594 // infinite wait
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
595 rvf_evt_wait (START_TASK_ID,
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
596 0xFFFF,
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
597 0xFFFFFFFFL);
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
598 }
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
599
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
600 #if (TEST==1)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
601 #define RV_START_TASK_STACK (4096)
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
602 #else
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
603 #define RV_START_TASK_STACK (1024)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
604 #endif
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
605 UINT8 stack_start[RV_START_TASK_STACK];
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
606
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
607
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
608 /*******************************************************************************
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
609 **
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
610 ** Function create_tasks
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
611 **
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
612 ** Description This function is called once at startup to allow task
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
613 ** creation thanks to Riviera environment.
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
614 **
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
615 ** Returns void
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
616 **
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
617 *******************************************************************************/
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
618 void create_tasks (void)
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
619 {
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
620
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
621 // Tasks creation
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
622 rvf_create_legacy_task ((TASKPTR) rv_start, START_TASK_ID,
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
623 "RV_START", stack_start,
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
624 RV_START_TASK_STACK, RV_START_TASK_PRIO, 0, RUNNING);
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
625
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
626 }