annotate rvinterf/Makefile @ 992:a7b0b426f9ca

target-utils: boot ROM UART autodetection revamped The new implementation should work with both the familiar Calypso C035 boot ROM version found in our regular targets as well as the older Calypso F741979B version found on the vintage D-Sample board.
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 30 Dec 2015 21:28:41 +0000
parents d69d1e097b18
children
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d69d1e097b18 rvinterf: g23sh and fc-sendsp are being retired, absorbed into fc-shell
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents: 873
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1 PROGDIR=asyncshell ctracedec etmsync lowlevel tmsh
335
40b8557b9d04 rvinterf suite: libasync factored out of fc-tmsh
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 333
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2 LIBDIR= libasync libg23
332
28b4d3c9e85d rvinterf/libg23: complete for now
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 329
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3 SUBDIR= ${PROGDIR} ${LIBDIR}
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faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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5 all: ${SUBDIR}
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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6
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3be5a1b4c91a rvinterf/Makefile: asyncshell added
Space Falcon <falcon@ivan.Harhan.ORG>
parents: 859
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7 asyncshell: libasync libg23
333
2ac2f6d88bb2 rvinterf & rvtdump: use the new libg23 for G23 packet decoding
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 332
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8 lowlevel: libg23
335
40b8557b9d04 rvinterf suite: libasync factored out of fc-tmsh
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 333
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9 tmsh: libasync
333
2ac2f6d88bb2 rvinterf & rvtdump: use the new libg23 for G23 packet decoding
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 332
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10
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faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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11 ${SUBDIR}: FRC
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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12 cd $@; ${MAKE} ${MFLAGS}
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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13
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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14 clean: FRC
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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15 rm -f a.out core errs
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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16 for i in ${SUBDIR}; do (cd $$i; ${MAKE} ${MFLAGS} clean); done
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
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parents:
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17
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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18 install: FRC
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28b4d3c9e85d rvinterf/libg23: complete for now
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 329
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19 for i in ${PROGDIR}; do (cd $$i; ${MAKE} ${MFLAGS} install); done
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faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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20
faa31a47f102 rvinterf/Makefile: build both rvinterf/lowlevel and rvinterf/etm
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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21 FRC: