FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/sysglue/exceptions.S @ 929:ad6f1504465d
l1_{dis,en}able_dsp_trace functions: breakage-causing LoCosto-ism fixed
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sat, 24 Oct 2015 06:54:08 +0000 |
parents | f05ae34f7ca0 |
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rev | line source |
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1 /* |
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2 * This module contains ARM exception handlers which used to be |
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3 * in chipsetsw/system/Main/int.s in TI's Leonardo code. |
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4 */ |
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5 |
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6 .section "except_stack","aw",%nobits |
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7 .balign 4 |
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8 .space 512 |
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9 .globl _Except_Stack_SP |
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10 _Except_Stack_SP: |
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11 |
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12 .text |
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13 .code 32 |
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14 |
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15 @ layout of xdump buffer: |
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16 @ struct xdump_s { |
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17 @ long registers[16] // svc mode registers |
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18 @ long cpsr // svc mode CPSR |
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19 @ long exception // magic word + index of vector taken |
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20 @ long stack[20] // bottom 20 words of usr mode stack |
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21 @ } |
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22 |
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23 .globl _arm_undefined |
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24 _arm_undefined: |
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25 @ store r12 for Xdump_buffer pointer, r11 for index |
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26 stmfd r13!,{r11,r12} |
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27 mov r11,#1 |
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28 b save_regs |
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29 |
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30 .globl _arm_swi |
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31 _arm_swi: |
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32 @ store r12 for Xdump_buffer pointer, r11 for index |
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33 stmfd r13!,{r11,r12} |
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34 mov r11,#2 |
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35 b save_regs |
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36 |
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37 .globl _arm_abort_prefetch |
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38 _arm_abort_prefetch: |
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39 @ store r12 for Xdump_buffer pointer, r11 for index |
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40 stmfd r13!,{r11,r12} |
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41 mov r11,#3 |
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42 b save_regs |
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43 |
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44 .globl _arm_abort_data |
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45 _arm_abort_data: |
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46 @ store r12 for Xdump_buffer pointer, r11 for index |
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47 stmfd r13!,{r11,r12} |
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48 mov r11,#4 |
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49 b save_regs |
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50 |
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51 .globl _arm_reserved |
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52 _arm_reserved: |
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53 ldr r13,=_Except_Stack_SP @ mode unknown |
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54 @ store r12 for Xdump_buffer pointer, r11 for index |
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55 stmfd r13!,{r11,r12} |
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56 mov r11,#5 |
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57 b save_regs |
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58 |
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59 save_regs: |
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60 ldr r12,=xdump_buffer |
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61 str r14,[r12,#4*15] @ save r14_abt (original PC) into r15 slot |
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62 |
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63 stmia r12,{r0-r10} @ save unbanked registers (except r11 and r12) |
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64 ldmfd r13!,{r0,r1} @ get original r11 and r12 |
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65 str r0,[r12,#4*11] @ save original r11 |
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66 str r1,[r12,#4*12] @ save original r12 |
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67 mrs r0,spsr @ get original psr |
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68 str r0,[r12,#4*16] @ save original cpsr |
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69 |
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70 mrs r1,cpsr @ save mode psr |
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71 bic r2,r1,#0x1f @ psr with mode bits cleared |
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72 and r0,r0,#0x1f @ get original mode bits |
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73 add r0,r0,r2 |
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74 |
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75 msr cpsr,r0 @ move to pre-exception mode |
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76 str r13,[r12,#4*13] @ save original SP |
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77 str r14,[r12,#4*14] @ save original LR |
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78 msr cpsr,r1 @ restore mode psr |
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79 |
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80 @ r11 has original index |
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81 orr r10,r11,#0xDE<<24 @ r10 = 0xDEAD0000 + index of vector taken |
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82 orr r10,r10,#0xAD<<16 |
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83 str r10,[r12,#4*17] @ save magic + index |
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84 |
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85 mov r0,r11 @ put index into 1st argument |
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86 b dar_exception |