FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/dyn_dwl_include/l1_dyn_dwl_const.h @ 794:b380a85d77d5

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
aci/cmh_mmq.c: RTC function interface reverted to the classic TCS211 way
author Space Falcon <falcon@ivan.Harhan.ORG>
date Mon, 16 Mar 2015 03:31:35 +0000
parents 3c850b416c9a
children c56ba3363aa3
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
150
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /************* Revision Controle System Header *************
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * GSM Layer 1 software
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 * L1_DYN_DWL_CONST.H
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 *
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 * Filename l1_dyn_dwl_const.h.h
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 * Copyright 2004 (C) Texas Instruments
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 *
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8 ************* Revision Controle System Header *************/
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9 #if (L1_DYN_DSP_DWNLD == 1)
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11 #ifndef _L1_DYN_DWL_CONST_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 #define _L1_DYN_DWL_CONST_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 /* DSP dynamic download background task id */
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15 #define C_BGD_DSP_DYN_DWNLD 9
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17 #define RED 1
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 #define GREEN 0
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19 #define MAX_NUM_OF_PATCH_IDS 5
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 #define MAX_NUM_OF_STATE_MACHINES_IMPACTED 6
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 #define NUM_OF_DYN_DWNLD_PRIMITIVES 6
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 #define NUM_WORDS_COPY_API 256 // even value mandatory
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25 #define START_API_DWNLD_AREA 0x1808 // 0x1808
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 #define SIZE_API_DWNLD_AREA 0x7F8 // 0x800
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27 #define START_API_DWNLD_AREA_DURING_E2 0x10C1 // 0x10BE
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28 #define SIZE_API_DWNLD_AREA_DURING_E2 0x15B // 0x410
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 #define MCU_API_BASE_ADDRESS 0xFFD00000L
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30 #define DSP_API_BASE_ADDRESS 0x800
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33 /* Dynamic Download API base address */
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34 #define C_DYN_DWNLD_API_BASE_ADDRESS 0x17F6
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 #define HEADER_PATCH_SIZE 4
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37 #if(CODE_VERSION == SIMULATION)
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 #define CRC_SIMU_OK 0xCAFE
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 #define SIZE_DWNLD_AREA_SIMU 2048
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 #endif
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42 #define TRUE 1
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 #define FALSE 0
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 /* Define commands MCU/DSP*/
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47 #define C_DWL_DOWNLOAD_CTRL_DSP_ACK 0
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48 #define C_DWL_DOWNLOAD_CTRL_DOWNLOAD 1
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49 #define C_DWL_DOWNLOAD_CTRL_INSTALL 2
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 #define C_DWL_DOWNLOAD_CTRL_UNINSTALL 3
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 #define C_DWL_DOWNLOAD_CTRL_ABORT 4
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 #define C_DWL_DOWNLOAD_CTRL_INIT 5
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53 #define C_DWL_ERR_RESET 0
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 #endif // _L1_DYN_DWL_CONST_H_
3c850b416c9a integrating more L1 header files needed by the abb+spi code
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 #endif // L1_DYN_DSP_DWNLD