FreeCalypso > hg > freecalypso-sw
annotate loadtools/scripts/cs2-4ws-8mb.init @ 995:c22afeecbf34
loadtools/scripts: D-Sample config added
author | Mychaela Falconia <falcon@ivan.Harhan.ORG> |
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date | Sat, 02 Jan 2016 04:05:51 +0000 |
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c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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1 # This loadtool init script provides memory interface register setup |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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2 # for targets which fit the following criteria: |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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3 # |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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4 # 3 chip selects are used: nCS0, nCS1 and nCS2 |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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5 # 4 wait states are to be used (register setting 00A4) |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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6 # 8 MiB memory banks are in use, such that ADD22 needs to be enabled |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
7 |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
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changeset
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8 w16 fffffb00 00A4 |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
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9 w16 fffffb02 00A4 |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
changeset
|
10 w16 fffffb04 00A4 |
c22afeecbf34
loadtools/scripts: D-Sample config added
Mychaela Falconia <falcon@ivan.Harhan.ORG>
parents:
diff
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11 w16 fffef006 0008 |