FreeCalypso > hg > freecalypso-sw

annotate loadtools/scripts/pirelli.init @ 416:c2e14cc15c23

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flash erase-program-boot: implemented CRC check before flashing
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Tue, 17 Jun 2014 07:33:25 +0000
parents 5b53cad88637
children
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fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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1 # This phone has 3 memory chip selects:
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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2 #
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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3 # nCS0: flash chip select 1
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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4 # nCS1: RAM chip select
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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5 # nCS3: flash chip select 2
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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6 #
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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7 # All 3 chip select lines go to the same physical IC, a RAM/flash MCP.
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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8 # We set WS=4 for all 3 here, copying what OsmocomBB does. The access
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9 # time listed in the datasheet is 70 ns for both RAM and flash, and per
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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10 # my math setting WS=3 *might* work, but it could be marginal, so let's
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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11 # play it safe for now.
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
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fa3e9a5665bd loadtool hw configuration files created for the Pirelli
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13 w16 fffffb00 00A4
fa3e9a5665bd loadtool hw configuration files created for the Pirelli
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14 w16 fffffb02 00A4
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15 w16 fffffb06 00A4
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9a77b3395747 Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9a77b3395747 Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 18
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17 # We also need to switch the CS4/ADD22 pin from its default function
9a77b3395747 Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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18 # of CS4 to the needed ADD22.
9a77b3395747 Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9a77b3395747 Pirelli ADD22 configuration
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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20 w16 fffef006 0008
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5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 32
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22 # With this phone all Calypso serial access always goes through the
5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 32
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23 # CP2102 usb2serial IC inside the phone itself, which is programmed
5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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24 # to support the high non-standard baud rates. So we can safely
5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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25 # switch to 812500 baud unconditionally.
5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 32
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5b53cad88637 pirelli.init: go ahead and switch to 812500 baud automatically
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 32
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27 baud 812500