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annotate gsm-fw/services/dar/dar_diagnose.c @ 598:d42b83dee819

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L1: DSP CPU load measurement appears to be possible only on DSP >= 38
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 17 Aug 2014 16:52:06 +0000
parents 3c5a17928fda
children
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1 /****************************************************************************/
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2 /* */
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3 /* File Name: dar_diagnose.c */
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4 /* */
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5 /* Purpose: This function contains the DAR diagnose functions */
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6 /* */
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7 /* */
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8 /* Version 0.1 */
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9 /* */
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10 /* Date Modification */
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11 /* ------------------------------------ */
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12 /* 18 October 2001 Create */
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13 /* */
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14 /* Author Stephanie Gerthoux */
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15 /* */
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16 /* (C) Copyright 2001 by Texas Instruments Incorporated, All Rights Reserved*/
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17 /****************************************************************************/
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18
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19 #include "../../riviera/rv/rv_defined_swe.h"
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20 #ifdef RVM_DAR_SWE
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21 #ifndef _WINDOWS
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22 #include "../../bsp/timer.h"
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23 #endif
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24
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25 #include "../../riviera/rv/rv_general.h"
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26 #include "../../riviera/rvm/rvm_gen.h"
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27 #include "../../riviera/rvm/rvm_priorities.h"
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28 #include "dar_api.h"
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29 #include "dar_structs_i.h"
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30 #include "dar_env.h"
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31 #include "../../riviera/rvf/rvf_target.h"
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32 #include "dar_const_i.h"
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33 #include "dar_macro_i.h"
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34 #include "dar_messages_i.h"
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35 #include "dar_error_hdlr_i.h"
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36 //#include "rvf/rvf_i.h"
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37
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38 /**** Global variables ****/
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39
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40 /* Define a pointer to the Global Environment Control block */
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41 extern T_DAR_ENV_CTRL_BLK *dar_gbl_var_p;
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42
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43
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44
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45 /***************************************************************************/
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46 /* Function dar_search_group */
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47 /* */
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48 /* Description This function checks if the use_id group_nb exists: */
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49 /* */
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50 /***************************************************************************/
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51 T_RV_RET dar_search_group(UINT16 group, UINT8 *index_p)
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52 {
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53 /* Declare local variables */
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54 UINT8 i=0;
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55
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56 /* Check if the DAR entity is started */
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57 if (dar_gbl_var_p != NULL )
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58 {
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59 /* Search in the dar_filter_array if the group exists */
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60 for (i=0;i< DAR_MAX_GROUP_NB; i++)
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61 {
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62 if(dar_gbl_var_p->dar_filter_array[i].group_nb == group)
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63 {
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64 *index_p=i;
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65 //DAR_SEND_TRACE_PARAM("dar filter_array index",*index_p,RV_TRACE_LEVEL_DEBUG_LOW);
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66 return(RV_OK);
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67 }
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68 }
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69 return(RV_NOT_SUPPORTED);
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70 }
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71 else
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72 {
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73 return(RV_NOT_READY);
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74 }
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75 }
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76
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77 /***************************************************************************/
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78 /* Function dar_add_group */
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79 /* */
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80 /* Description This function research the index of the first free */
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81 /* group */
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82 /***************************************************************************/
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83 T_RV_RET dar_add_group(UINT8 *index_p)
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84 {
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85 /* Declare local variables */
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86 UINT8 i=0;
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87
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88 /* Check if the DAR entity is started */
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89 if (dar_gbl_var_p == NULL )
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90 {
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91 dar_error_trace(DAR_ENTITY_NOT_START);
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92 return(RV_NOT_READY);
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93 }
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94
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95 /* Search in the dar_filter_array the first free group */
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96 for (i=0;i< DAR_MAX_GROUP_NB; i++)
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97 {
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98 if(dar_gbl_var_p->dar_filter_array[i].group_nb == DAR_INITIALIZATION_VALUE)
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99 {
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100 *index_p=i;
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101 return(RV_OK);
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102 }
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103 }
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104 return(RV_NOT_SUPPORTED);
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105 }
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106
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107
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108 /***************************************************************************/
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109 /* */
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110 /* Function Name: dar_send_write_data */
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111 /* */
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112 /* Purpose: This function is called to send write data in the DAR */
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113 /* mailbox. */
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114 /* Input Parameters: */
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115 /* Pointer to the message to store */
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116 /* Data Format, */
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117 /* Data level, */
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118 /* Data Use Id, */
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119 /* */
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120 /* Output Parameters: */
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121 /* Validation of the function execution. */
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122 /* */
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123 /* Note: */
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124 /* None */
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125 /* */
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126 /***************************************************************************/
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127
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128 T_RV_RET dar_send_write_data ( T_DAR_INFO *buffer_p,
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129 T_DAR_FORMAT format,
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130 T_DAR_LEVEL diagnose_info_level,
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131 T_RVM_USE_ID dar_use_id)
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132 {
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133 /* Declare local variables */
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134 T_RVF_MB_STATUS mb_status = RVF_GREEN;
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135 T_DAR_WRITE_START *write_data_p = NULL;
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136
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137 /************************** dar_send_write_data **********************/
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138
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139 if (dar_gbl_var_p != NULL )
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140 {
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141 /* allocate the memory for the message to send */
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142 mb_status = rvf_get_buf (dar_gbl_var_p->mb_dar,
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143 sizeof (T_DAR_WRITE_START),
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144 (T_RVF_BUFFER **) (&write_data_p));
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145
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146 /* If insufficient resources, then report a memory error and abort.*/
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147 if (mb_status == RVF_YELLOW)
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148 {
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149 /* deallocate the memory */
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150 rvf_free_buf((T_RVF_BUFFER *)write_data_p);
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151 dar_error_trace(DAR_ENTITY_NO_MEMORY);
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152 return (RV_NOT_SUPPORTED);
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153 }
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154 else
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155 if (mb_status == RVF_RED)
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156 {
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157 dar_error_trace(DAR_ENTITY_NO_MEMORY);
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158 return (RV_MEMORY_ERR);
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159 }
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160
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161 /* fill the message id */
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162 write_data_p->os_hdr.msg_id = DAR_WRITE_REQ;
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163
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164 /* fill the addr source id */
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165 write_data_p->os_hdr.src_addr_id = dar_gbl_var_p->addrId;
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166
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167 /* fill the message parameters */
308
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168 write_data_p->data_write.char_p = buffer_p ;
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169 write_data_p->data_write.data_format = format;
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170 write_data_p->data_write.level = diagnose_info_level;
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171 write_data_p->data_write.use_id.group_nb = (dar_use_id>>16)& 0x7FFF;
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172 write_data_p->data_write.use_id.mask = (dar_use_id)&0xFFFF;
305
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173
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174 /* send the messsage to the DAR entity */
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175 rvf_send_msg (dar_gbl_var_p->addrId,
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176 write_data_p);
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177
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178 return (RV_OK);
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179 }
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180 else
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181 {
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182 return(RV_NOT_READY);
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183 }
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184
308
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185
305
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186 } /* dar_send_write_data */
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187
308
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188 /***************************************************************************/
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189 /* Function dar_reset */
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190 /* */
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191 /* Description This function is used to reset the system */
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192 /* */
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193 /* Input Parameters: */
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194 /* None */
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195 /* */
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196 /* Output Parameters: */
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197 /* Validation of the function execution. */
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198 /* */
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199 /* Note: */
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200 /* None */
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201 /* */
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202 /***************************************************************************/
305
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203 T_RV_RET dar_reset(void)
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204 {
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205 #ifndef _WINDOWS
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206 /* Declare global variable*/
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207 volatile UINT16 *register_p;
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208 volatile UINT8 i;
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209
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210
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211 /* enable the Watchdog timer */
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212 TM_EnableWatchdog();
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213
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214 /* Reset the system with the Watchdog */
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215 /* initialize the adress of the watchdog timer pointer */
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216 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
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217
308
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218 /* Write the 0xF5 value to the Watchdog timer mode register to disable
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219 the Watchdog */
305
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220 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
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221 *register_p =0x80F5;
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222
308
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223 /* Wait a couple of time to be sure that this register has a new
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224 value */
305
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225 for (i=0;i<100;i++);
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226
308
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227 /*
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228 * After having received 0xF5 in the Watchdog timer mode register,
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229 * if the second write access is differennt from 0xA0, ARM core is
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230 * reset.
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231 *
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232 * The ARM HW core is reset + branch to adress 0x0000 ( SW reset)
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233 */
305
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234 *register_p=0x80F5;
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235
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236 /* Wait until the ARM reset */
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237 while(1);
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238 #endif
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239
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240 return(RV_OK);
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241 } /* dar_reset */
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242
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243
308
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244 /***************************************************************************/
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245 /* */
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246 /* Function dar_read_mbox */
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247 /* */
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248 /* Description Called by the dar to read a buffer from its mailboxes. */
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249 /* when the Operating System is out */
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250 /* Input Parameters: */
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251 /* None */
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252 /* */
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253 /* Output Parameters: */
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254 /* NULL if the mailbox was empty, else the address of a buffer */
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255 /* */
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256 /***************************************************************************/
305
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257
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258 void * dar_read_mbox (UINT8 mbox)
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259 {
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260 // void * p_buf = NULL;
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261 // T_RVF_INTERNAL_BUF * p_hdr;
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262
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263 /* Verify if DAR's global struct was set by RVM, then read the mailbox */
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264 if (dar_gbl_var_p != NULL )
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265 return rvf_read_addr_mbox (dar_gbl_var_p->addrId, mbox);
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266
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267 return NULL;
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268
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269 // Check if the DAR entity is started
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270 /*if (dar_gbl_var_p != NULL )
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271 {
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272
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273 if ( OSTaskQFirst[dar_gbl_var_p->addrId][mbox] )// if the chained list is not empty
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274 {
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275 p_hdr = OSTaskQFirst[dar_gbl_var_p->addrId][mbox];
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276 OSTaskQFirst[dar_gbl_var_p->addrId][mbox] = p_hdr->p_next;
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277
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278 p_hdr->p_next = NULL;
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279
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280 #if RVF_ENABLE_BUF_LINKAGE_CHECK
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281 RVF_SET_BUF_UNLINKED(p_hdr); // change buffer status
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282 #endif
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283
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284 p_buf = (UINT8 *)p_hdr + sizeof(T_RVF_INTERNAL_BUF);
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285 }
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286 }
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287 return (p_buf); */
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288 } // dar_read_mbox
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289
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290 #else
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291
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292 /* ******************************************************* */
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293 /* THE DAR ENTITY IS DISABLED */
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294 /* ******************************************************* */
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295 #ifndef _WINDOWS
308
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296 #include "../../bsp/timer.h"
305
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297 #endif
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298
308
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299 #include "../../riviera/rv/rv_general.h"
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300 #include "../../riviera/rvm/rvm_gen.h"
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301 #include "../../riviera/rvm/rvm_priorities.h"
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302 #include "../../riviera/rvf/rvf_target.h"
305
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303 //#include "rvf/rvf_i.h"
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304
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305 /* Define the Watchdog timer register mode */
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306 #define WATCHDOG_TIM_MODE (0xFFFFF804)
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307
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308
308
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309 /***************************************************************************/
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310 /* Function dar_reset */
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311 /* */
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312 /* Description This function is used to reset the system */
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313 /* */
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314 /* Input Parameters: */
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315 /* None */
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316 /* */
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317 /* Output Parameters: */
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318 /* Validation of the function execution. */
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319 /* */
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320 /* Note: */
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321 /* None */
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322 /* */
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323 /***************************************************************************/
305
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324 T_RV_RET dar_reset(void)
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325 {
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326 #ifndef _WINDOWS
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327 /* Declare global variable*/
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328 volatile UINT16 *register_p;
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329 volatile UINT8 i;
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330
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331
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332 /* enable the Watchdog timer */
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333 TM_EnableWatchdog();
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334
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335 /* Reset the system with the Watchdog */
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336 /* initialize the adress of the watchdog timer pointer */
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337 register_p = (volatile UINT16 *)WATCHDOG_TIM_MODE;
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338
308
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339 /* Write the 0xF5 value to the Watchdog timer mode register to disable
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340 the Watchdog */
305
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341 /* Note the bit 15 must be unchanged ( bit 15 = 1 -> 0x8000)*/
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342 *register_p =0x80F5;
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343
308
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344 /* Wait a couple of time to be sure that this register has a new
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345 value */
305
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346 for (i=0;i<100;i++);
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347
308
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348 /*
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349 * After having received 0xF5 in the Watchdog timer mode register,
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350 * if the second write access is differennt from 0xA0, ARM core is
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351 * reset.
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352 *
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353 * The ARM HW core is reset + branch to adress 0x0000 ( SW reset)
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354 */
305
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355 *register_p=0x80F5;
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356
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357 /* Wait until the ARM reset */
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358 while(1);
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359 #endif
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360
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361 return(RV_OK);
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362 } /* dar_reset */
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363
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364 #endif /* #ifdef RVM_DAR_SWE */