annotate gsm-fw/riviera/init/Makefile @ 466:d43bf2d301de

os_tim_ir.c: os_remove_timer_from_list(): minor cosmetic polish
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Thu, 26 Jun 2014 05:08:44 +0000
parents afceeeb2cba1
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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1 CC= arm-elf-gcc
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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2 CFLAGS= -Os -fno-builtin -mthumb-interwork -mthumb
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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3
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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4 OBJS= create_RVtasks.o
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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5
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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6 all: ${OBJS}
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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7
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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8 clean:
7d7950d7f924 Riviera should be ready for the first TI fw build attempt
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
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9 rm -f *.[oa] *errs