FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/nucleus/demo/calirq.h @ 703:d6a9b9fce09e
dl_dcch0.c compiles
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 03 Oct 2014 03:36:02 +0000 |
parents | afceeeb2cba1 |
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rev | line source |
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1 /* |
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2 * Definitions for Calypso IRQ numbers and the related registers |
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3 * Added to the FreeNucleus Calypso port by Spacefalcon the Outlaw. |
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4 * |
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5 * This header is usable from both .c and .S source files. |
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6 */ |
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7 |
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8 #ifndef _CALYPSO_IRQ_H |
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9 #define _CALYPSO_IRQ_H |
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10 |
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11 #define IRQ_WATCHDOG 0 |
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12 #define IRQ_TIMER1 1 |
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13 #define IRQ_TIMER2 2 |
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14 #define IRQ_TSP_RX 3 |
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15 #define IRQ_TPU_FRAME 4 |
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16 #define IRQ_TPU_PAGE 5 |
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17 #define IRQ_SIMCARD 6 |
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18 #define IRQ_UART_MODEM 7 |
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19 #define IRQ_KEYPAD_GPIO 8 |
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20 #define IRQ_RTC_TIMER 9 |
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21 #define IRQ_RTC_ALARM_I2C 10 |
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22 #define IRQ_ULPD_GAUGING 11 |
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23 #define IRQ_EXTERNAL 12 |
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24 #define IRQ_SPI 13 |
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25 #define IRQ_DMA 14 |
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26 #define IRQ_API 15 |
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27 #define IRQ_SIM_DETECT 16 |
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28 #define IRQ_EXTERNAL_FIQ 17 |
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29 #define IRQ_UART_IRDA 18 |
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30 #define IRQ_ULPD_GSM_TIMER 19 |
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31 #define IRQ_GEA 20 |
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32 |
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33 #define MAX_IRQ_NUM 20 |
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34 |
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35 #define INTH_BASE_ADDR 0xFFFFFA00 |
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36 |
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37 #ifdef __ASSEMBLER__ |
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38 |
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39 /* |
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40 * Assembly source with cpp |
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41 * |
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42 * The most convenient way to access registers like these from ARM |
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43 * assembly is to load the base address of the register block in some |
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44 * ARM register, using only one ldr rN, =xxx instruction and only one |
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45 * literal pool entry, and then access various registers in the block |
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46 * from the same base using the immediate offset addressing mode. |
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47 * |
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48 * Here we define the offsets for the usage scenario above. |
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49 */ |
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50 |
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51 #define IT_REG1 0x00 |
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52 #define IT_REG2 0x02 |
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53 #define MASK_IT_REG1 0x08 |
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54 #define MASK_IT_REG2 0x0A |
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55 #define IRQ_NUM 0x10 |
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56 #define FIQ_NUM 0x12 |
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57 #define IRQ_CTRL 0x14 |
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58 #define ILR_OFFSET 0x20 |
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59 |
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60 #else |
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61 |
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62 /* |
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63 * C source |
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64 * |
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65 * For access from C, we define the layout of the INTH register block |
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66 * as a struct, and then define a pleudo-global-var for easy "volatile" |
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67 * access. |
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68 */ |
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69 |
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70 struct inth_regs { |
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71 unsigned short it_reg1; |
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72 unsigned short it_reg2; |
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73 unsigned short pad1[2]; |
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74 unsigned short mask_it_reg1; |
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75 unsigned short mask_it_reg2; |
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76 unsigned short pad2[2]; |
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77 unsigned short irq_num; |
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78 unsigned short fiq_num; |
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79 unsigned short irq_ctrl; |
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80 unsigned short pad3[5]; |
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81 unsigned short ilr_irq[MAX_IRQ_NUM+1]; |
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82 }; |
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83 |
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84 #define INTH_REGS (*(volatile struct inth_regs *) INTH_BASE_ADDR) |
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85 |
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86 /* |
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87 * C code can now access INTH registers like this: |
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88 * |
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89 * old_mask = INTH_REGS.mask_it_reg1; |
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90 * INTH_REGS.mask_it_reg1 = new_mask; |
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91 */ |
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92 |
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93 #endif |
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94 |
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95 #endif /* _CALYPSO_IRQ_H */ |