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annotate gsm-fw/bsp/irq_twiddle.S @ 993:d92e4aadeeb3

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target-utils/c139explore: a cleaner way of setting the fixed UART base address
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Wed, 30 Dec 2015 22:12:35 +0000
parents 8be182dd9218
children
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597
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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1 /*
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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2 * TI's L1 code (and possibly other parts of the software suite) calls
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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3 * functions named INT_DisableIRQ() and INT_EnableIRQ(); in the Leonardo
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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4 * fw they are implemented (in a very ugly manner, as usual) in the
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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5 * int.s entry point assembly module. Here we implement the same
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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6 * functions in a cleaner way.
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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7 */
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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8
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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9 #include "../nucleus/asm_defs.h"
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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10
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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11 .code 32
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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12 .text
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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13
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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14 .globl INT_DisableIRQ
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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15 INT_DisableIRQ:
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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16 mrs r0, CPSR
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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17 orr r0, r0, #LOCKOUT
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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18 msr CPSR, r0
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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19 bx lr
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20
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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21 .globl INT_EnableIRQ
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22 INT_EnableIRQ:
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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23 mrs r0, CPSR
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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24 bic r0, r0, #LOCKOUT
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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25 msr CPSR, r0
8be182dd9218 gsm-fw: INT_{Dis,En}ableIRQ() functions implemented (needed by L1 code)
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26 bx lr