freecalypso-sw: gsm-fw/L1/tpudrv/tpudrv12.c annotate

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 580:df12004ac8ee

tpudrv12.c: l1dmacro_tx_{up,down} done

author	Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date	Fri, 15 Aug 2014 01:05:44 +0000
parents	df71726fa4e1
children	bbb1e73782e6

rev	line source
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	2 * tpudrv12.c (TPU driver for RF type 12) is a required part of the L1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	3 * code for TI GSM chipset solutions consisting of Calypso or other
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	4 * classic (non-LoCosto) DBB, one of the classic ABB chips such as Iota
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	5 * or Syren, and Rita RF transceiver; the number 12 refers to the latter.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	6 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	7 * We, the FreeCalypso team, have not been able to find an original
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	8 * source for this C module: the LoCosto source has tpudrv61.c instead,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	9 * supporting LoCosto RF instead of Rita, whereas the TSM30 source
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	10 * only supports non-TI RF transceivers. Our only available reference
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	11 * for what this tpudrv12.c module is supposed to contain is the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	13 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	14 * The present reconstruction has been made by copying tpudrv61.c and
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	15 * tweaking it to match the disassembly of the reference binary object
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	16 * named above.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	17 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	18
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	19 #define TPUDRV12_C
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	20
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	21 #include "config.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	22 #include "l1_confg.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	23
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	24 #include "l1_macro.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	25 #include "l1_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	26 #include "l1_types.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	27 #if TESTMODE
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	28 #include "l1tm_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	29 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	30 #if (AUDIO_TASK == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	31 #include "l1audio_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	32 #include "l1audio_cust.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	33 #include "l1audio_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	34 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	35 #if (L1_GTT == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	36 #include "l1gtt_const.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	37 #include "l1gtt_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	38 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	39 #if (L1_MP3 == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	40 #include "l1mp3_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	41 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	42 #if (L1_MIDI == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	43 #include "l1midi_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	44 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	45
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	46 #if (L1_AAC == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	47 #include "l1aac_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	48 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	49
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	50 #include "l1_defty.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	51 #include "l1_time.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	52 #include "l1_ctl.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	53 #include "tpudrv.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	54 #include "tpudrv12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	55 #include "l1_rf12.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	56
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	57 #include "sys_types.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	58
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	59 #include "../../bsp/mem.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	60 #include "../../bsp/armio.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	61 #include "../../bsp/clkm.h"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	62
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	63 // Global variables
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	64 extern T_L1_CONFIG l1_config;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	65 extern UWORD16 AGC_TABLE[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	66 extern UWORD16 *TP_Ptr;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	67 #if (L1_FF_MULTIBAND == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	68 extern const WORD8 rf_subband2band[RF_NB_SUBBANDS];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	69 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	70
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	71 static WORD8 rf_index; // index into rf_path[]
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	72 static UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	73 static UWORD8 rfband; /* ditto */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	74
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	75 // Internal function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	76 void l1dmacro_rx_down (WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	77
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	78 #if (L1_FF_MULTIBAND == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	79 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	80 WORD32 rf_init(WORD32 t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	81
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	82 // External function prototypes
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	83 UWORD8 Cust_is_band_high(UWORD16 radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	84 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	85
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	86
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	87 extern T_RF_BAND rf_band[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	88 extern T_RF rf;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	89
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	90 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	91 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	92 /* DEFINITION OF MACROS FOR CHIPS SERIAL PROGRAMMATION */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	93 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	94 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	95
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	96 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	97 /* Is arfcn in the DCS band (512-885) ? */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	98 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	99 #define IS_HIGH_BAND(arfcn) (((arfcn >= 512) && (arfcn <= 885)) ? 1 : 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	100
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	101 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	102 /* Send a value to Rita RF */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	103 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	104 #define TSP_TO_RF(rf_data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	105 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	106 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	107 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	108 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x4F); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	109 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	110 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	111
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	112 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	113 /* Send a TSP command to ABB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	114 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	115 #define TSP_TO_ABB(data)\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	116 {\
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	117 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	118 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x06); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	119 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	120 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	121
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	122 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	123 /* Trace arfcn for conversion debug */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	124 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	125 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	126 // ----Debug information : record all arfcn programmed into synthesizer!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	127 #define MAX_ARFCN_TRACE 4096 // enough for 5 sessions of 124+374
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	128 SYS_UWORD16 arfcn_trace[MAX_ARFCN_TRACE];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	129 static UWORD32 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	130
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	131 void trace_arfcn(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	132 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	133 arfcn_trace[arfcn_trace_index++] = arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	134
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	135 // Wrap to beginning
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	136 if (arfcn_trace_index == MAX_ARFCN_TRACE)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	137 arfcn_trace_index = 0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	138 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	139 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	140
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	141
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	142 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	143 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	144 /* DEFINITION OF HARWARE DEPENDANT CONSTANTS */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	145 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	146 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	147
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	148 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	149 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	150 /* INTERNAL FUNCTIONS OF TPUDRV14.C */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	151 /* EFFECTIVE DOWNLOADING THROUGH TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	152 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	153 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	154 // rx & tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	155 typedef struct tx_rx_s
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	156 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	157 UWORD16 farfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	158 WORD8 ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	159 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	160 T_TX_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	161
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	162 struct synth_s {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	163 // common
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	164 UWORD16 arfcn0;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	165 UWORD16 limit;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	166 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	167 T_TX_RX tx_rx[2];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	168 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	169
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	170 struct rf_path_s {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	171 UWORD8 rx_up;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	172 UWORD8 rx_down;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	173 UWORD8 tx_up;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	174 UWORD8 tx_down;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	175 struct synth_s *synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	176 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	177
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	178 const struct synth_s synth_900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	179 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	180 { 0, 124, BAND_SELECT_GSM, {{ 890, 1}, { 935, 2}}},// gsm 0 - 124
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	181 {974, 1023, BAND_SELECT_GSM, {{ 880, 1}, { 925, 2}}},// egsm 975 - 1023
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	182 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	183
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	184 const struct synth_s synth_1800[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	185 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	186 {511, 885, BAND_SELECT_DCS, {{1710, 1}, {1805, 1}}}, // dcs 512 - 885
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	187 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	188
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	189 const struct synth_s synth_1900[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	190 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	191 {511, 810, BAND_SELECT_PCS, {{1850, 1}, {1930, 1}}}, // pcs 512 - 810;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	192 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	193
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	194 const struct synth_s synth_850[] =
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	195 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	196 {127, 192, BAND_SELECT_850_LO, {{ 824, 2}, { 869, 2}}}, // gsm850 low
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	197 {127, 251, BAND_SELECT_850_HI, {{ 824, 1}, { 869, 2}}}, // gsm850 high
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	198 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	199
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	200 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	201 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	202 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	203 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	204 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	205 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //GSM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	206 };
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	207
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	208 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	209 * Leonardo tpudrv12.obj contains a function named calc_a_b(); there is
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	210 * no such function in the LoCosto version, but there is a similar-looking
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	211 * calc_rf_freq() function instead. Let's try making our calc_a_b()
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	212 * from LoCosto's calc_rf_freq().
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	213 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	214
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	215 UWORD32 calc_a_b(UWORD16 arfcn, UWORD8 downlink)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	216 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	217 UWORD32 farfcn; /* in 200 kHz units */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	218 UWORD32 n; /* B * P + A */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	219 struct synth_s *s;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	220
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	221 s = rf_path[rf_index].synth;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	222 while(s->limit < arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	223 s++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	224
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	225 rf_chip_band = s->rf_chip_band;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	226
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	227 // Convert the ARFCN to the channel frequency (times 5 to avoid the decimal value)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	228 farfcn = 5*s->tx_rx[downlink].farfcn0 + (arfcn - s->arfcn0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	229 n = farfcn * s->tx_rx[downlink].ou;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	230
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	231 /* magic A & B encoding for Rita */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	232 return((n - 4096) << 3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	233 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	234
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	235 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	236 /* Convert_l1_radio_freq */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	237 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	238 /* conversion of l1 radio_freq to */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	239 /* real channel number */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	240 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	241 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	242 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	243 switch(l1_config.std.id)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	244 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	245 case GSM:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	246 case DCS1800:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	247 case PCS1900:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	248 case GSM850:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	249 return (radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	250 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	251
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	252 case DUAL:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	253 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	254 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	255 // GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	256 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	257 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	258 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	259 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	260 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	261 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	262
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	263 case DUALEXT:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	264 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	265 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	266 // E-GSM band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	267 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	268 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	269 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	270 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	271 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	272 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	273 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	274 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	275 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	276 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	277 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	278 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	279 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	280 // DCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	281 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	282 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	283 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	284 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	285
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	286 case GSM_E:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	287 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	288 if(radio_freq <= 124)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	289 // GSM part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	290 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	291 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	292 if(radio_freq < 174)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	293 // Extended part...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	294 return (radio_freq - 125 + 975);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	295 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	296 // Extended part, special case of ARFCN=0
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	297 return(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	298 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	299 //omaps00090550 break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	300
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	301 case DUAL_US:
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	302 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	303 if (radio_freq < l1_config.std.first_radio_freq_band2)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	304 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	305 return(radio_freq - l1_config.std.first_radio_freq + 128);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	306 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	307 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	308 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	309 // PCS band...
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	310 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	311 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	312 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	313 // break;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	314
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	315 default: // should never occur.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	316 return(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	317 } // end of switch
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	318 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	319
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	320 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	321 /* rf_init */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	322 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	323 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	324 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	325 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	326 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	327 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	328 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	329 WORD32 rf_init(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	330 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	331 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	332 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	333 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	334 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	335 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	336 t += 8;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	337 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	338 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	339 t += 5;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	340 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	341 TSP_TO_RF(0x0012);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	342 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	343 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	344 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	345 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	346 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	347 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	348 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	349 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	350 t += 117;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	351 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	352 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	353 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	354 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	355 TSP_TO_RF(0x02FE);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	356 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	357 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	358 TSP_TO_RF(0x401F);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	359 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	360 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	361 TSP_TO_RF(0x043D);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	362 t += 7;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	363 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	364 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	365
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	366 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	367 /* rf_init_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	368 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	369 /* Initialization routine for PLL */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	370 /* Effective downloading through TSP */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	371 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	372 WORD32 rf_init_light(WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	373 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	374 // initialization for change of multi-band configuration dependent on STD
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	375 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	376 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	377
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	378 UWORD8 arfcn_to_rf_index(SYS_UWORD16 arfcn)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	379 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	380 UWORD8 index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	381 extern const T_STD_CONFIG std_config[];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	382 index = std_config[l1_config.std.id].band[0];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	383
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	384 if ((std_config[l1_config.std.id].band[1] != BAND_NONE) && IS_HIGH_BAND(arfcn))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	385 index = std_config[l1_config.std.id].band[1];
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	386
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	387 return (index - 1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	388 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	389
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	390 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	391 /* rf_program */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	392 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	393 /* Programs the RF synthesizer */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	394 /* called each frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	395 /* downloads NA counter value */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	396 /* t = start time in the current frame */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	397 /------------------------------------------/ //change 2 UWORD8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	398 UWORD32 rf_program(UWORD32 t, SYS_UWORD16 radio_freq, UWORD32 rx)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	399 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	400 UWORD32 rfdiv;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	401 SYS_UWORD16 arfcn;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	402
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	403 rfband = Cust_is_band_high(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	404
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	405 arfcn = Convert_l1_radio_freq(radio_freq);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	406 #ifdef ARFCN_DEBUG
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	407 trace_arfcn(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	408 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	409 rf_index = arfcn_to_rf_index(arfcn);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	410
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	411 rfdiv = calc_a_b(arfcn, rx);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	412
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	413 if (rx != 1) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	414 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	415 *TP_Ptr++ = TPU_FAT(0x1274);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	416 TSP_TO_RF(0x043A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	417 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	418 TSP_TO_RF(rfdiv \| REG_PLL);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	419 *TP_Ptr++ = TPU_FAT(0x12FD);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	420 TSP_TO_RF(0x023A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	421 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	422
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	423 return(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	424 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	425
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	426 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	427 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	428 /* EXTERNAL FUNCTIONS CALLED BY LAYER1 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	429 /* COMMON TO L1 and TOOLKIT */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	430 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	431 /**************************************************************************/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	432
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	433 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	434 /* agc */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	435 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	436 /* Program a gain into IF amp */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	437 /* agc_value : gain in dB */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	438 /* */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	439 /* additional parameter for LNA setting */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	440 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	441 /* Rita and LoCosto versions look totally */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	442 /* different, reconstructing from disasm. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	443 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	444
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	445 void l1dmacro_agc(SYS_UWORD16 radio_freq, WORD8 gain, UWORD8 lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	446 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	447 int agc_table_index;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	448 UWORD16 rf_data;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	449
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	450 agc_table_index = gain - 2;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	451 if (agc_table_index < 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	452 agc_table_index++;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	453 agc_table_index >>= 1;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	454 if (gain >= 42)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	455 agc_table_index = 19;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	456 if (gain < 16)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	457 agc_table_index = 6;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	458 *TP_Ptr++ = TPU_FAT(0x1334);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	459 rf_data = REG_RX;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	460 if (!lna_off)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	461 rf_data \|= RF_GAIN;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	462 rf_data \|= AGC_TABLE[agc_table_index] << 11;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	463 rf_data \|= RX_CAL_MODE;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	464 TSP_TO_RF(rf_data);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	465 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	466
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	467 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	468 /* l1dmacro_rx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	469 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	470 /* programs RF synth for recceive */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	471 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	472 void l1dmacro_rx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	473 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	474 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	475
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	476 // Important: always use rx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	477 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	478 t = l1_config.params.rx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	479 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	480
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	481 t = rf_program(t, radio_freq, 1); // direction is set to 1 for Rx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	482 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	483
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	484 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	485 /* l1dmacro_tx_synth */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	486 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	487 /* programs RF synth for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	488 /* programs OPLL for transmit */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	489 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	490 void l1dmacro_tx_synth(SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	491 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	492 UWORD32 t;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	493
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	494 // Important: always use tx_synth_start_time for first TPU_AT
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	495 // Never remove below 2 lines!!!
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	496 t = l1_config.params.tx_synth_start_time;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	497 *TP_Ptr++ = TPU_FAT (t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	498
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	499 t = rf_program(t, radio_freq, 0); // direction set to 0 for Tx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	500 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	501
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	502 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	503 /* l1dmacro_rx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	504 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	505 /* Open window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	506 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	507 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	508 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	509 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	510 void l1dmacro_rx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	511 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	512 *TP_Ptr++ = TPU_FAT(0x1377);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	513 TSP_TO_RF(0x0A3A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	514 *TP_Ptr++ = TPU_FAT(0x137E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	515 TSP_TO_ABB(0x10);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	516 *TP_Ptr++ = TPU_FAT(0x1383);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	517 TSP_TO_ABB(0x18);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	518 *TP_Ptr++ = TPU_FAT(58);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	519 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up \| 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	520 *TP_Ptr++ = TPU_FAT(62);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	521 TSP_TO_ABB(0x14);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	522 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	523
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	524 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	525 /* l1pdmacro_rx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	526 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	527 /* Close window for normal burst reception */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	528 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	529 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	530 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	531 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	532 void l1dmacro_rx_down (WORD32 t)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	533 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	534 *TP_Ptr++ = TPU_FAT(t - 37);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	535 TSP_TO_RF(0x003A);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	536 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down \| 0x01);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	537 *TP_Ptr++ = TPU_FAT(t - 4);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	538 TSP_TO_ABB(0x00);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	539 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	540
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	541 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	542 /* l1dmacro_tx_up */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	543 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	544 /* Open transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	545 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	546 /* Rita version differs from LoCosto, */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	547 /* reconstructing from disassembly. */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	548 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	549 void l1dmacro_tx_up (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	550 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	551 if (l1_config.std.id == DCS1800 \|\|
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	552 rfband == MULTI_BAND2 &&
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	553 (l1_config.std.id == DUAL \|\| l1_config.std.id == DUALEXT)) {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	554 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	555 TSP_TO_RF(0x0007);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	556 *TP_Ptr++ = TPU_FAT(0x1288);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	557 TSP_TO_RF(0xC00B);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	558 *TP_Ptr++ = TPU_FAT(0x1292);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	559 TSP_TO_RF(0x3077);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	560 } else {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	561 *TP_Ptr++ = TPU_FAT(0x127E);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	562 TSP_TO_RF(0xC003);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	563 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	564 *TP_Ptr++ = TPU_FAT(0x12C6);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	565 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	566 *TP_Ptr++ = TPU_FAT(0x12E3);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	567 TSP_TO_RF(0x243A \| rf_chip_band);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	568 *TP_Ptr++ = TPU_FAT(0x1302);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	569 TSP_TO_ABB(0xC0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	570 *TP_Ptr++ = TPU_FAT(0x1352);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	571 TSP_TO_ABB(0x80);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	572 *TP_Ptr++ = TPU_FAT(0x1384);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	573 TSP_TO_ABB(0xA0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	574 *TP_Ptr++ = TPU_FAT(16);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	575 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up \| 0x01);
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	576 *TP_Ptr++ = TPU_FAT(21);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	577 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	578 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	579
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	580 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	581 /* l1dmacro_tx_down */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	582 /-------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	583 /* Close transmission window for normal burst*/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	584 /-------------------------------------------/
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	585 /* Rita version differs from LoCosto, */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	586 /* reconstructing from disassembly. */
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	587 /-------------------------------------------/
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	588 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	589 {
580 df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	590 if (adc_active == ACTIVE)
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	591 l1dmacro_adc_read_tx(t - 44);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	592 *TP_Ptr++ = TPU_FAT(t - 4);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	593 TSP_TO_ABB(0x80);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	594 *TP_Ptr++ = TPU_FAT(t + 22);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	595 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	596 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down \| 0x01);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	597 *TP_Ptr++ = TPU_FAT(t + 25);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	598 TSP_TO_RF(0x003A);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	599 *TP_Ptr++ = TPU_FAT(t + 31);
df12004ac8ee tpudrv12.c: l1dmacro_tx_{up,down} done Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: 579 diff changeset	600 TSP_TO_ABB(0x00);
579 df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	601 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	602
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	603 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	604 * l1dmacro_rx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	605 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	606 * Receive Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	607 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	608 #if (L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	609 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	610 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq, UWORD8 adc_active, UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	611 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	612 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	613 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	614 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	615 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	616 l1dmacro_rx_up(adc_active, csf_filter_choice, L1_KBD_DIS_RX_NB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	617 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	618 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	619 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	620 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	621 l1dmacro_rx_down (STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	622 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_NB * (-TRF_R3_1 + STOP_RX_SNB - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	623 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	624 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	625 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq,UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	626 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	627 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	628 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	629 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	630 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	631 l1dmacro_rx_up(csf_filter_choice, L1_KBD_DIS_RX_NB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	632 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	633 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	634 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	635 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	636 l1dmacro_rx_down (STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	637 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_NB * (-TRF_R3_1 + STOP_RX_SNB - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	638 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	639 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	640 #endif /(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	641
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	642 #if (L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	643 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	644 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq, UWORD8 adc_active, UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	645 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	646 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	647 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	648 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	649 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	650 l1dmacro_rx_up(adc_active, csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	651 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	652 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	653 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	654 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	655 l1dmacro_rx_down (STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	656
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	657 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	658 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	659 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq,UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	660 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	661 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	662 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	663 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	664 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	665 l1dmacro_rx_up(csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	666 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	667 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	668 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	669 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	670 l1dmacro_rx_down (STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	671
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	672 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	673 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	674
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	675 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	676
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	677
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	678
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	679 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	680 * l1dmacro_rx_sb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	681 * Receive Synchro burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	682 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	683 #if (L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	684 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	685 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	686 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	687 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	688 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	689 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	690 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	691 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	692
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	693 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	694 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_SB * (-TRF_R3_1 + STOP_RX_SB - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	695 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	696
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	697 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	698 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	699 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	700 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	701 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	702 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	703 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	704 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	705 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	706 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_SB * (-TRF_R3_1 + STOP_RX_SB - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	707 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	708 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	709
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	710 #endif/(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	711
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	712 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	713 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	714 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	715 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	716 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	717 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	718 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	719 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	720 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	721 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	722
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	723 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	724
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	725 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	726 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	727 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	728 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	729 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	730 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	731 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	732 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	733 l1dmacro_rx_down (STOP_RX_SB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	734
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	735 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	736 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	737
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	738 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	739
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	740 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	741 * l1dmacro_rx_ms
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	742 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	743 * Receive Power Measurement window
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	744 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	745 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	746 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	747 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	748 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	749 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_MS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	750 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	751 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	752 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	753 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	754 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	755 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_MS * (-TRF_R3_1 + STOP_RX_PW_1 - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	756 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	757
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	758 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	759 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	760 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	761 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_MS
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	762 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	763 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	764 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	765 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	766 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	767 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_MS * (-TRF_R3_1 + STOP_RX_PW_1 - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	768 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	769 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	770 #endif/(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	771
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	772 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	773 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	774 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	775 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	776 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	777 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	778 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	779 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	780 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	781 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	782
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	783 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	784
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	785 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	786 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	787 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	788 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	789 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	790 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	791 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	792 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	793 l1dmacro_rx_down (STOP_RX_PW_1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	794
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	795 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	796 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	797
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	798 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	799
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	800 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	801 * l1dmacro_rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	802 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	803 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	804 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	805 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	806 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	807 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	808 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	809 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	810 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	811 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	812 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	813 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	814 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	815 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	816 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	817 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	818 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	819 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	820 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	821 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	822 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	823 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	824 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	825 l1s.total_kbd_on_time = 5000;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	826 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	827 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	828 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	829 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	830 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	831 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	832 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	833 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	834 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	835 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	836 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	837
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	838 l1dmacro_rx_down (STOP_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	839 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB * (STOP_RX_FB - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	840 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	841 #endif/(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	842
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	843 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	844 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	845 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	846 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	847 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	848 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	849 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	850 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	851 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	852 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	853 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	854 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	855 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	856 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	857 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	858 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	859 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	860 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	861 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	862 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	863
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	864 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	865 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	866 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	867 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	868 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	869 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	870 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	871 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	872 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	873 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	874 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	875
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	876 l1dmacro_rx_down (STOP_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	877
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	878 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	879
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	880 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	881
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	882 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	883 * l1dmacro_rx_fb26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	884 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	885 * Receive Frequency burst for TCH.
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	886 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	887 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	888 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	889 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	890 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	891 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	892 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	893 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	894 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	895 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	896 l1s.total_kbd_on_time = 5000;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	897 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	898
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	899 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	900 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB26 * (STOP_RX_FB26 - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	901 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	902
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	903 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	904 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	905 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	906 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB26
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	907 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	908 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	909 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	910 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	911 l1s.total_kbd_on_time = 5000;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	912 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	913
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	914 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	915 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB26 * (STOP_RX_FB26 - TRF_R7);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	916 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	917 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	918 #endif/(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	919
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	920 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	921 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	922 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq,UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	923 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	924 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	925 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	926 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	927 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	928 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	929
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	930 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	931
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	932 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	933
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	934 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	935
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	936 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	937 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	938 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	939 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	940 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	941 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	942 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	943 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	944
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	945 *TP_Ptr++ = TPU_AT(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	946
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	947 l1dmacro_rx_down (STOP_RX_FB26);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	948
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	949 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	950 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	951 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	952
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	953 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	954 * l1dmacro_tx_nb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	955 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	956 * Transmit Normal burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	957 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	958 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	959
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	960 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	961 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	962 l1dmacro_tx_up (L1_KBD_DIS_TX_NB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	963 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active, L1_KBD_DIS_TX_NB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	964 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_TX_NB * (-TRF_T3_1 + l1_config.params.tx_nb_duration + TRF_T12);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	965 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	966
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	967 #endif/#if(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	968
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	969 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	970 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	971 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	972 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	973 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	974
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	975 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	976
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	977 #endif/#if(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	978
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	979 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	980 * l1dmacro_tx_ra
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	981 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	982 * Transmit Random Access burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	983 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	984 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	985
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	986 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	987 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	988 l1dmacro_tx_up (L1_KBD_DIS_TX_RA);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	989 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active, L1_KBD_DIS_TX_RA);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	990 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_TX_RA * (-TRF_T3_1 + l1_config.params.tx_ra_duration + TRF_T12);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	991 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	992 #endif /#if(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	993
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	994 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	995 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	996 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	997 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	998 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	999
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1000 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1001 #endif/#if(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1002
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1003 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1004 * l1dmacro_rx_cont
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1005 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1006 * Receive continuously
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1007 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1008 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1009 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1010 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1011 UWORD8 adc_active, UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1012 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1013 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1014 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1015 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1016 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1017 l1dmacro_rx_up (adc_active, csf_filter_choice, KBD_DISABLED
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1018 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1019 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1020 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1021 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1022 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1023 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1024 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1025 UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1026 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1027 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1028 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1029 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1030 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1031 l1dmacro_rx_up (csf_filter_choice,KBD_DISABLED
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1032 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1033 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1034 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1035 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1036 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1037 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1038 #endif/#if(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1039
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1040 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1041 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1042 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1043 UWORD8 adc_active, UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1044 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1045 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1046 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1047 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1048 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1049 l1dmacro_rx_up (adc_active, csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1050 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1051 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1052 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1053 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1054 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1055 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1056 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1057 UWORD8 csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1058 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1059 , UWORD8 saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1060 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1061 )
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1062 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1063 l1dmacro_rx_up (csf_filter_choice
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1064 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1065 , saic_flag_rx_up
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1066 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1067 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1068 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1069 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1070
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1071 #endif/#if(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1072
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1073
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1074 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1075 * l1dmacro_tx_cont
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1076 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1077 * Transmit continuously
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1078 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1079 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1080 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1081 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1082 l1dmacro_tx_up (KBD_DISABLED);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1083 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1084 #endif/#if(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1085
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1086 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1087 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1088 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1089 l1dmacro_tx_up ();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1090 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1091 #endif/#if(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1092
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1093 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1094 * l1d_macro_stop_cont
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1095 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1096 * Stop continuous Tx or Rx
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1097 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1098 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1099 void l1dmacro_stop_cont (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1100 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1101 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1102 l1dmacro_rx_down(STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1103 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1104 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0, KBD_DISABLED);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1105 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1106 #endif/#if(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1107
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1108 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1109 void l1dmacro_stop_cont (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1110 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1111 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1112 l1dmacro_rx_down(STOP_RX_SNB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1113 else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1114 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1115 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1116
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1117 #endif/* */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1118
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1119
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1120 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1121 /* l1dmacro_reset_hw */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1122 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1123 /* Reset and set OFFSET register */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1124 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1125
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1126 void l1dmacro_reset_hw(UWORD32 servingCellOffset)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1127 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1128 TPU_Reset(1); // reset TPU only, no TSP reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1129 TPU_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1130 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1131
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1132 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1133 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, TXM_SLEEP);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1134 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE),((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1135
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1136 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1137
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1138 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1139
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1140 // l1dmacro_RF_sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1141 // Program RF for BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1142
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1143
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1144 void l1dmacro_RF_sleep (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1145 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1146 // sending REG_OFF script
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1147 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_OFF), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1148
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1149 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP); //Shutdown FEM
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1150
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1151 *TP_Ptr++ = TPU_SLEEP;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1152 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1153 TP_Enable(1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1154 TPU_wait_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1155
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1156 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1157
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1158
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1159 // l1dmacro_RF_wakeup
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1160 //* wakeup RF from BIG or DEEP sleep
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1161
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1162 void l1dmacro_RF_wakeup (void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1163 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1164 // sending REG_ON script
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1165 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1166
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1167 *TP_Ptr++ = TPU_SLEEP;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1168 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1169 TP_Enable(1);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1170 TPU_wait_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1171
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1172
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1173 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1174
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1175
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1176 // l1dmacro_init_hw
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1177 // Reset VEGA, then remove reset
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1178 // Init RF/IF synthesizers
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1179
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1180 void l1dmacro_init_hw(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1181 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1182 WORD32 t = 100; // start time for actions
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1183
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1184 TP_Reset(1); // reset TPU and TSP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1185
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1186 // GSM 1.5 : TPU clock enable is in TPU
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1187 //---------------------------------------
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1188 TPU_ClkEnable(1); // TPU CLOCK ON
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1189
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1190 TP_Reset(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1191
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1192
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1193 TP_Ptr = (UWORD16 *) TPU_RAM;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1194
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1195 // Set FEM to inactive state before turning ON the RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1196 // At this point the RF regulators are still OFF. Thus the
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1197 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1198
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1199
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1200 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1201 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1202
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1203 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1204 *TP_Ptr++ = TPU_SYNC(0);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1205
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1206 //Check Initialisation or Reset for TPU2OCP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1207
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1208
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1209 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1210
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1211 t = 1000; // arbitrary start time
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1212
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1213 t = rf_init(t); // Initialize RF Board
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1214
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1215 *TP_Ptr++ = TPU_AT(t);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1216
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1217 // TPU_SLEEP
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1218 l1dmacro_idle();
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1219
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1220 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1221 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1222
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1223 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1224 /* l1dmacro_init_hw_light */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1225 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1226 /* Reset VEGA, then remove reset */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1227 /* Init RF/IF synthesizers */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1228 /------------------------------------------/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1229 void l1dmacro_init_hw_light(void)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1230 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1231 UWORD32 t = 100; // start time for actions //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1232 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1233 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1234 t = 1000; // arbitrary start time //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1235
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1236 t = rf_init_light(t); // Initialize RF Board //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1237
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1238 *TP_Ptr++ = TPU_AT(t); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1239 l1dmacro_idle(); //
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1240
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1241 return;
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1242 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1243
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1244 //BHO added
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1245 /*
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1246 * l1dmacro_rx_fbsb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1247 *
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1248 * Receive Frequency burst
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1249 */
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1250
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1251 #if ((REL99 == 1) && (FF_BHO == 1))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1252 #if(L1_RF_KBD_FIX == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1253 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1254 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1255 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1256 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1257 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1258 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1259 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1260 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1261 #if(NEW_SNR_THRESHOLD==1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1262 , SAIC_OFF
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1263 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1264 );
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1265 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1266 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1267 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1268
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1269
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1270 // same as rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1271 *TP_Ptr++ = TPU_AT(0); // 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1272 *TP_Ptr++ = TPU_AT(0); // 2
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1273 *TP_Ptr++ = TPU_AT(0); // 3
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1274 *TP_Ptr++ = TPU_AT(0); // 4
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1275 *TP_Ptr++ = TPU_AT(0); // 5
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1276 *TP_Ptr++ = TPU_AT(0); // 6
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1277 *TP_Ptr++ = TPU_AT(0); // 7
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1278 *TP_Ptr++ = TPU_AT(0); // 8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1279 *TP_Ptr++ = TPU_AT(0); // 9
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1280 *TP_Ptr++ = TPU_AT(0); // 10
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1281 *TP_Ptr++ = TPU_AT(0); // 11
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1282
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1283 // one more for SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1284 *TP_Ptr++ = TPU_AT(0); // 12
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1285
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1286 l1dmacro_rx_down (STOP_RX_FBSB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1287 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1288 #endif/(L1_RF_KBD_FIX == 1)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1289
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1290 #if(L1_RF_KBD_FIX == 0)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1291 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1292 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1293 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1294 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1295 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1296 {
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1297 #if (L1_MADC_ON == 1)
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1298 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1299 #else
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1300 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1301 #endif
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1302
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1303 // same as rx_fb
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1304 *TP_Ptr++ = TPU_AT(0); // 1
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1305 *TP_Ptr++ = TPU_AT(0); // 2
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1306 *TP_Ptr++ = TPU_AT(0); // 3
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1307 *TP_Ptr++ = TPU_AT(0); // 4
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1308 *TP_Ptr++ = TPU_AT(0); // 5
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1309 *TP_Ptr++ = TPU_AT(0); // 6
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1310 *TP_Ptr++ = TPU_AT(0); // 7
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1311 *TP_Ptr++ = TPU_AT(0); // 8
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1312 *TP_Ptr++ = TPU_AT(0); // 9
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1313 *TP_Ptr++ = TPU_AT(0); // 10
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1314 *TP_Ptr++ = TPU_AT(0); // 11
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1315
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1316 // one more for SB
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1317 *TP_Ptr++ = TPU_AT(0); // 12
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1318
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1319 l1dmacro_rx_down (STOP_RX_FBSB);
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1320 }
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1321 #endif/(L1_RF_KBD_FIX == 0)/
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1322 #endif // #if ((REL99 == 1) && (FF_BHO == 1))
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1323
df71726fa4e1 L1: checkpointing work in progress on tpudrv12.c Michael Spacefalcon <msokolov@ivan.Harhan.ORG> parents: diff changeset	1324 ////BHO

FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/tpudrv/tpudrv12.c @ 580:df12004ac8ee