FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/L1/include/l1_const.h @ 833:ea87417752f9
gsm-fw/g23m-glue/cst/cst.h: basic preen
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Thu, 23 Apr 2015 06:51:13 +0000 |
parents | bc3656cfe0d8 |
children | 10b4bed10192 |
rev | line source |
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1 /************* Revision Controle System Header ************* |
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2 * GSM Layer 1 software |
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3 * L1_CONST.H |
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4 * |
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5 * Filename l1_const.h |
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6 * Copyright 2003 (C) Texas Instruments |
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7 * |
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8 ************* Revision Controle System Header *************/ |
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9 #ifndef L1_CONST_H |
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10 #define L1_CONST_H |
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11 |
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12 #ifdef __MSDOS__ // Running BORLANDC compiler. |
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13 #ifdef MVC |
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14 #define EXIT exit(0) |
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15 #define FAR |
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16 #else |
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17 #define EXIT DOS_Exit(0) |
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18 #define FAR far |
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19 #endif |
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20 #else // Running ARM compiler. |
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21 #define FAR |
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22 #define EXIT exit(0) |
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23 #undef stricmp // appease gcc |
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24 #define stricmp strcmp |
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25 #endif |
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26 |
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27 |
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28 #if (CODE_VERSION != SIMULATION) |
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29 #undef NULL // appease gcc |
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30 #define NULL 0 |
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31 #endif |
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32 |
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33 #define NO_PAR 0 |
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34 |
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35 #define NO_TASK 0 |
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36 #define ALL_TASK 0xffffffff |
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37 #define ALL_PARAM 0xffffffff |
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38 |
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39 #define TRUE 1 |
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40 #define TRUE_L 1L |
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41 #define FALSE 0 |
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42 |
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43 #define NOT_PENDING 0 |
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44 #define PENDING 1 |
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45 |
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46 #define INACTIVE 2 |
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47 #define ACTIVE 3 |
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48 #define RE_ENTERED 4 |
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49 #define WAIT_IQ 5 |
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50 |
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51 //--------------------------------------------- |
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52 // MCU-DSP bit-field bit position definitions |
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53 //--------------------------------------------- |
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54 #if L1_GPRS |
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55 #define GPRS_SCHEDULER 1 // Select GPRS scheduler |
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56 #endif |
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57 #define GSM_SCHEDULER 2 // Select GSM scheduler |
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58 |
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59 //----------------------------- |
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60 // POWER MANAGEMENT............ |
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61 //----------------------------- |
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62 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.rf_wakeup_tpu_scenario_duration) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(rf_wakeup_tpu_scenario_duration) |
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63 #define TPU_LOAD 01 |
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64 #define TPU_FREEZE 02 |
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65 |
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66 // SLEEP ALGO SWITCH |
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67 #define NO_SLEEP 00 // ------ + ------ + ------ |
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68 #define SMALL_SLEEP 01 // SMALL + ------ + ------ |
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69 #define BIG_SLEEP 02 // ------ + BIG + ------ |
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70 #define DEEP_SLEEP 03 // ------ + BIG + DEEP |
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71 #define ALL_SLEEP 04 // SMALL + BIG + DEEP |
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72 |
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73 // GAUGING SAMPLES |
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74 #define SIZE_HIST 10 |
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75 #define MAX_BAD_GAUGING 3 |
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76 |
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77 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) |
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78 // Leonardo version had it set to 1348, but TCS3.2 (LoCosto) has it set |
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79 // to 605 instead. I'll revert it to the Leonardo value for now. |
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80 // -- Space Falcon |
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81 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4 |
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82 |
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83 // DSP state need to be used to enter Deep Sleep mode |
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84 #if (W_A_DSP_IDLE3 == 1) |
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85 #define C_DSP_IDLE3 3 |
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86 #endif |
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87 |
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88 //------------------------------------------------- |
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89 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm] |
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90 // to face temperature variation |
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91 // |
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92 // ACQUIS: variations allowed 32.768Khz +- 50 ppm |
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93 // 9 frames gauging is 1348*T32 (measured on eva4) |
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94 // UPDATE: variation allowed is +- 6 ppm jitter |
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95 //------------------------------------------------- |
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96 |
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97 #define MCUCLK 13000 // 13 Mhz |
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98 #define LF 32.768 |
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99 #define LF_100PPM 32.7712768 // 32.768*(1+100*10E-6) |
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100 #define LF_500PPM 32.751616 // 32.768*(1-500*10E-6) |
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101 #define LF_50PPM 32.7696384 // 32.768*(1+50*10E-6) |
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102 #define LF_6PPM 32.76819661 // 32.768*(1+6*10E-6) |
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103 |
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104 #define NB_INIT 5 // nbr of gauging to pass to ACQUIS |
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105 #define NB_ACQU 10 // nbr of gauging to pass to UPDATE |
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106 |
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107 #if (CHIPSET ==2 || CHIPSET ==3 || CHIPSET == 5 || CHIPSET == 6 || CHIPSET == 9) // PLL is at 65 Mhz !!!!!! |
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108 #define PLL 5 // 5*13Mhz = 65 Mhz |
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109 //------------------------------------------------- |
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110 // INIT: value is 32.768Khz at [-500 ppm, +100 ppm] |
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111 // |
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112 // ACQUIS: variations allowed 32.768Khz +- 50 ppm |
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113 // 9 frames gauging is 1348*T32 (measured on eva4) |
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114 // UPDATE: variation allowed is +- 6 ppm jitter |
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115 //------------------------------------------------- |
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116 #define C_CLK_MIN 1983 // 65000/32.7712768 = 1983.444234 |
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117 #define C_CLK_INIT_MIN 29113 // 0.444234*2^16 |
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118 #define C_CLK_MAX 1984 // 65000 / 32.751616 = 1984.634896 |
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119 #define C_CLK_INIT_MAX 41608 // 0.634896*2^16 |
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120 #define C_DELTA_HF_ACQUIS 130 // 1348/32.768-1348/32.7696384 = 0.002056632ms |
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121 // 0.002056632/0.0001538 = 130 T65Mhz |
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122 #define C_DELTA_HF_UPDATE 15 // 1348/32.768-1348/32.76819661 =0.00024691ms |
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123 // 0.00024691/0.0001538 = 15 T65Mhz |
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124 #endif |
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125 |
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126 #define ARMIO_CLK_CUT 0x0001 |
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127 #define UWIRE_CLK_CUT 0x0002 |
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128 |
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129 //----------------------------- |
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130 // Neighbour cell sync. reading |
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131 //----------------------------- |
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132 #if (L1_12NEIGH) |
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133 #define NBR_NEIGHBOURS 12 |
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134 #else |
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135 #define NBR_NEIGHBOURS 6 |
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136 #endif |
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137 |
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138 //----------------------------- |
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139 // LAYER 1 MEASUREMENT TASKS... |
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140 //----------------------------- |
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141 #define NBR_L1S_MEAS_TASKS 4 |
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142 |
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143 #define FSMS 0 |
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144 #define I_BAMS 1 |
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145 #define D_BAMS 2 |
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146 #define SERVMS 3 |
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147 |
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148 #define FSMS_MEAS (TRUE_L << FSMS) // Measurement task on FULL list (Cell Selection/Idle). |
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149 #define I_BAMS_MEAS (TRUE_L << I_BAMS) // Measurement task on BA list in Idle. |
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150 #define D_BAMS_MEAS (TRUE_L << D_BAMS) // Measurement task on BA list in Dedicated. |
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151 #define SERVMS_MEAS (TRUE_L << SERVMS) // Measurement task for Serving. |
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152 |
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153 #define FSMS_MEAS_MASK ALL_TASK ^ FSMS_MEAS |
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154 #define I_BAMS_MEAS_MASK ALL_TASK ^ I_BAMS_MEAS |
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155 #define D_BAMS_MEAS_MASK ALL_TASK ^ D_BAMS_MEAS |
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156 #define SERVMS_MEAS_MASK ALL_TASK ^ SERVMS_MEAS |
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157 |
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158 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) |
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159 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length |
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160 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length |
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161 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length |
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162 #define MIN_ACCEPTABLE_SNR_FOR_SB 200 // threshold under which a SB shall be considered as not found |
115
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163 |
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164 // Define max PM/TDMA according to DSP code and TPU RAM size |
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165 //---------------------------------------------------------- |
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166 |
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167 // NOTE: we should use a global variable initialized at L1 start and function of rx synth setup time. |
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168 |
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169 #if ((CHIPSET == 2) || (CHIPSET == 3) || (CHIPSET == 4)) |
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170 |
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171 // TPU RAM size limitation |
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172 |
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173 #define NB_MEAS_MAX 4 |
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174 #define NB_MEAS_MAX_GPRS 4 |
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175 |
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176 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
115
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177 |
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178 #if (DSP >= 33) |
115
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179 |
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180 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler |
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181 |
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182 #define NB_MEAS_MAX 8 |
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183 #define NB_MEAS_MAX_GPRS 8 |
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184 |
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185 #elif (DSP == 32) |
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186 |
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187 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler |
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188 // and 8 PMs with GPRS scheduler, 6 for DSP 32 because of CPU load |
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189 |
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190 #define NB_MEAS_MAX 4 |
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191 #define NB_MEAS_MAX_GPRS 6 |
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192 |
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193 #else |
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194 |
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195 |
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196 // DSP code prior to code 33 support upto 4 PMs with GSM scheduler |
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197 // and 8 PMs with GPRS scheduler |
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198 |
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199 #define NB_MEAS_MAX 4 |
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200 #define NB_MEAS_MAX_GPRS 8 |
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201 |
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202 #endif |
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203 #endif |
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204 #if (AMR == 1) |
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205 #define SID_UPDATE_BLEN 212 // SID UPDATE block length |
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206 #define RATSCCH_BLEN 212 // RATSCCH block length |
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207 #define TCH_AFS_BLEN 448 // TCH Adaptative Full rate Speech block length |
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208 // Note: the d_nerr value is calculated thanks to the bit class 1 of the block. |
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209 // But the number AHS bit class 1 depends on the type of vocoder currently used (c.f. 5.03 &3.10.7.2) |
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210 #define TCH_AHS_7_95_BLEN 188 // TCH AHS 7.95 Speech block length |
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211 #define TCH_AHS_7_4_BLEN 196 // TCH AHS 7.4 Speech block length |
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212 #define TCH_AHS_6_7_BLEN 200 // TCH AHS 6.7 Speech block length |
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213 #define TCH_AHS_5_9_BLEN 208 // TCH AHS 5.9 Speech block length |
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214 #define TCH_AHS_5_15_BLEN 212 // TCH AHS 5.15 Speech block length |
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215 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length |
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216 #endif |
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217 //---------------------------------------- |
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218 // LAYER 1 Asynchronous processes names... |
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219 //---------------------------------------- |
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220 #define NBR_L1A_PROCESSES 63 |
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221 |
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222 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) |
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223 #define CS_NORM 1 // l1a_cs_bcch_process(msg) |
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224 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) |
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225 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) |
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226 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) |
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227 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) |
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228 #define CR_B 6 // l1a_cres_process(msg) |
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229 #define ACCESS 7 // l1a_access_process(msg) |
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230 #define DEDICATED 8 // l1a_dedicated_process(msg) |
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231 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) |
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232 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) |
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233 #define DEDIC_6 11 // l1a_dedic6_process(msg) |
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234 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) |
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235 #define HW_TEST 13 // l1a_test_process(msg) |
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236 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) |
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237 #define I_ADC 15 // l1a_mmi_adc_req(msg) |
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238 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) |
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239 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) |
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240 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) |
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241 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) |
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242 #define TMODE_RA 20 // l1a_tmode_access_process(msg) |
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243 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) |
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244 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) |
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245 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) |
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246 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) |
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247 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) |
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248 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) |
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249 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) |
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250 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) |
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251 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) |
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252 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) |
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253 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) |
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254 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) |
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255 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) |
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256 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) |
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257 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) |
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258 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) |
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259 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) |
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260 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) |
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261 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) |
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262 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) |
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263 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) |
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264 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) |
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265 #define L1A_AUDIO_ONOFF_STATE 43 // l1a_mmi_audio_onoff_process(msg) |
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266 #define L1A_GTT_STATE 44 // l1a_mmi_gtt_process(msg) |
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267 #define INIT_L1 45 // l1a_init_layer1_process(msg) |
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268 #define HSW_CONF 46 // l1a_test_config_process(msg) |
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269 #define L1A_MP3_STATE 47 // l1a_mmi_mp3_process(msg) |
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270 #define TMODE_AUDIO_STEREOPATH_DRV_STATE 48 // l1a_tmode_audio_stereopath_process(msg) |
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271 #define L1A_EXT_AUDIO_MGT_STATE 49 // l1a_mmi_ext_audio_mgt_process(msg) |
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272 #define L1A_ANR_STATE 50 // l1a_mmi_anr_process(msg) |
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273 #define L1A_IIR_STATE 51 // l1a_mmi_iir_process(msg) |
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274 #define L1A_LIMITER_STATE 52 // l1a_mmi_limiter_process(msg) |
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275 #define L1A_ES_STATE 53 // l1a_mmi_es_process(msg) |
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276 #define L1A_MIDI_STATE 54 // l1a_mmi_midi_process(msg) |
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277 #define L1A_AGC_UL_STATE 55 // l1a_mmi_agc_ul_process(msg) |
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278 #define L1A_AGC_DL_STATE 56 // l1a_mmi_agc_dl_process(msg) |
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279 #define L1A_DRC_STATE 57 // l1a_mmi_drc_process(msg) |
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280 #define L1A_WCM_STATE 58 // l1a_mmi_wcm_process(msg) |
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281 #define L1A_AAC_STATE 59 // l1a_mmi_aac_process(msg) |
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282 #if (L1_VOCODER_IF_CHANGE == 1) |
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283 #define L1A_VOCODER_CFG_STATE 60 // l1a_mmi_vocoder_cfg_process |
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284 #endif |
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285 #if (L1_PCM_EXTRACTION) |
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286 #define L1A_PCM_DOWNLOAD_STATE 61 |
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287 #define L1A_PCM_UPLOAD_STATE 62 |
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288 #endif |
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289 |
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290 |
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291 #if TESTMODE |
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292 #define TMODE_UPLINK (1<<0) |
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293 #define TMODE_DOWNLINK (1<<1) |
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294 #endif |
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295 |
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296 //------------------------------------ |
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297 // LAYER 1 DOWNLINK & UPLINK TASKS... |
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298 //------------------------------------ |
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299 #define TASK_DISABLED 0 |
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300 #define TASK_ENABLED 1 |
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301 |
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302 #define SEMAPHORE_RESET 0 |
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303 #define SEMAPHORE_SET 1 |
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304 |
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305 #define NO_NEW_TASK -1 |
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306 |
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307 |
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308 // Tasks in the order of their priority (low to high). |
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309 |
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310 #if (GSM_IDLE_RAM != 0) |
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311 #define INT_RAM_GSM_IDLE_L1S_PROCESSES1 0x00000618 // PNP, PEP, NP, EP only are supported |
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312 #endif |
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313 |
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314 |
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315 #if !L1_GPRS |
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316 |
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317 #if ((REL99 == 1) && (FF_BHO == 1)) |
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318 #define NBR_DL_L1S_TASKS 33 |
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319 #else //#if ((REL99 == 1) && (FF_BHO == 1)) |
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320 #define NBR_DL_L1S_TASKS 32 |
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diff
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321 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
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322 |
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323 //GSM_TASKS/ |
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324 #define HWTEST 0 // DSP checksum reading |
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325 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
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326 #define DEDIC 2 // Global Dedicated mode switch |
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327 #define RAACC 3 // Channel access (ul) |
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328 #define RAHO 4 // Handover access (ul) |
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329 #define NSYNC 5 // Global Neighbour cell synchro switch |
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330 #define FBNEW 6 // Frequency burst search (Idle mode) |
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331 #define SBCONF 7 // Synchro. burst confirmation |
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332 #define SB2 8 // Synchro. burst read (1 frame uncertainty / SB position) |
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333 #define FB26 9 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
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diff
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334 #define SB26 10 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
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335 #define SBCNF26 11 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
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336 #define FB51 12 // Frequency burst search, dedic mode MF51 |
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337 #define SB51 13 // Synchro burst search, dedic MF51 |
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338 #define SBCNF51 14 // Synchro burst confirmation, dedic MF51 |
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339 #define BCCHN 15 // BCCH Neighbor in GSM Idle |
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340 #define ALLC 16 // All CCCH Reading |
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341 #define EBCCHS 17 // Extended BCCH Serving Reading |
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diff
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342 #define NBCCHS 18 // Normal BCCH ServingReading |
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343 #define SMSCB 19 // CBCH serving Reading |
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344 #define NP 20 // Normal paging Reading |
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345 #define EP 21 // Extended pagingReading |
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346 #define ADL 22 // SACCH(SDCCH) DL |
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347 #define AUL 23 // SACCH(SDCCH) UL |
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348 #define DDL 24 // SDCCH DL |
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349 #define DUL 25 // SDCCH UL |
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350 #define TCHD 26 // Dummy for TCH Half rate |
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351 #define TCHA 27 // SACCH(TCH) |
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352 #define TCHTF 28 // TCH Full rate |
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353 #define TCHTH 29 // TCH Half rate |
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354 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode |
530
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528
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355 #if ((REL99 == 1) && (FF_BHO == 1)) |
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356 #define FBSB 31 // Freq + Synchro Burst Reading in Blind Handover |
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357 #define SYNCHRO 32 // synchro task: L1S reset |
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358 #else //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
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359 #define SYNCHRO 31 // synchro task: L1S reset |
530
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360 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
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361 //END_GSM_TASKS/ |
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362 |
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363 #else |
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364 |
530
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528
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365 #if ((REL99 == 1) && (FF_BHO == 1)) |
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366 #define NBR_DL_L1S_TASKS 46 |
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367 #else //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
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368 #define NBR_DL_L1S_TASKS 45 |
530
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528
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369 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
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370 |
530
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528
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371 #if (FF_REPEATED_SACCH == 1 ) |
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372 #define REPEATED_SACCH_ENABLE 1 |
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373 #endif /* FF_REPEATED_SACCH */ |
115
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374 //GPRS_TASKS/ |
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diff
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375 #define HWTEST 0 // DSP checksum reading |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
376 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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377 #define DEDIC 2 // Global Dedicated mode switch |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
378 #define RAACC 3 // Channel access (ul) |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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379 #define RAHO 4 // Handover access (ul) |
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parents:
diff
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380 #define NSYNC 5 // Global Neighbour cell synchro switch |
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parents:
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381 #define POLL 6 // Packet Polling (Access) |
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diff
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382 #define PRACH 7 // Packet Random Access Channel |
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parents:
diff
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383 #define ITMEAS 8 // Interference measurements |
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parents:
diff
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|
384 #define FBNEW 9 // Frequency burst search (Idle mode) |
530
25a7fe25864c
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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528
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|
385 #define SBCONF 10 // Synchro. burst confirmation |
115
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parents:
diff
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386 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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387 #define PTCCH 12 // Packet Timing Advance control channel |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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388 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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389 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
390 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
1e41550feec5
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parents:
diff
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|
391 #define FB51 16 // Frequency burst search, dedic mode MF51 |
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parents:
diff
changeset
|
392 #define SB51 17 // Synchro burst search, dedic MF51 |
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parents:
diff
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|
393 #define SBCNF51 18 // Synchro burst confirmation, dedic MF51 |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
394 #define PDTCH 19 // Packet Data channel |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
395 #define BCCHN 20 // BCCH Neighbor in GSM Idle |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
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|
396 #define ALLC 21 // All CCCH Reading |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
397 #define EBCCHS 22 // Extended BCCH Serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
398 #define NBCCHS 23 // Normal BCCH Serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
399 #define ADL 24 // SACCH(SDCCH) DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
400 #define AUL 25 // SACCH(SDCCH) UL |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
401 #define DDL 26 // SDCCH DL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
402 #define DUL 27 // SDCCH UL |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
403 #define TCHD 28 // Dummy for TCH Half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
404 #define TCHA 29 // SACCH(TCH) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
405 #define TCHTF 30 // TCH Full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
406 #define TCHTH 31 // TCH Half rate |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
407 #define PALLC 32 // All PCCCH reading |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
408 #define SMSCB 33 // CBCH serving Reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
409 #define PBCCHS 34 // PBCCH serving reading |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
410 #define PNP 35 // Packet Normal paging Reading |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
411 #define PEP 36 // Packet Extended paging Reading |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
412 #define SINGLE 37 // Single Block for GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
413 #define PBCCHN_TRAN 38 // Packet BCCH Neighbor in Packet Transfer mode. |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
414 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
415 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
416 #define NP 41 // Normal paging Reading |
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nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
417 #define EP 42 // Extended paging Reading |
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nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
418 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
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|
419 #if ((REL99 == 1) && (FF_BHO == 1)) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
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|
420 #define FBSB 44 // Freq + Synchro Burst Reading in Blind Handover |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
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|
421 #define SYNCHRO 45 // synchro task: L1S reset |
25a7fe25864c
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parents:
528
diff
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|
422 #else //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
423 #define SYNCHRO 44 // synchro task: L1S reset |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
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|
424 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) |
115
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
425 //END_GPRS_TASKS/ |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
426 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
427 #endif |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
428 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
429 #if (GSM_IDLE_RAM != 0) |
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430 #define SIZE_TAB_L1S_MONITOR (((NBR_DL_L1S_TASKS-1) >> 5) + 1) |
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431 #endif |
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432 |
115
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|
433 //------------------------------------ |
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|
434 // LAYER 1 API |
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|
435 //------------------------------------ |
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|
436 #define MCSI_PORT1 0 |
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|
437 #define MCSI_PORT2 1 |
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diff
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|
438 |
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|
439 |
530
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440 #if (W_A_DSP_PR20037 == 1) |
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441 //--------------------------------- |
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442 // DSP vocoder Enable/ Disable |
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443 //--------------------------------- |
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444 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
533
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531
diff
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|
445 #if (L1_VOCODER_IF_CHANGE == 0) |
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446 #define TCH_VOCODER_DISABLE_REQ 0 |
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447 #define TCH_VOCODER_ENABLE_REQ 1 |
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diff
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448 #define TCH_VOCODER_ENABLED 2 |
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449 #define TCH_VOCODER_DISABLED 3 |
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diff
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|
450 #else |
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451 #define TCH_VOCODER_RESET_COMMAND 0 |
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452 #define TCH_VOCODER_ENABLE_COMMAND 1 |
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|
453 #define TCH_VOCODER_DISABLE_COMMAND 2 |
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|
454 #endif // L1_VOCODER_IF_CHANGE == 0 |
115
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|
455 |
533
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|
456 #if (W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) |
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531
diff
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|
457 // Number of TDMA wait frames until the DSP output is steady |
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|
458 #define DSP_VOCODER_ON_TRANSITION 165 |
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531
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|
459 #endif |
530
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528
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|
460 #endif // FF_L1_TCH_VOCODER_CONTROL |
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|
461 #endif // W_A_DSP_PR20037 |
115
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|
462 |
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diff
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|
463 |
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|
464 //--------------------------------- |
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|
465 // Handover Finished cause defines. |
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|
466 //--------------------------------- |
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|
467 #define HO_COMPLETE 0 |
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|
468 #define HO_TIMEOUT 1 |
530
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diff
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|
469 #if ((REL99 == 1) && (FF_BHO == 1)) |
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|
470 #define HO_FB_FAIL 2 |
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|
471 #define HO_SB_FAIL 3 |
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|
472 |
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|
473 #define NORMAL_HANDOVER 0 |
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474 #define BLIND_HANDOVER 1 |
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|
475 #endif |
115
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|
476 |
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diff
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|
477 //--------------------------------- |
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diff
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|
478 // FB detection algorithm defines. |
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diff
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|
479 //--------------------------------- |
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|
480 #define FB_MODE_0 0 // FB detec. mode 0. |
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diff
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|
481 #define FB_MODE_1 1 // FB detec. mode 1. |
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diff
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|
482 |
1e41550feec5
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diff
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|
483 //--------------------------------- |
530
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528
diff
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|
484 // SB acquisition phase. |
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528
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|
485 //--------------------------------- |
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|
486 #if ((REL99 == 1) && ((FF_BHO == 1) || (FF_RTD == 1))) |
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|
487 #define SB_ACQUISITION_PHASE 5 |
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|
488 #endif |
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diff
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|
489 |
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|
490 //--------------------------------- |
115
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diff
changeset
|
491 // AFC control defines. |
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diff
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|
492 //--------------------------------- |
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|
493 #define AFC_INIT 1 |
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diff
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|
494 #define AFC_OPEN_LOOP 2 |
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parents:
diff
changeset
|
495 #define AFC_CLOSED_LOOP 3 |
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diff
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|
496 |
1e41550feec5
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diff
changeset
|
497 // For VCXO algo. |
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diff
changeset
|
498 #if (VCXO_ALGO) |
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diff
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|
499 #define AFC_INIT_CENTER 4 |
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diff
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|
500 #define AFC_INIT_MAX 5 |
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diff
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|
501 #define AFC_INIT_MIN 6 |
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diff
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|
502 #endif |
530
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528
diff
changeset
|
503 |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
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531
diff
changeset
|
504 #if 0 |
530
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528
diff
changeset
|
505 // For Locosto |
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528
diff
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|
506 #define L1_AFC_MANUAL_MODE 0 |
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528
diff
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|
507 #define L1_AFC_SCRIPT_MODE 1 |
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528
diff
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|
508 #define L1_AFC_NONE 2 |
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528
diff
changeset
|
509 |
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528
diff
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|
510 #define L1_CTL_ZERO_IF 2 |
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diff
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|
511 #define L1_CTL_LOW_IF 1 |
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528
diff
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|
512 |
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diff
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|
513 #define L1_IL_INVALID 0 |
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|
514 #define L1_IL_VALID 1 |
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528
diff
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|
515 |
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528
diff
changeset
|
516 // End Locosto |
533
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531
diff
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|
517 #endif |
530
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parents:
528
diff
changeset
|
518 |
115
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diff
changeset
|
519 //--------------------------------- |
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diff
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|
520 // TOA control defines. |
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parents:
diff
changeset
|
521 //--------------------------------- |
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diff
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|
522 #define TOA_INIT 1 |
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diff
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|
523 #define TOA_RUN 2 |
530
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528
diff
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|
524 #if (TOA_ALGO == 2) |
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parents:
528
diff
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|
525 // In this version TOA is refreshed every 2 seconds |
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528
diff
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|
526 #define L1_TOA_UPDATE_TIME ((UWORD32)(433)) |
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|
527 #endif |
115
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diff
changeset
|
528 |
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diff
changeset
|
529 //--------------------------------- |
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diff
changeset
|
530 // Neighbour Synchro possible status. |
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parents:
diff
changeset
|
531 //--------------------------------- |
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diff
changeset
|
532 #define NSYNC_FREE 0 |
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parents:
diff
changeset
|
533 #define NSYNC_PENDING 1 |
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parents:
diff
changeset
|
534 #define NSYNC_COMPLETED 2 |
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parents:
diff
changeset
|
535 #if (L1_12NEIGH ==1) |
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parents:
diff
changeset
|
536 #define NSYNC_WAIT 3 |
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parents:
diff
changeset
|
537 #endif |
1e41550feec5
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parents:
diff
changeset
|
538 |
1e41550feec5
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parents:
diff
changeset
|
539 /************************************/ |
1e41550feec5
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parents:
diff
changeset
|
540 /* Layer 1 constants declaration... */ |
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diff
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|
541 /************************************/ |
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nuc-fw: Init_Target() reconstructed
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diff
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|
542 #define MAX_FN ((UWORD32)26*51*2048) |
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parents:
diff
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|
543 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff
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|
544 #if L1_GPRS |
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diff
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|
545 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX |
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|
546 #endif |
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diff
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|
547 |
530
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528
diff
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|
548 #if FF_L1_IT_DSP_DTX |
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diff
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|
549 // dtx_status states |
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528
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|
550 #define DTX_AVAILABLE 0 |
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528
diff
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|
551 #define DTX_AWAITED 1 |
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528
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|
552 #define DTX_IT_DSP 2 |
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|
553 |
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|
554 // Latency time for Fast DTX availability upon channel start (TDMAs) |
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|
555 #define FAST_DTX_LATENCY 10 //chaged from value-4 -CQ- 74387 |
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556 #endif |
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|
557 |
115
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
558 //-------------------------------------------------------- |
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diff
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|
559 // standard specific constants used in l1_config.std.xxx |
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diff
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|
560 //-------------------------------------------------------- |
530
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|
561 #if (L1_FF_MULTIBAND == 0) |
115
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diff
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|
562 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff
changeset
|
563 // GSM |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
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diff
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|
564 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 |
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diff
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|
565 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. |
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parents:
diff
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|
566 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band |
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parents:
diff
changeset
|
567 // GSM_E |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
568 #define FIRST_ARFCN_EGSM 1 // 1st arfcn is 1 |
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parents:
diff
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|
569 #define NBMAX_CARRIER_EGSM 174 // 174 carriers for GSM_E. |
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parents:
diff
changeset
|
570 #define MAX_TXPWR_EGSM 19 // lowest power ctrl level value in GSM-E band |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
571 // PCS1900 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
572 #define FIRST_ARFCN_PCS 512 // 1st arfcn is 512 |
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parents:
diff
changeset
|
573 #define NBMAX_CARRIER_PCS 299 // 299 carriers for PCS1900. |
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parents:
diff
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|
574 #define MAX_TXPWR_PCS 15 // lowest power ctrl level value in PCS band |
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parents:
diff
changeset
|
575 #define TXPWR_TURNING_POINT_PCS 21 |
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parents:
diff
changeset
|
576 // DCS1800 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
577 #define FIRST_ARFCN_DCS 512 // 1st arfcn is 512 |
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parents:
diff
changeset
|
578 #define NBMAX_CARRIER_DCS 374 // 374 carriers for DCS1800. |
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parents:
diff
changeset
|
579 #define MAX_TXPWR_DCS 15 // lowest power ctrl level value in DCS band |
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parents:
diff
changeset
|
580 #define TXPWR_TURNING_POINT_DCS 28 |
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parents:
diff
changeset
|
581 // GSM850 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
582 #define FIRST_ARFCN_GSM850 128 // 1st arfcn is 128 |
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parents:
diff
changeset
|
583 #define NBMAX_CARRIER_GSM850 124 // 124 carriers for GSM850 |
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parents:
diff
changeset
|
584 #define NBMEAS_GSM850 3 // 3 measurement per frame TBD |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
585 #define MAX_TXPWR_GSM850 19 // lowest power ctrl level value in GSM band |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
586 // DUAL |
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parents:
diff
changeset
|
587 #define FIRST_DCS_INDEX_DUAL 125 // 1st DCS index within the 498 continu list |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
588 #define NBMAX_CARRIER_DUAL 124+374 // 374 carriers for DCS1800 + 124 carriers for GSM900 Band |
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parents:
diff
changeset
|
589 #define TXPWR_TURNING_POINT_DUAL 28 |
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parents:
diff
changeset
|
590 // DUALEXT |
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parents:
diff
changeset
|
591 #define FIRST_DCS_INDEX_DUALEXT 175 // 1st DCS index within the 548 continu list |
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parents:
diff
changeset
|
592 #define NBMAX_CARRIER_DUALEXT 174+374 // 374 carriers for DCS1800 + 174 carriers for E-GSM900 Band |
1e41550feec5
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parents:
diff
changeset
|
593 #define TXPWR_TURNING_POINT_DUALEXT 28 |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
594 // DUAL_US |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
595 #define FIRST_ARFCN_GSM850_DUAL_US 1 // 1st GSM850 index within the 423 continu list |
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parents:
diff
changeset
|
596 #define FIRST_PCS_INDEX_DUAL_US 125 // 1st PCS index within the 423 continu list |
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parents:
diff
changeset
|
597 #define NBMAX_CARRIER_DUAL_US 124+299 // 299 carriers for PCS1900 + 124 carriers for GSM850\ Band |
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
598 #define NBMEAS_DUAL_US 4 // 4 measurements per frames. |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
599 #define TXPWR_TURNING_POINT_DUAL_US 28 // TBD |
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parents:
diff
changeset
|
600 |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
601 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
602 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
603 //non optimized!!! (dynamic memory allocation to optimize) |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
604 #define BAND1 1 |
1e41550feec5
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parents:
diff
changeset
|
605 #define BAND2 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
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parents:
diff
changeset
|
606 |
530
25a7fe25864c
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parents:
528
diff
changeset
|
607 #else // L1_FF_MULTIBAND == 1 below |
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528
diff
changeset
|
608 |
25a7fe25864c
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528
diff
changeset
|
609 /***** GSM Band Identifiers to be communicated to the L3, these indexes are fixed *****************/ |
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diff
changeset
|
610 #define PGSM900 0 |
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528
diff
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|
611 #define GSM850 1 |
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diff
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|
612 #define PCS1900 2 |
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diff
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613 #define DCS1800 3 |
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528
diff
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|
614 #define GSM750 4 |
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528
diff
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|
615 #define GSM480 5 |
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616 #define GSM450 6 |
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528
diff
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|
617 #define T_GSM380 7 |
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diff
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618 #define T_GSM410 8 |
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diff
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|
619 #define T_GSM900 9 |
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diff
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|
620 #define EGSM900 10 |
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528
diff
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621 #define RGSM900 11 |
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diff
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|
622 |
25a7fe25864c
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528
diff
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|
623 /***** PGSM900, EGSM900 and RGSM900 are seen a single band GSM900 **********************************/ |
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528
diff
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|
624 #define GSM900 12 |
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528
diff
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|
625 |
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528
diff
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|
626 /***** The total number of bands specified in the 3GPP Specs ***************************************/ |
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528
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|
627 #define NB_MAX_GSM_BANDS 12 |
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diff
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|
628 |
25a7fe25864c
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diff
changeset
|
629 #if 0 |
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diff
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|
630 /********************************* Physical_band_ids to be supported Definition *******************/ |
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diff
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|
631 #define RGSM900_SUPPORTED 0 |
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diff
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|
632 #define EGSM900_SUPPORTED 1 |
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diff
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|
633 #define PGSM900_SUPPORTED 0 |
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diff
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|
634 #define GSM850_SUPPORTED 1 |
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|
635 #define PCS1900_SUPPORTED 1 |
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|
636 #define DCS1800_SUPPORTED 1 |
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|
637 #define GSM750_SUPPORTED 0 |
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|
638 #define GSM710_SUPPORTED 0 |
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diff
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|
639 #define GSM480_SUPPORTED 0 |
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|
640 #define T_GSM380_SUPPORTED 0 |
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|
641 #define T_GSM410_SUPPORTED 0 |
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|
642 #define GSM450_SUPPORTED 0 |
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|
643 #define T_GSM900_SUPPORTED 0 |
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|
644 |
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diff
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|
645 /***** Bands to be supported Eror Cases ******************************************/ |
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646 |
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647 #if (RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1) |
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648 #error " Only one of the RGSM900 or EGSM900 or PGSM900 bands is supported" |
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649 #endif/*if(RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1)*/ |
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650 |
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651 |
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652 /***** GSM900_SUPPORTED means one of P, E or R GSM900 is supported ***/ |
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653 #if ((PGSM900_SUPPORTED == 1) || (EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) |
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654 #define GSM900_SUPPORTED 1 |
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655 #endif |
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656 |
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657 #endif // if 0 |
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658 |
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659 /***** Number of Physical Bands Supported by the L1 Calculation, this constant is less than NB_MAX_GSM_BANDS**********/ |
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660 #define NB_MAX_SUPPORTED_BANDS (GSM900_SUPPORTED +\ |
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661 GSM850_SUPPORTED + \ |
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662 PCS1900_SUPPORTED + \ |
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663 DCS1800_SUPPORTED + \ |
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664 GSM750_SUPPORTED + \ |
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665 GSM480_SUPPORTED + \ |
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666 GSM450_SUPPORTED + \ |
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667 T_GSM410_SUPPORTED + \ |
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668 T_GSM380_SUPPORTED + \ |
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669 T_GSM900_SUPPORTED) |
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670 |
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671 /***** |
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672 EGSM and RGSM have two separate ranges of ARFCN's that are considered by L1 as |
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673 separate bands. Hence number of supported bands is one more if E or R GSM900 is |
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674 supported. |
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675 *****/ |
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676 #if (PGSM900_SUPPORTED == 1)// This means E or R GSM900 is not supported |
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677 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS NB_MAX_SUPPORTED_BANDS |
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678 #endif |
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679 |
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680 #if ((EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) |
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681 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS (NB_MAX_SUPPORTED_BANDS + 1) |
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682 #endif |
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683 |
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684 #if 0 |
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685 /*The following constants allows the indexing of the physical bands in the MULTIBAND rf table located in l1_cust.c*/ |
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686 /*The bands positionning order is related to the bands ENUMERATION here below*/ |
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687 /*Changing the bands positions in this table implies changing the the band ENUMERATION in the file l1_const.h*/ |
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688 /*Changing the the band ENUMERATION in the file l1_const.h implies changing the bands positions in the table below*/ |
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689 enum |
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690 { |
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691 #if (GSM900_SUPPORTED == 1) |
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692 GSM900_ID, |
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693 #endif /*if (GSM900_SUPPORTED == 1)*/ |
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694 |
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695 #if (GSM850_SUPPORTED == 1) |
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696 GSM850_ID, |
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697 #endif /*if (GSM850_SUPPORTED == 1)*/ |
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698 |
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699 #if (DCS1800_SUPPORTED == 1) |
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700 DCS1800_ID, |
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701 #endif /*if (DCS1800_SUPPORTED == 1)*/ |
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702 |
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703 #if (PCS1900_SUPPORTED == 1) |
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704 PCS1900_ID, |
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705 #endif /*if (PCS1900_SUPPORTED == 1)*/ |
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706 |
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707 #if (GSM750_SUPPORTED == 1) |
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708 GSM750_ID, |
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709 #endif /*if (GSM750_SUPPORTED == 1)*/ |
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710 |
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711 #if (GSM480_SUPPORTED == 1) |
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712 GSM480_ID, |
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713 #endif /*if (GSM480_SUPPORTED == 1)*/ |
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714 |
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715 #if GSM450_SUPPORTED |
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716 GSM450_ID, |
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717 #endif /*if (GSM450_SUPPORTED == 1)*/ |
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718 |
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719 #if (T_GSM410_SUPPORTED == 1) |
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720 T_GSM410_ID, |
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721 #endif /*if (T_GSM410_SUPPORTED == 1)*/ |
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722 |
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723 #if (T_GSM380_SUPPORTED == 1) |
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724 T_GSM380_ID, |
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725 #endif /*if (T_GSM380_SUPPORTED == 1)*/ |
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726 |
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727 #if (T_GSM900_SUPPORTED == 1) |
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728 T_GSM900_ID, |
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729 #endif /*if (T_GSM900_SUPPORTED == 1)*/ |
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730 }; |
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731 #endif |
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732 /***********************************Calculation of the number of carriers per Effective Band*********/ |
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733 #if 0 |
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734 |
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735 #if (PGSM900_SUPPORTED == 1) |
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736 #define NB_CARRIER_900_LOW_SUB_BAND 124 |
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737 #define NB_CARRIER_900_HIGH_SUB_BAND 0 |
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738 #endif /*if (PGSM900_SUPPORTED == 1)*/ |
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739 |
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740 #if (EGSM900_SUPPORTED == 1) |
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741 #define NB_CARRIER_900_LOW_SUB_BAND 125 |
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742 #define NB_CARRIER_900_HIGH_SUB_BAND 49 |
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743 #endif /*if (EGSM900_SUPPORTED == 1)*/ |
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744 |
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745 #if (RGSM900_SUPPORTED == 1) |
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746 #define NB_CARRIER_900_LOW_SUB_BAND 125 |
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747 #define NB_CARRIER_900_HIGH_SUB_BAND 69 |
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748 #endif /*if (RGSM900_SUPPORTED == 1)*/ |
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749 |
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750 #define NB_CARRIER_850 124 |
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751 #define NB_CARRIER_1800 344 |
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752 #define NB_CARRIER_1900 299 |
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753 #define NB_CARRIER_750 74 |
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754 #define NB_CARRIER_480 35 |
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755 #define NB_CARRIER_450 35 |
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756 #define NB_CARRIER_T_410 47 |
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757 #define NB_CARRIER_T_380 47 |
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758 #define NB_CARRIER_T_900 27 |
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759 |
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760 /****** NBMAX_CARRIER is the total number of carriers supported based on band support *********/ |
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761 |
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762 #define NBMAX_CARRIER (((NB_CARRIER_900_LOW_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM900_SUPPORTED) \ |
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763 + (NB_CARRIER_850 * GSM850_SUPPORTED) \ |
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764 + (NB_CARRIER_1800 * DCS1800_SUPPORTED)\ |
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765 + (NB_CARRIER_1900 * PCS1900_SUPPORTED) \ |
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766 + (NB_CARRIER_750 * GSM750_SUPPORTED) \ |
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767 + (NB_CARRIER_480 * GSM480_SUPPORTED) \ |
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768 + (NB_CARRIER_450 * GSM450_SUPPORTED) \ |
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769 + (NB_CARRIER_T_410 * T_GSM410_SUPPORTED) \ |
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770 + (NB_CARRIER_T_380 * T_GSM380_SUPPORTED) \ |
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771 + (NB_CARRIER_T_900 * T_GSM900_SUPPORTED)) |
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772 |
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773 |
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774 /** |
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775 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers |
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776 with exceptiopn of 1900 where the numbers start from 1024 onwards. This results in |
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777 holes in the numbering given from L3 and hence cannot be used for indexing arrays of |
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778 carriers. To index arrays the frequency numbers from L3 are translated to 'operative radio |
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779 frequencies'. For any band configuration supported, this is a continuos number from |
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780 0 to NBMAX_CARRIER (The sum of number of carriers in all supported bands) |
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781 The defines below are for finding the first operative frequency corresponding to each band |
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782 **/ |
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783 |
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784 #define FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND 0 |
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785 #define FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND (FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND + NB_CARRIER_900_LOW_SUB_BAND) * GSM900_SUPPORTED |
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786 #define FIRST_OPERATIVE_RADIO_FREQ_850 (FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM850_SUPPORTED |
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787 #define FIRST_OPERATIVE_RADIO_FREQ_1900 (FIRST_OPERATIVE_RADIO_FREQ_850 + NB_CARRIER_850) * PCS1900_SUPPORTED |
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788 #define FIRST_OPERATIVE_RADIO_FREQ_1800 (FIRST_OPERATIVE_RADIO_FREQ_1900 + NB_CARRIER_1900) * DCS1800_SUPPORTED |
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789 #define FIRST_OPERATIVE_RADIO_FREQ_750 (FIRST_OPERATIVE_RADIO_FREQ_1800 + NB_CARRIER_1800) * GSM750_SUPPORTED |
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790 #define FIRST_OPERATIVE_RADIO_FREQ_480 (FIRST_OPERATIVE_RADIO_FREQ_750 + NB_CARRIER_750) * GSM480_SUPPORTED |
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791 #define FIRST_OPERATIVE_RADIO_FREQ_450 (FIRST_OPERATIVE_RADIO_FREQ_480 + NB_CARRIER_480) * GSM450_SUPPORTED |
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792 #define FIRST_OPERATIVE_RADIO_FREQ_T_410 (FIRST_OPERATIVE_RADIO_FREQ_450 + NB_CARRIER_450) * T_GSM410_SUPPORTED |
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793 #define FIRST_OPERATIVE_RADIO_FREQ_T_380 (FIRST_OPERATIVE_RADIO_FREQ_T_410 + NB_CARRIER_T_410) * T_GSM380_SUPPORTED |
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794 #define FIRST_OPERATIVE_RADIO_FREQ_T_900 (FIRST_OPERATIVE_RADIO_FREQ_T_380 + NB_CARRIER_T_380) * T_GSM900_SUPPORTED |
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795 |
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796 /********************** Definition of the first radio freqs as per L3-L1 interface *********/ |
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797 |
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798 #if (PGSM900_SUPPORTED == 1) |
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799 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 1 |
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800 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 0 |
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801 #endif /*if (PGSM900_SUPPORTED == 1)*/ |
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802 |
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803 #if (EGSM900_SUPPORTED == 1) |
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804 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 |
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805 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 975 |
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806 #endif /*if (EGSM900_SUPPORTED == 1)*/ |
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807 |
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808 #if (RGSM900_SUPPORTED == 1) |
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809 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 |
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810 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 955 |
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811 #endif /* (RGSM900_SUPPORTED == 1)*/ |
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812 |
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813 #define FIRST_RADIO_FREQ_850 128 |
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814 #define FIRST_RADIO_FREQ_1800 512 |
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815 #define FIRST_RADIO_FREQ_1900 1024 |
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816 #define FIRST_TPU_RADIO_FREQ_1900 512 /* TBD The GSM1900 is the unique band in which the FIRST_TPU_RADIO is not equal to FIRST_RADIO_FREQ*/ |
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817 |
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818 #endif // if 0 |
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819 |
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820 #endif // L1_FF_MULTIBAND == 0 |
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821 |
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822 #if (L1_FF_MULTIBAND == 0) |
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823 #else |
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824 /* Prototypes */ |
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825 |
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826 #define l1_multiband_radio_freq_convert_into_effective_band_id(radio_freq) \ |
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827 rf_convert_rffreq_to_l1subband(radio_freq) |
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828 |
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829 #define l1_multiband_radio_freq_convert_into_physical_band_id(radio_freq) \ |
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830 ((UWORD8)rf_convert_l1freq_to_rf_band_idx(rf_convert_rffreq_to_l1freq(radio_freq))) |
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831 |
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832 #define l1_multiband_radio_freq_convert_into_operative_radio_freq(radio_freq) \ |
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833 rf_convert_rffreq_to_l1freq(radio_freq) |
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834 |
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835 #if (CODE_VERSION != SIMULATION) |
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836 UWORD8 rf_convert_rffreq_to_l1subband(UWORD16 rf_freq); |
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837 UWORD8 rf_convert_l1freq_to_l1subband(UWORD16 l1_freq); |
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838 WORD8 rf_convert_l1freq_to_rf_band_idx(UWORD16 l1_freq); |
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839 UWORD16 rf_convert_l1freq_to_rffreq(UWORD16 l1_freq ); |
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840 UWORD16 rf_convert_l1freq_to_rffreq_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); |
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841 UWORD16 rf_convert_l1freq_to_arfcn_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); |
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842 UWORD16 rf_convert_rffreq_to_l1freq(UWORD16 rf_freq); |
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843 UWORD16 rf_convert_rffreq_to_l1freq_rfband(UWORD16 rf_freq, WORD8 *rf_band_index); |
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844 UWORD16 rf_convert_tmarfcn_to_l1freq(UWORD16 tm_arfcn, WORD8 * error_flag); |
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845 #endif |
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846 |
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847 /* RF defines */ |
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848 /******************************Physical_band_ids to be supported Definition****************************************/ |
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849 #define RGSM900_SUPPORTED 0 |
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850 #define PGSM900_SUPPORTED 0 |
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851 #define GSM750_SUPPORTED 0 |
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852 #define GSM710_SUPPORTED 0 |
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853 #define GSM480_SUPPORTED 0 |
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854 #define T_GSM380_SUPPORTED 0 |
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855 #define T_GSM410_SUPPORTED 0 |
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856 #define GSM450_SUPPORTED 0 |
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857 #define T_GSM900_SUPPORTED 0 |
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858 #if 0 |
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859 #if (RF_BAND_SYSTEM_INDEX == RF_DCS1800_850_DUALBAND) |
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860 #define GSM900_SUPPORTED 0 |
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861 #define GSM850_SUPPORTED 1 |
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862 #define PCS1900_SUPPORTED 0 |
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863 #define DCS1800_SUPPORTED 1 |
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864 #elif (RF_BAND_SYSTEM_INDEX == RF_PCS1900_900_DUALBAND) |
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865 #define GSM900_SUPPORTED 1 |
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866 #define GSM850_SUPPORTED 0 |
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867 #define PCS1900_SUPPORTED 1 |
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868 #define DCS1800_SUPPORTED 0 |
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869 #elif (RF_BAND_SYSTEM_INDEX == RF_US_DUALBAND) |
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870 #define GSM900_SUPPORTED 0 |
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871 #define GSM850_SUPPORTED 1 |
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872 #define PCS1900_SUPPORTED 1 |
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873 #define DCS1800_SUPPORTED 0 |
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874 #elif (RF_BAND_SYSTEM_INDEX == RF_US_TRIBAND) |
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875 #define GSM900_SUPPORTED 0 |
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876 #define GSM850_SUPPORTED 1 |
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877 #define PCS1900_SUPPORTED 1 |
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878 #define DCS1800_SUPPORTED 1 |
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879 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_DUALBAND) |
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880 #define GSM900_SUPPORTED 1 |
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881 #define GSM850_SUPPORTED 0 |
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882 #define PCS1900_SUPPORTED 0 |
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883 #define DCS1800_SUPPORTED 1 |
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884 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_TRIBAND) |
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885 #define GSM900_SUPPORTED 1 |
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886 #define GSM850_SUPPORTED 0 |
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887 #define PCS1900_SUPPORTED 1 |
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888 #define DCS1800_SUPPORTED 1 |
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889 #elif (RF_BAND_SYSTEM_INDEX == RF_QUADBAND) |
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890 #define GSM900_SUPPORTED 1 |
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891 #define GSM850_SUPPORTED 1 |
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892 #define PCS1900_SUPPORTED 1 |
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893 #define DCS1800_SUPPORTED 1 |
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894 #endif |
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895 #endif // if 0 TBD |
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896 #define GSM900_SUPPORTED 1 |
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897 #define GSM850_SUPPORTED 1 |
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898 #define PCS1900_SUPPORTED 1 |
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899 #define DCS1800_SUPPORTED 1 |
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900 |
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901 /* The physical RF bands are enumerated in order of increasing frequencies */ |
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902 /* The same order must be used in l1_rf61, l1_cust, and l1_const */ |
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903 enum |
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904 { |
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905 #if (GSM900_SUPPORTED == 1) |
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906 RF_GSM900, |
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907 #endif |
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908 #if (GSM850_SUPPORTED == 1) |
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909 RF_GSM850, |
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910 #endif |
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911 #if (DCS1800_SUPPORTED == 1) |
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912 RF_DCS1800, |
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913 #endif |
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914 #if (PCS1900_SUPPORTED == 1) |
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915 RF_PCS1900, |
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916 #endif |
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917 RF_NB_SUPPORTED_BANDS /* The number of supported physical bands */ |
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918 }; |
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919 |
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920 #if GSM900_SUPPORTED |
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921 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS + 1) |
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922 #else |
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923 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS) |
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924 #endif |
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925 |
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926 /***********************************Calculation of the number of carriers per Effective Band*********/ |
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927 #define NB_CHAN_900L 125 |
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928 #define NB_CHAN_900H 49 |
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929 #define NB_CHAN_850 124 |
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930 #define NB_CHAN_1800 374 |
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931 #define NB_CHAN_1900 299 |
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932 |
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933 /** |
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diff
changeset
|
934 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers |
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diff
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|
935 except for DCS1900 where the numbers start from 1024 onwards, i.e. ARFCN+512. |
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diff
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|
936 L1 cannot have holes in the numbering, so a different L1 internal one is needed to build arrays in L1. |
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diff
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|
937 This numbering is similar to ARFCN numbering, except the high part of GSM900 channel numbers |
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diff
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|
938 are mapped between low part of GSM900 numbers and the GSM850 numbers. |
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diff
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|
939 For any band configuration supported, this is a continuos number from |
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diff
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|
940 0 to NB_CARRIERS (The sum of number of carriers in all supported bands) |
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diff
changeset
|
941 **/ |
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diff
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|
942 /****** L1_NB_CARRIER is the total number of carriers supported based on band support *********/ |
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diff
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|
943 #define L1_FREQ_1ST_900L 0 |
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diff
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|
944 #define L1_FREQ_1ST_900H (L1_FREQ_1ST_900L + NB_CHAN_900L * GSM900_SUPPORTED) |
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diff
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|
945 #define L1_FREQ_1ST_850 (L1_FREQ_1ST_900H + NB_CHAN_900H * GSM900_SUPPORTED) |
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|
946 #define L1_FREQ_1ST_1800 (L1_FREQ_1ST_850 + NB_CHAN_850 * GSM850_SUPPORTED) |
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diff
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|
947 #define L1_FREQ_1ST_1900 (L1_FREQ_1ST_1800 + NB_CHAN_1800 * DCS1800_SUPPORTED) |
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diff
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|
948 #define NBMAX_CARRIER (L1_FREQ_1ST_1900 + NB_CHAN_1900 * PCS1900_SUPPORTED) |
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diff
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|
949 |
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diff
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|
950 #define ARFCN_1ST_900L 0 |
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diff
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|
951 #define ARFCN_1ST_900H 975 |
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diff
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|
952 #define ARFCN_1ST_850 128 |
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|
953 #define ARFCN_1ST_1800 512 |
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|
954 #define ARFCN_1ST_1900 512 |
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diff
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|
955 |
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diff
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|
956 #define RF_FREQ_1ST_900L ARFCN_1ST_900L |
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|
957 #define RF_FREQ_1ST_900H ARFCN_1ST_900H |
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|
958 #define RF_FREQ_1ST_850 ARFCN_1ST_850 |
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diff
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|
959 #define RF_FREQ_1ST_1800 ARFCN_1ST_1800 |
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|
960 #define RF_FREQ_1ST_1900 (ARFCN_1ST_1900 + 512) |
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|
961 |
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diff
changeset
|
962 |
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diff
changeset
|
963 typedef struct |
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|
964 { |
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|
965 UWORD16 first_rf_freq; |
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|
966 UWORD16 last_rf_freq; |
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|
967 UWORD16 first_l1_freq; |
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|
968 WORD16 l1freq2rffreq; |
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|
969 } |
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diff
changeset
|
970 T_MULTIBAND_CONVERT; |
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changeset
|
971 |
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diff
changeset
|
972 typedef struct |
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diff
changeset
|
973 { |
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|
974 UWORD8 power_class; |
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|
975 UWORD8 tx_turning_point; |
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|
976 UWORD8 max_txpwr; |
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|
977 UWORD8 gsm_band_identifier; |
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|
978 char* name; |
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changeset
|
979 } |
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diff
changeset
|
980 T_MULTIBAND_RF; |
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changeset
|
981 |
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528
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changeset
|
982 #endif /*if (L1_FF_MULTIBAND == 1)*/ |
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|
983 |
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changeset
|
984 |
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|
985 |
115
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diff
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|
986 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. |
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diff
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|
987 |
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diff
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|
988 |
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|
989 //-------------------------------------------------------- |
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|
990 // Receive level values. |
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diff
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|
991 //-------------------------------------------------------- |
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|
992 #define RXLEV63 63 // max value for RXLEV. |
1e41550feec5
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diff
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|
993 #define IL_MIN 240 // minimum input level is -120 dbm. |
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diff
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|
994 |
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diff
changeset
|
995 /*--------------------------------------------------------*/ |
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diff
changeset
|
996 /* Max value for GSM Paging Parameters. */ |
1e41550feec5
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parents:
diff
changeset
|
997 /*--------------------------------------------------------*/ |
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diff
changeset
|
998 #define MAX_AG_BLKS_RES_NCOMB 7 |
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|
999 #define MAX_AG_BLKS_RES_COMB 2 |
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diff
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|
1000 #define MAX_PG_BLOC_INDEX_NCOMB 8 |
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diff
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|
1001 #define MAX_PG_BLOC_INDEX_COMB 2 |
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|
1002 #define MAX_BS_PA_MFRMS 9 |
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|
1003 |
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diff
changeset
|
1004 /*--------------------------------------------------------*/ |
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diff
changeset
|
1005 /* Position of different blocs in a MF51. */ |
1e41550feec5
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changeset
|
1006 /*--------------------------------------------------------*/ |
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diff
changeset
|
1007 #define NBCCH_POSITION 2 // Normal BCCH position in a MF51. |
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diff
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|
1008 #define EBCCH_POSITION 6 // Extended BCCH position in a MF51. |
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|
1009 #define CCCH_0 6 |
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|
1010 #define CCCH_1 12 |
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|
1011 #define CCCH_2 16 |
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|
1012 #define CCCH_3 22 |
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|
1013 #define CCCH_4 26 |
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|
1014 #define CCCH_5 32 |
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|
1015 #define CCCH_6 36 |
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|
1016 #define CCCH_7 42 |
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|
1017 #define CCCH_8 46 |
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|
1018 #define FB_0 0 |
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|
1019 #define FB_1 10 |
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|
1020 #define FB_2 20 |
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|
1021 #define FB_3 30 |
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|
1022 #define FB_4 40 |
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|
1023 #define SB_0 1 |
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1024 #define SB_1 11 |
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|
1025 #define SB_2 21 |
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|
1026 #define SB_3 31 |
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|
1027 #define SB_4 41 |
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|
1028 |
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|
1029 /*--------------------------------------------------------*/ |
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|
1030 /* System information position in the "si_bit_map". */ |
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|
1031 /*--------------------------------------------------------*/ |
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|
1032 #define SI_1 0x0001 |
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|
1033 #define SI_2 0x0002 |
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|
1034 #define SI_2BIS 0x0100 |
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|
1035 #define SI_2TER 0x0200 |
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|
1036 #define SI_3 0x0004 |
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|
1037 #define SI_4 0x0008 |
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|
1038 #define SI_7 0x0040 |
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1039 #define SI_8 0x0080 |
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|
1040 #define ALL_SI SI_1 | SI_2 | SI_2BIS | SI_2TER | SI_3 | SI_4 | SI_7 | SI_8 |
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parents:
diff
changeset
|
1041 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1042 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1043 /* CBCH position in the "smscb_bit_map". */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1044 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1045 #define CBCH_TB1 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1046 #define CBCH_TB2 0x0002 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1047 #define CBCH_TB3 0x0004 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1048 #define CBCH_TB5 0x0008 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1049 #define CBCH_TB6 0x0010 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1050 #define CBCH_TB7 0x0020 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1051 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1052 #if FF_TBF |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1053 /*--------------------------------------------------------*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1054 /* Access burst types on the RACH/PRACH */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1055 /*--------------------------------------------------------*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1056 #define ACC_BURST_8 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1057 #define ACC_BURST_11 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1058 #define ACC_BURST_11_TS1 2 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1059 #define ACC_BURST_11_TS2 3 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1060 #endif |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1061 #define CBCH_CONTINUOUS_READING 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1062 #define CBCH_SCHEDULED 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1063 #define CBCH_INACTIVE 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1064 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1065 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1066 /* Channel type definitions for DEDICATED mode. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1067 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1068 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1069 //TABLE/ CHAN TYPE |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1070 #define INVALID_CHANNEL 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1071 #define TCH_F 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1072 #define TCH_H 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1073 #define SDCCH_4 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1074 #define SDCCH_8 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1075 //END_TABLE/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1076 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1077 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1078 /* Channel mode definitions for DEDICATED. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1079 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1080 #define SIG_ONLY_MODE 0 // signalling only |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1081 #define TCH_FS_MODE 1 // speech full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1082 #define TCH_HS_MODE 2 // speech half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1083 #define TCH_96_MODE 3 // data 9,6 kb/s |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1084 #define TCH_48F_MODE 4 // data 4,8 kb/s full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1085 #define TCH_48H_MODE 5 // data 4,8 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1086 #define TCH_24F_MODE 6 // data 2,4 kb/s full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1087 #define TCH_24H_MODE 7 // data 2,4 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1088 #define TCH_EFR_MODE 8 // enhanced full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1089 #define TCH_144_MODE 9 // data 14,4 kb/s half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1090 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1091 #define TCH_AHS_MODE 10 // adaptative speech half rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1092 #define TCH_AFS_MODE 11 // adaptative speech full rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1093 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1094 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1095 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1096 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1097 /* Layer 1 functional modes for "mode" setting pupose. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1098 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1099 #define CS_MODE0 0 // functional mode at reset. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1100 #define CS_MODE 1 // functional mode in CELL SELECTION. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1101 #define I_MODE 2 // functional mode in IDLE. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1102 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1103 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1104 #define DEDIC_MODE 5 // functional mode in DEDICATED. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1105 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1106 #if L1_GPRS |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1107 #define PACKET_TRANSFER_MODE 7 // |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1108 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1109 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1110 /*--------------------------------------------------------*/ |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1111 /* Error causes for MPHC_NO_BCCH message. */ |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1112 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1113 #define NO_FB_SB 0 // FB or SB not found. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1114 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1115 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1116 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1117 /* MFTAB constants and flags. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1118 /*--------------------------------------------------------*/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1119 #define L1_MAX_FCT 5 /* Max number of fctions in a frame */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1120 #define MFTAB_SIZE 20 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1121 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1122 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1123 /* Software register/flags */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1124 /* definitions. */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1125 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1126 #define NO_CTRL (TRUE_L << 0) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1127 #define CTRL_MS (TRUE_L << 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1128 #define CTRL_TX (TRUE_L << 2) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1129 #define CTRL_RX (TRUE_L << 3) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1130 #define CTRL_ADC (TRUE_L << 4) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1131 #define CTRL_SYNC (TRUE_L << 5) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1132 #define CTRL_ABORT (TRUE_L << 6) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1133 #define CTRL_TEST (TRUE_L << 7) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1134 #define CTRL_SYCB (TRUE_L << 8) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1135 #define CTRL_FB_ABORT (TRUE_L << 9) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1136 #if L1_GPRS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1137 #define CTRL_PRACH (TRUE_L << 10) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1138 #define CTRL_SYSINGLE (TRUE_L << 11) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1139 #endif |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1140 #if ((REL99 == 1) && (FF_BHO == 1)) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1141 #define CTRL_FBSB_ABORT (TRUE_L << 12) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1142 #endif |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1143 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1144 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1145 /* MISC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1146 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1147 #define GSM_CTL 0 // DSP ctrl for a GSM task |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1148 #define MISC_CTL 1 // DSP ctrl for a MISC task |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1149 #define GSM_MISC_CTL 2 // DSP ctrl for a GSM and MISC tasks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1150 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1151 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1152 /* TOA management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1153 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1154 #define ISH_INVALID 128 // value used to disable the toa offset |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1155 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1156 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1157 /* AGC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1158 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1159 #define DPAGC_FIFO_LEN 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1160 #define DPAGC_MAX_FLAG 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1161 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1162 #define DPAGC_AMR_FIFO_LEN 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1163 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1164 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1165 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1166 /* ADC management */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1167 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1168 #define ADC_DISABLED 0x0000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1169 // Traffic part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1170 #define ADC_MASK_RESET_TRAFFIC 0xFF00 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1171 #define ADC_NEXT_TRAFFIC_UL 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1172 #define ADC_EACH_TRAFFIC_UL 0x0002 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1173 #define ADC_NEXT_TRAFFIC_DL 0x0004 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1174 #define ADC_EACH_TRAFFIC_DL 0x0008 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1175 #define ADC_EACH_RACH 0x0010 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1176 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1177 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1178 // Idle part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1179 #define ADC_MASK_RESET_IDLE 0x00FF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1180 #define ADC_NEXT_NORM_PAGING 0x0100 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1181 #define ADC_EACH_NORM_PAGING 0x0200 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1182 #define ADC_NEXT_MEAS_SESSION 0x0400 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1183 #define ADC_EACH_MEAS_SESSION 0x0800 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1184 #define ADC_NEXT_NORM_PAGING_REORG 0x1000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1185 #define ADC_EACH_NORM_PAGING_REORG 0x2000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1186 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1187 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1188 // CS_MODE0 part |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1189 #define ADC_NEXT_CS_MODE0 0x4000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1190 #define ADC_EACH_CS_MODE0 0x8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1191 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1192 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1193 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1194 /* Neighbor BCCH priorities */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1195 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1196 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1197 #define TOP_PRIORITY 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1198 #define HIGH_PRIORITY 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1199 #define NORMAL_PRIORITY 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1200 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1201 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1202 /* Driver constants definitions */ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1203 /********************************/ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1204 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1205 // Used to identify the 1st and last burst for offset management in Drivers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1206 #define BURST_1 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1207 #define BURST_2 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1208 #define BURST_3 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1209 #define BURST_4 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1210 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1211 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1212 // Identifier for all DSP tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1213 // ...RX & TX tasks identifiers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1214 #define NO_DSP_TASK 0 // No task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1215 #define NP_DSP_TASK 21 // Normal Paging reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1216 #define EP_DSP_TASK 22 // Extended Paging reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1217 #define NBS_DSP_TASK 19 // Normal BCCH serving reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1218 #define EBS_DSP_TASK 20 // Extended BCCH serving reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1219 #define NBN_DSP_TASK 17 // Normal BCCH neighbour reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1220 #define EBN_DSP_TASK 18 // Extended BCCH neighbour reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1221 #define ALLC_DSP_TASK 24 // CCCH reading task while performing FULL BCCH/CCCH reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1222 #define CB_DSP_TASK 25 // CBCH reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1223 #define DDL_DSP_TASK 26 // SDCCH/D (data) reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1224 #define ADL_DSP_TASK 27 // SDCCH/A (SACCH) reading task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1225 #define DUL_DSP_TASK 12 // SDCCH/D (data) transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1226 #define AUL_DSP_TASK 11 // SDCCH/A (SACCH) transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1227 #define RACH_DSP_TASK 10 // RACH transmit task. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1228 #define TCHT_DSP_TASK 13 // TCH Traffic data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1229 #define TCHA_DSP_TASK 14 // TCH SACCH data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1230 #define TCHD_DSP_TASK 28 // TCH Traffic data DSP task id (RX or TX) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1231 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1232 #define TCH_DTX_UL 15 // Replace UL task in DSP->MCU com. to say "burst not transmitted". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1233 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1234 #if (L1_GPRS) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1235 // Identifier for DSP tasks Packet dedicated. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1236 // ...RX & TX tasks identifiers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1237 //------------------------------------------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1238 // WARNING ... Need to aligned following macro with MCU/DSP GPRS Interface |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1239 //------------------------------------------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1240 #define PNP_DSP_TASK 30 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1241 #define PEP_DSP_TASK 31 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1242 #define PALLC_DSP_TASK 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1243 #define PBS_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1244 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1245 #define PTCCH_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1246 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1247 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1248 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1249 // Identifier for measurement, FB / SB search tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1250 // Values 1,2,3 reserved for "number of measurements". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1251 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1252 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1253 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1254 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1255 #if ((REL99 == 1) && (FF_BHO == 1)) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1256 #define FBSB_DSP_TASK 16 // Freq.+Sync. Burst reading task in Blind Handover. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1257 #endif |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1258 #define IDLE1 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1259 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1260 // Debug tasks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1261 #define CHECKSUM_DSP_TASK 33 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1262 #define TST_NDB 35 // Checksum DSP->MCU |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1263 #define TST_DB 36 // DB communication check |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1264 #define INIT_VEGA 37 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1265 #define DSP_LOOP_C 38 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1266 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1267 // Identifier for measurement, FB / SB search tasks. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1268 // Values 1,2,3 reserved for "number of measurements". |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1269 #define TCH_LOOP_A 31 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1270 #define TCH_LOOP_B 32 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1271 |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1272 #if (DSP >= 33) |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1273 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1274 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1275 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1276 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1277 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1278 // bits in d_gsm_bgd_mgt - background task management |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1279 #define B_DSPBGD_RECO 1 // start of reco in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1280 #define B_DSPBGD_UPD 2 // start of alignement update in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1281 #define B_DSPBGD_STOP_RECO 256 // stop of reco in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1282 #define B_DSPBGD_STOP_UPD 512 // stop of alignement update in dsp background |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1283 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1284 // bit in d_pll_config |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1285 #define B_32KHZ_CALIB (TRUE_L << 14) // force DSP in Idle1 during 32 khz calibration |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1286 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1287 // NDB AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1288 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1289 // bits in d_tch_mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1290 #define B_EOTD (TRUE_L << 0) // EOTD mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1291 #define B_PLAY_UL (TRUE_L << 3) // Play UL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1292 #define B_DCO_ON (TRUE_L << 4) // DCO ON/OFF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1293 #define B_AUDIO_ASYNC (TRUE_L << 1) // WCP reserved |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1294 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1295 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1296 // PARAMETER AREA (PARAM) MCU<->DSP COMMUNICATION DEFINITIONS |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1297 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1298 #define C_POND_RED 1L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1299 // below values are defined in the file l1_time.h |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1300 //#define D_NSUBB_IDLE 296L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1301 //#define D_NSUBB_DEDIC 30L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1302 #define D_FB_THR_DET_IACQ 0x3333L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1303 #define D_FB_THR_DET_TRACK 0x28f6L |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1304 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1305 #if (RF_FAM == 60) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1306 // UPPCosto without dc offset compensation (DSP algo) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1307 #define D_DC_OFF_THRES 0x0000L |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1308 #else |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1309 #define D_DC_OFF_THRES 0x7fffL |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1310 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1311 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1312 #define D_DUMMY_THRES 17408L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1313 #define D_DEM_POND_GEWL 26624L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1314 #define D_DEM_POND_RED 20152L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1315 #define D_HOLE 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1316 #define D_TRANSFER_RATE 0x6666L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1317 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1318 // Full Rate vocoder definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1319 #define D_MACCTHRESH1 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1320 #define D_MLDT -4L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1321 #define D_MACCTHRESH 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1322 #define D_GU 5772L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1323 #define D_GO 7872L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1324 #define D_ATTMAX 53L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1325 #define D_SM -892L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1326 #define D_B 208L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1327 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1328 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1329 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1330 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1331 |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1332 #if (DSP >= 33) |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1333 // Frequency burst definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1334 #define D_FB_MARGIN_BEG 24 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1335 #define D_FB_MARGIN_END 22 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1336 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1337 // V42bis definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1338 #define D_V42B_SWITCH_HYST 16L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1339 #define D_V42B_SWITCH_MIN 64L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1340 #define D_V42B_SWITCH_MAX 250L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1341 #define D_V42B_RESET_DELAY 10L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1342 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1343 // Latencies definitions |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1344 #if (DSP >= 33) |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1345 // C.f. BUG1404 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1346 #define D_LAT_MCU_BRIDGE 0x000FL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1347 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1348 #define D_LAT_MCU_BRIDGE 0x0009L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1349 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1350 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1351 #define D_LAT_MCU_HOM2SAM 0x000CL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1352 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1353 #define D_LAT_MCU_BEF_FAST_ACCESS 0x0005L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1354 #define D_LAT_DSP_AFTER_SAM 0x0004L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1355 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1356 // Background Task in GSM mode: Initialization. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1357 #define D_GSM_BGD_MGT 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1358 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1359 #if (CHIPSET == 4) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1360 #define D_MISC_CONFIG 0L |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1361 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1362 // This variable is basically used for Samson. If SAMSON should be zero. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1363 // A variable for making DSP not go to IDLE3 when DMA is on |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1364 #define D_MISC_CONFIG 1L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1365 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1366 #define D_MISC_CONFIG 0L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1367 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1368 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1369 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1370 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1371 // Hall Rate vocoder and ched definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1372 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1373 #define D_SD_MIN_THR_TCHHS 37L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1374 #define D_MA_MIN_THR_TCHHS 344L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1375 #define D_MD_MAX_THR_TCHHS 2175L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1376 #define D_MD1_MAX_THR_TCHHS 138L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1377 #define D_SD_AV_THR_TCHHS 1845L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1378 #define D_WED_FIL_TC 0x7c00L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1379 #define D_WED_FIL_INI 4650L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1380 #define D_X_MIN 15L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1381 #define D_X_MAX 23L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1382 #define D_Y_MIN 703L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1383 #define D_Y_MAX 2460L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1384 #define D_SLOPE 135L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1385 #define D_WED_DIFF_THRESHOLD 406L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1386 #define D_MABFI_MIN_THR_TCHHS 5320L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1387 #define D_LDT_HR -5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1388 #define D_MACCTRESH_HR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1389 #define D_MACCTRESH1_HR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1390 #define D_GU_HR 2620 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1391 #define D_GO_HR 3700 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1392 #define D_B_HR 182 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1393 #define D_SM_HR -1608 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1394 #define D_ATTMAX_HR 53 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1395 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1396 // Enhanced Full Rate vocoder and ched definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1397 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1398 #define C_MLDT_EFR -4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1399 #define C_MACCTHRESH_EFR 8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1400 #define C_MACCTHRESH1_EFR 8000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1401 #define C_GU_EFR 4522 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1402 #define C_GO_EFR 6500 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1403 #define C_B_EFR 174 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1404 #define C_SM_EFR -878 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1405 #define C_ATTMAX_EFR 53 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1406 #define D_SD_MIN_THR_TCHEFS 15L //(24L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1407 #define D_MA_MIN_THR_TCHEFS 738L //(1200L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1408 #define D_MD_MAX_THR_TCHEFS 1230L //(2000L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1409 #define D_MD1_MAX_THR_TCHEFS 99L //(160L *C_POND_RED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1410 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1411 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1412 // Integrated Data Services definitions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1413 #define D_MAX_OVSPD_UL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1414 // Detect frames containing 90% of 1s as synchro frames |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1415 #define D_SYNC_THRES 0x3f50 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1416 // IDLE frames are only frames with 100 % of 1s |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1417 #define D_IDLE_THRES 0x4000 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1418 #define D_M1_THRES 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1419 #define D_MAX_OVSP_DL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1420 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1421 // d_ra_act: bit field definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1422 #define B_F48BLK 5 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1423 #if REL99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1424 #if FF_EMR |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1425 #define B_F48BLK_DL 6 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1426 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1427 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1428 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1429 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1430 // Mask for b_itc information (d_ra_conf) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1431 #define CE_MASK 0x04 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1432 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1433 #define D_FACCH_THR 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1434 #define D_DSP_TEST 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1435 #define D_VERSION_NUMBER 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1436 #define D_TI_VERSION 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1437 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1438 |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1439 /*----------------------------------------------------------------------------*/ |
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1440 /* */ |
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1441 /* DEFINITIONS FOR DSP <-> MCU COMMUNICATION. */ |
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1442 /* ++++++++++++++++++++++++++++++++++++++++++ */ |
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1443 /* */ |
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1444 /*----------------------------------------------------------------------------*/ |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1445 // COMMUNICATION Interrupt definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1446 //------------------------------------ |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1447 #define ALL_16BIT 0xffffL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1448 #define B_GSM_PAGE (TRUE_L << 0) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1449 #define B_GSM_TASK (TRUE_L << 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1450 #define B_MISC_PAGE (TRUE_L << 2) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1451 #define B_MISC_TASK (TRUE_L << 3) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1452 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1453 #define B_GSM_PAGE_MASK (ALL_16BIT ^ B_GSM_PAGE) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1454 #define B_GSM_TASK_MASK (ALL_16BIT ^ B_GSM_TASK) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1455 #define B_MISC_PAGE_MASK (ALL_16BIT ^ B_MISC_PAGE) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1456 #define B_MISC_TASK_MASK (ALL_16BIT ^ B_MISC_TASK) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1457 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1458 // Common definition |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1459 //---------------------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1460 // Index to *_DEMOD* arrays. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1461 #define D_TOA 0 // Time Of Arrival. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1462 #define D_PM 1 // Power Measurement. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1463 #define D_ANGLE 2 // Angle (AFC correction) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1464 #define D_SNR 3 // Signal / Noise Ratio. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1465 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1466 #if REL99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1467 #if FF_EMR |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1468 #define D_CV_BEP 2 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1469 #define D_MEAN_BEP_MSW 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1470 #define D_MEAN_BEP_LSW 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1471 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1472 #endif //L1_R99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1473 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1474 // Bit name/position definitions. |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1475 #define B_JOINT 4 // Chase combining flag |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1476 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1477 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1478 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1479 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1480 #define B_AF 14 // Activity bit: 1 if data block is valid. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1481 #define B_BFI 2 // Bad Frame Indicator |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1482 #define B_UFI 0 // UNRELIABLE FRAME Indicator |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1483 #define B_ECRC 9 // Enhanced full rate CRC bit |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1484 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1485 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1486 #if REL99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1487 #if FF_EMR |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1488 #define MEAN_BEP_FORMAT 5 // mean_bep is received in F1.31 format from DSP and should be |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1489 // reported in F6.26 format to L2. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1490 #define CV_BEP_FORMAT 5 // cv_bep is received in F3.13 format from DSP and should be |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1491 // reported in F8.8 format to L2. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1492 #define B_SID1 4 // SID1 bit. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1493 #define B_M1 0 // M1 bit. |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1494 #define B_CE 8 // Connection element |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1495 #define B_FCS_OK 3 // Frame check sequence bit |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1496 #define WORD_SHIFT 16 // Shift word |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1497 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1498 #endif //L1_R99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1499 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1500 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1501 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1502 #define FACCH_GOOD 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1503 #define FACCH_BAD 11 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1504 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1505 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1506 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1507 // Place of the RX type in the AMR block header |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1508 #define RX_TYPE_SHIFT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1509 #define RX_TYPE_MASK 0x0038 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1510 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1511 // Place of the vocoder type in the AMR block header |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1512 #define VOCODER_TYPE_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1513 #define VOCODER_TYPE_MASK 0x0007 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1514 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1515 // List of the possible RX types in a_dd block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1516 #define SPEECH_GOOD 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1517 #define SPEECH_DEGRADED 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1518 #define ONSET 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1519 #define SPEECH_BAD 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1520 #define SID_FIRST 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1521 #define SID_UPDATE 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1522 #define SID_BAD 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1523 #define AMR_NO_DATA 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1524 #define AMR_INHIBIT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1525 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1526 // List of possible RX types in RATSCCH block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1527 #define C_RATSCCH_GOOD 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1528 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1529 #if REL99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1530 #if FF_EMR |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1531 #define RATSCCH_GOOD 5 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1532 #define RATSCCH_BAD 6 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1533 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1534 #endif //L1_R99 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1535 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1536 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1537 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1538 // List of the possible AMR channel rate |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1539 #define AMR_CHANNEL_4_75 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1540 #define AMR_CHANNEL_5_15 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1541 #define AMR_CHANNEL_5_9 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1542 #define AMR_CHANNEL_6_7 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1543 #define AMR_CHANNEL_7_4 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1544 #define AMR_CHANNEL_7_95 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1545 #define AMR_CHANNEL_10_2 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1546 #define AMR_CHANNEL_12_2 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1547 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1548 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1549 // Types of RATSCCH blocks |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1550 #define C_RATSCCH_UNKNOWN 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1551 #define C_RATSCCH_CMI_PHASE_REQ 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1552 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1553 #define C_RATSCCH_AMR_CONFIG_REQ_ALT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1554 #define C_RATSCCH_AMR_CONFIG_REQ_ALT_IGNORE 4 // Alternative AMR_CONFIG_REQ with updates coming in the next THRES_REQ block |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1555 #define C_RATSCCH_THRES_REQ 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1556 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1557 // These flags define a bitmap that indicates which AMR parameters are being modified by a RATSCCH |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1558 #define C_AMR_CHANGE_CMIP 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1559 #define C_AMR_CHANGE_ACS 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1560 #define C_AMR_CHANGE_ICM 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1561 #define C_AMR_CHANGE_THR1 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1562 #define C_AMR_CHANGE_THR2 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1563 #define C_AMR_CHANGE_THR3 5 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1564 #define C_AMR_CHANGE_HYST1 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1565 #define C_AMR_CHANGE_HYST2 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1566 #define C_AMR_CHANGE_HYST3 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1567 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1568 // CMIP default value |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1569 #define C_AMR_CMIP_DEFAULT 1 // According to ETSI specification 05.09, cmip is always 1 by default (new channel, handover...) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1570 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1571 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1572 // "d_ctrl_tch" bits positions for TCH configuration. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1573 #define B_CHAN_MODE 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1574 #define B_CHAN_TYPE 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1575 #define B_RESET_SACCH 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1576 #define B_VOCODER_ON 7 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1577 #define B_SYNC_TCH_UL 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1578 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1579 #define B_SYNC_AMR 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1580 #else |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1581 #define B_SYNC_TCH_DL 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1582 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1583 #define B_STOP_TCH_UL 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1584 #define B_STOP_TCH_DL 11 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1585 #define B_TCH_LOOP 12 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1586 #define B_SUBCHANNEL 15 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1587 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1588 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1589 #define B_RAMP 0 |
531
de635895e0be
gsm-fw/L1/include/*.h: s/ANLG_FAM/ANALOG/ in LoCosto-based version
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
530
diff
changeset
|
1590 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1591 #define B_BULRAMPDEL 3 // Note: this name is changed |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1592 #define B_BULRAMPDEL2 2 // Note: this name is changed |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1593 #define B_BULRAMPDEL_BIS 9 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1594 #define B_BULRAMPDEL2_BIS 10 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1595 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1596 #if ((RF_FAM == 61) && ((DSP == 38) || (DSP == 39))) |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1597 #define B_BULRAMPDEL 3 // Note: this name is changed |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1598 #define B_BULRAMPDEL2 2 // Note: this name is changed |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1599 #define B_BULRAMPDEL_BIS 9 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1600 #define B_BULRAMPDEL2_BIS 10 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1601 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1602 #define B_AFC 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1603 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1604 // "d_ctrl_system" bits positions. |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1605 #define B_TSQ 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1606 #define B_BCCH_FREQ_IND 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1607 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1608 #define B_SWH_APPLY_WHITENING 4 // SWH control(enable, disable) |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1609 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1610 #if (NEW_SNR_THRESHOLD == 1) && (L1_SAIC == 0) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1611 #error "SNR threshold valid only for SAIC build" |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1612 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1613 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1614 //SAIC related |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1615 #define B_SWH 1 /* SWH bit position */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1616 #define B_NEW_POND 2 /* NEW_POND bit position*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1617 #define B_SWH_DOUBLE_INTERPOLATION 3 /* Single or Double Interpolation*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1618 #define B_SWH_INTERPOLATE 4 /* interpolate or not*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1619 #define B_TOA_ALMNT 5 /* New TOA alignment from DSP for non saic mode*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1620 #define B_SNR_ALMNT 6 /* New SNR threshold set to 1024 for AFC and TOA*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1621 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1622 // DB Area |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1623 #define B_SAIC_DB 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1624 #define B_NEW_POND_DB 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1625 #define B_SWH_DB 4 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1626 #define B_SWH_CHANTAP 12 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1627 #define SAIC_ENABLE_DB ((0x01 << B_SAIC_DB) | (0x01 << B_NEW_POND_DB)) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1628 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1629 #if (NEW_SNR_THRESHOLD == 1) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1630 #if (ONE_THIRD_INTRPOL ==1 ) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1631 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1632 #else /* ONE_THIRD_INTRPOL == 0*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1633 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1634 #endif /* ONE_THIRD_INTRPOL*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1635 #else /* NEW_SNR_THRESHOLD == 0 */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1636 #if (ONE_THIRD_INTRPOL ==1 ) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1637 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) /* added for CQ-95275 & 93303 */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1638 #else |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1639 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)) | (1 << B_SWH_INTERPOLATE) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1640 #endif//ONE_THIRD_INTRPOL |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1641 #endif /*NEW_SNR_THRESHOLD*/ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1642 #if (FF_L1_FAST_DECODING == 1) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1643 #define B_FAST_DECODING_FLAG (5) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1644 #define C_FAST_DECODING_CRC_FIRE1 (0x02) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1645 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1646 /* Fast decoding states */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1647 #define C_FAST_DECODING_NONE 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1648 #define C_FAST_DECODING_AWAITED 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1649 #define C_FAST_DECODING_PROCESSING 2 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1650 #define C_FAST_DECODING_COMPLETE 3 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1651 #define C_FAST_DECODING_FORBIDDEN 4 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1652 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1653 #endif /* FF_L1_FAST_DECODING */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1654 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1655 #if (FF_L1_FAST_DECODING == 1) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1656 #define C_BA_PM_MEAS (4) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1657 #else |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1658 #define C_BA_PM_MEAS (2) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1659 #endif /* FF_L1_FAST_DECODING */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1660 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1661 #if FF_L1_IT_DSP_USF |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1662 // d_dsp_hint_flag word definition |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1663 #define B_USF_HINT_ISSUED 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1664 #define B_NON_USF_HINT_ISSUED 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1665 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1666 #if FF_L1_IT_DSP_DTX |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1667 // d_fast_dtx_hint word definition- now d_fast_dtx_hint is not used- same as- d_dsp_hint_flag |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1668 #define B_DTX_HINT_ISSUED 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1669 #define B_DTX_STATE 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1670 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1671 // d_tch_mode_ext word definition |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1672 #define B_FAST_DTX_ENABLED 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1673 #define B_NON_USF_HINT_ISSUED 1 |
25a7fe25864c
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
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|
1674 #endif |
115
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1675 // **************************************************************** |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1676 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1677 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1678 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1679 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1680 // DSP ADRESSES |
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1681 //-------------------- |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1682 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1683 #define DB_SIZE (4*20L) // 4 pages of 20 words... |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1684 |
533
bc3656cfe0d8
gsm-fw/L1/include: l1_const.h reconciled
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
531
diff
changeset
|
1685 #if (DSP >= 33) |
530
25a7fe25864c
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1686 #define MCU_API_BASE_ADDRESS 0xFFD00000L |
25a7fe25864c
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1687 #define DSP_API_BASE_ADDRESS 0x800 |
115
1e41550feec5
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Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1688 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1689 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1690 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1691 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1692 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1693 #define PARAM_ADR 0xFFD00862L // PARAM start address : 57 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1694 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1695 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1696 #define DB2_R_PAGE_0 0xFFD00184L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1697 #define DB2_R_PAGE_1 0xFFD00188L |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1698 #endif |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
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parents:
528
diff
changeset
|
1699 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1700 /* DSP CPU load measurement */ |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1701 #define DSP_CPU_LOAD_MCU_API_BASE_ADDRESS 0xFFD01DE0L |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1702 #define DSP_CPU_LOAD_DB_W_PAGE_0 0xFFD01DE0L // DB page 0 write : 4 words long |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1703 #define DSP_CPU_LOAD_DB_W_PAGE_1 0xFFD01DE8L // DB page 1 write : 4 words long |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1704 #define DSP_CPU_LOAD_MCU_W_CTRL 0xFFD01DF0L // DSP CPU load feature control |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1705 #define DSP_CPU_LOAD_MCU_W_TDMA_FN 0xFFD01DF2L // MCU TDMA frame number |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1706 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1707 #else |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1708 #define MCU_API_BASE_ADDRESS 0xFFD00000L |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1709 #define DSP_API_BASE_ADDRESS 0x800 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1710 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1711 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1712 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1713 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1714 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1715 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1716 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1717 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1718 #if (DSP == 38) || (DSP == 39) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1719 // a DB common is used by the GSM and GPRS for the common feature |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1720 #define DB_COMMON_W_PAGE_0 0xFFD00760L // DB common page 0 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1721 #define DB_COMMON_W_PAGE_1 0xFFD00780L // DB common page 1 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1722 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1723 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1724 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1725 // ADC reading definitions |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1726 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1727 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1728 #define ADC_READ_PERIOD (40) //30 * 4.615 = 140ms |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1729 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1730 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1731 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1732 // AGC: IL table identifier used by function Cust_get_agc_from_IL |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1733 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1734 #define MAX_ID 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1735 #define AV_ID 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1736 #define PWR_ID 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1737 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1738 #if TESTMODE |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1739 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1740 // Testmode: State of the continous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1741 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1742 #define TM_NO_CONTINUOUS 1 // continuous mode isn't active |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1743 #define TM_START_RX_CONTINUOUS 2 // start the Rx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1744 #define TM_START_TX_CONTINUOUS 3 // start the Tx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1745 #define TM_CONTINUOUS 4 // Rx or Tx continuous mode |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1746 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1747 #if (AMR == 1) |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1748 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1749 // AMR: Position of each AMR parameters in the AMR API buffer |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1750 // **************************************************************** |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1751 #define NSCB_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1752 #define NSCB_SHIFT 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1753 #define ICMUL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1754 #define ICMUL_SHIFT 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1755 #define ICMDL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1756 #define ICMDL_SHIFT 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1757 #define ICMIUL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1758 #define ICMIUL_SHIFT 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1759 #define ICMIDL_INDEX 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1760 #define ICMIDL_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1761 #define ACSUL_INDEX 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1762 #define ACSUL_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1763 #define ACSDL_INDEX 1 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1764 #define ACSDL_SHIFT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1765 #define THR1_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1766 #define THR1_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1767 #define THR2_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1768 #define THR2_SHIFT 6 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1769 #define THR3_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1770 #define THR3_SHIFT 8 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1771 #define HYST1_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1772 #define HYST1_SHIFT 0 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1773 #define HYST2_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1774 #define HYST2_SHIFT 4 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1775 #define HYST3_INDEX 2 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1776 #define HYST3_SHIFT 12 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1777 #define NSYNC_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1778 #define NSYNC_SHIFT 14 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1779 #define CMIP_INDEX 3 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1780 #define CMIP_SHIFT 15 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1781 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1782 #define NSCB_MASK 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1783 #define ICM_MASK 0x0003 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1784 #define ICMI_MASK 0x0001 |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1785 #define ACS_MASK 0x00FF |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1786 #define THR_MASK 0x003F |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1787 #define HYST_MASK 0x000F |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1788 #define CMIP_MASK 0x0001 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1789 |
115
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1790 #endif |
1e41550feec5
nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff
changeset
|
1791 |
530
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1792 #if (L1_RF_KBD_FIX == 1) |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1793 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1794 #define FRAME_DURATION 5000 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1795 #define CUST_DEBOUNCE_TIME 64 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1796 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1797 #endif |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1798 |
25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
528
diff
changeset
|
1799 #endif // L1_CONST_H |