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annotate gsm-fw/L1/tpudrv/tpudrv.c @ 979:ebdf5afa9fb5

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fc-tmsh: omr responses parsed and formatted in a readable manner
author Mychaela Falconia <falcon@ivan.Harhan.ORG>
date Thu, 10 Dec 2015 04:28:19 +0000
parents d70ebaea3003
children
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660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 *
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4 * Filename tpudrv.c
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5 * Copyright 2003 (C) Texas Instruments
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6 *
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7 ************* Revision Controle System Header *************/
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8 /*
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9 * TPUDRV.C
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10 *
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11 * TPU driver for Pole Star
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12 *
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13 *
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14 * Copyright (c) Texas Instruments 1996
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15 *
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16 */
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17
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18 #include "config.h"
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19 #include "l1_confg.h"
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20 #include "l1_macro.h"
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21 #include "../../bsp/iq.h"
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22 #include "l1_const.h"
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23 #include "l1_types.h"
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25 #if (AUDIO_TASK == 1)
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26 #include "l1audio_const.h"
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27 #include "l1audio_cust.h"
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28 #include "l1audio_defty.h"
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29 #endif
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31 #if (L1_GTT == 1)
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32 #include "l1gtt_const.h"
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33 #include "l1gtt_defty.h"
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34 #endif
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36 #if (L1_MIDI == 1)
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37 #include "l1midi_defty.h"
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38 #endif
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40 #include "sys_types.h"
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42 #if TESTMODE
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43 #include "l1tm_defty.h"
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44 #endif
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46 #if (L1_MP3 == 1)
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47 #include "l1mp3_defty.h"
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48 #endif
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50 #if (L1_MIDI == 1)
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51 #include "l1midi_defty.h"
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52 #endif
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53
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54 #if (L1_AAC == 1)
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55 #include "l1aac_defty.h"
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56 #endif
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57 #include "l1_defty.h"
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58 #include "tpudrv.h"
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59 #include "sys_types.h"
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60 #include "../../bsp/clkm.h"
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61 #include "l1_time.h"
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62 #include "l1_varex.h"
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63 #include "l1_trace.h"
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64
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65 #if (L1_MADC_ON == 1)
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66 #if (RF_FAM == 61)
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67 #include "drp_api.h"
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68 #include "l1_rf61.h"
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69 #include "drp_drive.h"
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70 #include "tpudrv61.h"
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71 extern T_DRP_REGS_STR *drp_regs;
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72 #endif
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73 #endif //L1_MADC_ON
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74
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75 /* RFTime environment */
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76 #if defined (HOST_TEST)
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77 #include "hostmacros.h"
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78 #endif
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79
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80
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81 /*
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82 * VEGA and OMEGA receive windows - Defined in Customer-specific file
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83 */
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84
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85 extern UWORD32 debug_tpu;
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86
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87 #if ( OP_WCP == 1 ) && ( OP_L1_STANDALONE != 1 )
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88 // WCS Patch : ADC during RX or TX
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89 extern inline void GC_SetAdcInfo(unsigned char bTxBasedAdc);
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90 #endif
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92 /*
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93 * Global Variables
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94 */
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95 // GSM1.5 : TPU MEMORY is 16-bit instead of 32 in Gemini/Polxx
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96 //------------------------------------------------------------
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97 SYS_UWORD16 *TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
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98
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diff changeset
100 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
101 /* TPU_Reset : Reset the TPU */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
102 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
103 /* Parameters : on/off(1/0) */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
104 /* Return : none */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
105 /* Functionality : ) Reset the TPU */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
106 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
107 void TPU_Reset(SYS_UWORD16 on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
108 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
109 if (on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
110 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
111 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= TPU_CTRL_RESET;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
112 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
113 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_RESET));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
114 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
115 else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
116 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
117 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~TPU_CTRL_RESET;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 while (((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_RESET));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 /* TSP_Reset : Reset the TSP */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 /* Parameters : on/off(1/0) */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 /* Return : none */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 /* Functionality : ) Reset the TSP */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 void TSP_Reset(SYS_UWORD16 on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 if (on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= TSP_CTRL_RESET;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & TSP_CTRL_RESET));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~TSP_CTRL_RESET;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142 while (((*(volatile SYS_UWORD16 *) TPU_CTRL) & TSP_CTRL_RESET));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147 /* TPU_SPIReset : Reset the SPI of the TPU */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 /* Parameters : on/off(1/0) */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 /* Return : none */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151 /* Functionality : ) the SPI of the TPU */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 void TPU_SPIReset(SYS_UWORD16 on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156 if (on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= TPU_CTRL_SPI_RST;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_SPI_RST));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~TPU_CTRL_SPI_RST;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 while (((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_SPI_RST));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 /* TPU_ClkEnable : */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 /* Parameters : on/off(1/0) */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 /* Return : none */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 /* Functionality : Enable the TPU clock */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 void TPU_ClkEnable(SYS_UWORD16 on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 if (on)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= TPU_CTRL_CLK_EN;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_CLK_EN));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
185 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
186 else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
187 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
188 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~TPU_CTRL_CLK_EN;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
189 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
190 while (((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_CLK_EN));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
191 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
192 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
193
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
194 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
195 /* TPU_Frame_ItOn : */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
196 /*--------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
197 /* Parameters : bit of it to enable */
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198 /* Return : none */
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199 /* Functionality : Enable frame it */
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200 /*--------------------------------------------------------------*/
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201
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202 /*-----------------------------------------------------------*/
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203 /* Warning read modify write access to TPU_INT_CTRL register */
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204 /* may generate problems using Hyperion. */
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205 /*-----------------------------------------------------------*/
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206
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207 void TPU_FrameItOn(SYS_UWORD16 it)
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208 {
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209 * ((volatile SYS_UWORD16 *) TPU_INT_CTRL) &= ~it;
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210 }
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211
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diff changeset
212 void TPU_FrameItEnable(void)
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213 {
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214 #if W_A_ITFORCE
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215 (*(volatile SYS_UWORD16 *)TPU_INT_CTRL) |= TPU_INT_ITD_F;
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216 #else
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217 // enable IT_DSP generation on next frame
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218 // reset by DSP when IT occurs
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219 (*(volatile SYS_UWORD16 *) TPU_CTRL) |= TPU_CTRL_D_ENBL;
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220 // WA for read/modify/write access problem with REG_TPU_CTRL present on Ulysse/Samson/Calypso
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diff changeset
221 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_D_ENBL));
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222 #endif
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223 }
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224
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diff changeset
225 /*--------------------------------------------------------------*/
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226 /* TPU_check_IT_DSP : */
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diff changeset
227 /*--------------------------------------------------------------*/
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228 /* Parameters : none */
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229 /* Return : none */
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230 /* Functionality : check if an IT DSP still pending */
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parents:
diff changeset
231 /*--------------------------------------------------------------*/
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diff changeset
232 BOOL TPU_check_IT_DSP(void)
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233 { // return TRUE if an IT DSP still pending.
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diff changeset
234 return( (((*(volatile SYS_UWORD16 *) TPU_CTRL) & TPU_CTRL_D_ENBL) == TPU_CTRL_D_ENBL));
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235 }
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236
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237 /*--------------------------------------------------------------*/
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238 /* TPU_DisableAllIt : */
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239 /*--------------------------------------------------------------*/
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240 /* Parameters : none */
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241 /* Return : none */
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242 /* Functionality : Disabl all it */
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diff changeset
243 /*--------------------------------------------------------------*/
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diff changeset
244 void TPU_DisableAllIt()
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245 {
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246 * ((volatile SYS_UWORD16 *) TPU_INT_CTRL) |= TPU_INT_ITF_M | TPU_INT_ITP_M | TPU_INT_ITD_M;
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247
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248 }
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249
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250
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251
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252
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253
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diff changeset
254 /*
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255 * TP_Program
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diff changeset
256 *
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257 * Write a null-terminated scenario into TPU memory at a given start address
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diff changeset
258 * (Do not write terminating 0)
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diff changeset
259 *
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parents:
diff changeset
260 */
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diff changeset
261 void *TP_Program(const SYS_UWORD16 *src)
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diff changeset
262 {
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diff changeset
263 /* Write TPU instructions until SLEEP */
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parents:
diff changeset
264 while (*src)
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265 {
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diff changeset
266 *TP_Ptr++ = *src++;
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diff changeset
267 }
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
268 #if 1 //(TOOL_CHOICE == 3) // 2.54 Migration
576
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diff changeset
269 return((void *)NULL);
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diff changeset
270 #endif // TOOL_CHOICE == 3
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diff changeset
271 // return((void *)NULL);//ompas00090550
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272
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273 }
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274
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275
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276
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diff changeset
277 void TP_Reset(SYS_UWORD16 on)
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diff changeset
278 {
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diff changeset
279 if (on) {
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diff changeset
280 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= (TPU_CTRL_RESET | TSP_CTRL_RESET);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
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diff changeset
281 while (!((*(volatile SYS_UWORD16 *) TPU_CTRL) & (TPU_CTRL_RESET | TSP_CTRL_RESET)));
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282 }
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diff changeset
283 else {
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284 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~(TPU_CTRL_RESET | TSP_CTRL_RESET);
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parents:
diff changeset
285 while (((*(volatile SYS_UWORD16 *) TPU_CTRL) & (TPU_CTRL_RESET | TSP_CTRL_RESET)));
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286 }
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diff changeset
287 }
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288
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diff changeset
289 void TP_Enable(SYS_UWORD16 on)
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290 {
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diff changeset
291 if(on)
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292 {
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diff changeset
293 * ((volatile SYS_UWORD16 *) TPU_CTRL) |= TPU_CTRL_T_ENBL;
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294
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diff changeset
295 // Some time shall be wait before leaving the function to ensure that bit has been taken
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
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diff changeset
296 // in account by the TPU. A while loop such as in function TP_reset can't be used as the
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
297 // ARM can be interrupted within this loop and in that case the pulse will be missed (CQ20781).
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
298 // The bit is updated in the worst case 24 cycles of 13MHz later it as been written by the MCU.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
299 // 24 ticks of 13MHz = 1.84us. Lets take 3us to keep some margin.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
300 wait_ARM_cycles(convert_nanosec_to_cycles(3000)); // wait 3us
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
301 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
302 else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
303 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
304 * ((volatile SYS_UWORD16 *) TPU_CTRL) &= ~TPU_CTRL_T_ENBL;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
305 // Some time shall be wait before leaving the function to ensure that bit has been taken
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
306 // in account by the TPU. A while loop such as in function TP_reset can't be used as the
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
307 // ARM can be interrupted within this loop and in that case the pulse will be missed (CQ20781).
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
308 // The bit is updated in the worst case 24 cycles of 13MHz later it as been written by the MCU.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
309 // 24 ticks of 13MHz = 1.84us. Lets take 3us to keep some margin.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
310 wait_ARM_cycles(convert_nanosec_to_cycles(3000)); // wait 3us
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
311 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
312 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
313
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
314
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
315 /*-----------------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
316 /* Function name: TPU_wait_idle */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
317 /*-----------------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
318 /* */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
319 /* Parameters: None */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
320 /* */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
321 /* Return: None */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
322 /* */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
323 /*-----------------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
324 /* Description: Wait until TPU scenario execution is complete */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
325 /* */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
326 /*-----------------------------------------------------------------------*/
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
327 void TPU_wait_idle(void)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
328 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
329 while( ((*(volatile SYS_UWORD16 *) (TPU_CTRL)) & TPU_CTRL_TPU_IDLE) == TPU_CTRL_TPU_IDLE)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
330 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
331 wait_ARM_cycles(convert_nanosec_to_cycles(3000));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
332 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
333 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
334
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
335
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
336 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
337 * l1dmacro_idle
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
338 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
339 * Write SLEEP instruction, start TPU and reset pointer
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
340 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
341 void l1dmacro_idle (void)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
342 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
343 *TP_Ptr++ = TPU_SLEEP;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
344
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
345 /* start TPU */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
346 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
347 TP_Enable(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
348 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
349
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
350 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
351 * l1dmacro_offset
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
352 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
353 * Set OFFSET register
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
354 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
355 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
356 void l1dmacro_offset (UWORD32 offset_value, WORD32 relative_time)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
357 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
358 // WARNING: 'relative time' and 'offset_value' must always be comprised
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
359 // between 0 and TPU_CLOCK_RANGE !!!
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
360
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
361 if (relative_time != IMM) // IMM indicates to set directly without AT
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
362 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
363 *TP_Ptr++ = TPU_FAT(relative_time);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
364 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
365 *TP_Ptr++ = TPU_OFFSET(offset_value);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
366 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
367
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
368 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
369 * l1dmacro_synchro
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
370 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
371 * Set synchro register
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
372 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
373 void l1dmacro_synchro (UWORD32 when, UWORD32 value)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
374 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
375 // WARNING: 'when' must always be comprised between 0 and TPU_CLOCK_RANGE !!!
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
376 #if (TRACE_TYPE!=0) && (TRACE_TYPE!=5)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
377 trace_fct(CST_L1DMACRO_SYNCHRO, 1);//omaps00090550
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
378 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
379
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
380 if (value != IMM) // IMM indicates to set directly without AT
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
381 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
382 *TP_Ptr++ = TPU_FAT(when);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
383 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
384
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
385 *TP_Ptr++ = TPU_SYNC(value);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
386 l1s.tpu_offset_hw = value; // memorize the offset set into the TPU.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
387 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
388
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
389
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
390 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
391 * l1dmacro_adc_read
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
392 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
393 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
394 void l1dmacro_adc_read_rx(void)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
395 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
396
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
397 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
398 // TSP needs to be configured in order to send serially to Omega
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
399
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
400 // *TP_Ptr++ = TPU_MOVE (TSP_SPI_SET1, TSP_CLK_RISE); // Clock configuration
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
401 *TP_Ptr++ = TPU_WAIT (5);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
402 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
403 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1,STARTADC); // Load data to send
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
404 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Start serialization command and adc conversion
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
405 *TP_Ptr++ = TPU_WAIT (5);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
406 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1,0x00);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
407 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Reset startadc pulse
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
408
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
409 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
410 #if (GSM_IDLE_RAM == 0)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
411 l1_trace_ADC(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
412 #else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
413 l1_trace_ADC_intram(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
414 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
415 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
416 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
417
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
418 #if (L1_MADC_ON == 1)
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
419 #if (ANALOG == 11)
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
420
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
421 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
422 #if (GSM_IDLE_RAM == 0)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
423 l1_trace_ADC(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
424 #else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
425 l1_trace_ADC_intram(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
426 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
427 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
428 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
429
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
430 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
431 // WCS patch: ADC during RX
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
432 GC_SetAdcInfo(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
433 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
434 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
435 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
436
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
437
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
438 #if (CODE_VERSION != SIMULATION)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
439 #if (L1_MADC_ON ==1)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
440 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
441 * l1dmacro_adc_read_rx_cs_mode0
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
442 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
443 * Purpose:
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
444 * ======
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
445 * MADC is not enabled during CS_MODE0 periodically. MADC is enabled in CS_MODE0
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
446 * when Layer 1 receives MPHC_RXLEV_REQ from L23. However in CS_MODE0, MPHC_RXLEV_REQ
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
447 * is not received periodically. In case network is not found, the period between 2 MPHC_RXLEV_REQ
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
448 * increases and can be as high as 360 seconds (Maximum Value)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
449 * This can result in battery related issues like phone powering off without MMI indication.
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
450 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
451
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
452
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
453 void l1dmacro_adc_read_rx_cs_mode0(void)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
454 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
455 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,START_ADC);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
456 *TP_Ptr++ = TPU_WAIT (2);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
457 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
458
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
459 #if (L1_MADC_ON == 1)
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
460 #if (ANALOG == 11)
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
461
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
462 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
463 #if (GSM_IDLE_RAM == 0)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
464 l1_trace_ADC(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
465 #else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
466 l1_trace_ADC_intram(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
467 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
468 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
469 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
470
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
471 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
472 // WCS patch: ADC during RX
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
473 GC_SetAdcInfo(0);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
474 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
475 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
476 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
477
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
478
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
479 #endif //If MADC is enabled
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
480 #endif //If Not Simulation
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
481
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
482 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
483 * l1dmacro_adc_read_tx
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
484 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
485 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
486
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
487
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
488 #if (ANALOG != 11)
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
489 void l1dmacro_adc_read_tx(UWORD32 when)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
490 #else
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
491 void l1dmacro_adc_read_tx(UWORD32 when, UWORD8 tx_up_state)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
492 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
493 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
494
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
495 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3))
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
496
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
497 *TP_Ptr++ = TPU_FAT (when);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
498 *TP_Ptr++ = TPU_MOVE (TSP_CTRL1,6); // Device and Nb of bits configuration
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
499 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1, STARTADC|BULON|BULENA); // Load data to send
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
500 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Start serialization command and adc conversion
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
501 *TP_Ptr++ = TPU_WAIT (5);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
502 *TP_Ptr++ = TPU_MOVE (TSP_TX_REG_1, BULON|BULENA);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
503 *TP_Ptr++ = TPU_MOVE (TSP_CTRL2, TC2_WR); // Reset startadc pulse
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
504
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
505 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
506 l1_trace_ADC(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
507 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
508 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
509
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
510 #if (L1_MADC_ON == 1)
577
d70ebaea3003 L1: tpudrv.c compiles
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents: 576
diff changeset
511 #if (ANALOG == 11)
576
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
512 *TP_Ptr++ = TPU_FAT (when);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
513 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state | START_ADC);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
514 *TP_Ptr++ = TPU_WAIT (2);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
515 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
516
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
517 #if 1 // TEMP MEASUREMENT - uncomment and test after MADC
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
518 #if (RF_FAM == 61)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
519 *TP_Ptr++ = TPU_MOVE(OCP_DATA_MSB, ((START_SCRIPT(DRP_TEMP_CONV))>>8) & 0xFF); \
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
520 *TP_Ptr++ = TPU_MOVE(OCP_DATA_LSB, (START_SCRIPT(DRP_TEMP_CONV)) & 0xFF); \
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
521 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_MSB, (((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)>>8) & 0xFF)); \
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
522 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_LSB, ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)) & 0xFF); \
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
523 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_START, 0x01); \
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
524 //TEMP_MEAS: Call TEMP Conv Script in DRP
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
525 //MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_TEMP_CONV),(UWORD16)(&drp_regs->SCRIPT_STARTL));
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
526 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
527
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
528 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
529
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
530 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
531 l1_trace_ADC(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
532 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
533
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
534 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
535 #endif //L1_MADC_ON
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
536
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
537 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
538 // WCS patch: ADC during TX
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
539 GC_SetAdcInfo(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
540 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
541
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
542
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
543 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
544
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
545
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
546 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
547 #if (RF_FAM == 61)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
548
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
549 void l1dmacro_adc_read_tx(UWORD32 when, UWORD8 tx_up_state)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
550 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
551 int i;
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
552
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
553 *TP_Ptr++ = TPU_FAT (when);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
554 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state | START_ADC);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
555 *TP_Ptr++ = TPU_WAIT (2);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
556 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,tx_up_state);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
557
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
558 #if (TRACE_TYPE==1)||(TRACE_TYPE ==4)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
559 l1_trace_ADC(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
560 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
561
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
562
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
563 #if (OP_WCP == 1) && (OP_L1_STANDALONE != 1)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
564 // WCS patch: ADC during TX
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
565 GC_SetAdcInfo(1);
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
566 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
567 }
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
568
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
569 #endif
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
570 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
571
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
572 /*
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
573 * l1dmacro_set_frame_it
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
574 *
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
575 */
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
576 void l1dmacro_set_frame_it(void)
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
577 {
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
578 TPU_FrameItEnable();
660e83f13cab gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
579 }