FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/nucleus/demo/caltimer.h @ 312:f05ae34f7ca0
gsm-fw: ARM exception vectors hooked in
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Mon, 17 Mar 2014 07:37:28 +0000 |
parents | afceeeb2cba1 |
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rev | line source |
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1 /* |
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2 * Definitions for Calypso general-purpose timer registers |
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3 * Added to the FreeNucleus Calypso port by Spacefalcon the Outlaw. |
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4 * |
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5 * This header is usable from both .c and .S source files. |
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6 */ |
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7 |
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8 #ifndef _CALYPSO_TIMER_H |
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9 #define _CALYPSO_TIMER_H |
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10 |
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11 #define TIMER1_BASE_ADDR 0xFFFE3800 |
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12 #define TIMER2_BASE_ADDR 0xFFFE6800 |
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13 |
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14 #ifdef __ASSEMBLER__ |
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15 |
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16 /* |
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17 * Assembly source with cpp |
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18 * |
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19 * The most convenient way to access registers like these from ARM |
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20 * assembly is to load the base address of the register block in some |
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21 * ARM register, using only one ldr rN, =xxx instruction and only one |
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22 * literal pool entry, and then access various registers in the block |
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23 * from the same base using the immediate offset addressing mode. |
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24 * |
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25 * Here we define the offsets for the usage scenario above. |
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26 */ |
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27 |
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28 #define CNTL_TIM 0x00 |
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29 #define LOAD_TIM 0x02 |
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30 #define READ_TIM 0x04 |
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31 |
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32 #else |
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33 |
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34 /* |
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35 * C source |
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36 * |
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37 * For access from C, we define the layout of each timer register block |
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38 * as a struct, and then define a pleudo-global-var for easy "volatile" |
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39 * access to each of the 2 timers. |
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40 */ |
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41 |
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42 struct timer_regs { |
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43 unsigned char cntl; |
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44 unsigned char pad; |
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45 unsigned short load; |
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46 unsigned short read; |
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47 }; |
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48 |
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49 #define TIMER1_REGS (*(volatile struct timer_regs *) TIMER1_BASE_ADDR) |
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50 #define TIMER2_REGS (*(volatile struct timer_regs *) TIMER2_BASE_ADDR) |
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51 |
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52 #endif |
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53 |
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54 /* CNTL register bit definitions */ |
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55 #define CNTL_START 0x01 |
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56 #define CNTL_AUTO_RELOAD 0x02 |
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57 #define CNTL_CLOCK_ENABLE 0x20 |
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58 |
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59 #endif /* include guard */ |