FreeCalypso > hg > freecalypso-sw

annotate gsm-fw/L1/cfile/l1_small_asm.S @ 779:f54080301c98

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
UART protocol stack entity compiles
author Michael Spacefalcon <falcon@ivan.Harhan.ORG>
date Sat, 07 Mar 2015 23:55:47 +0000
parents 8d6062f4e7e4
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
571
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
1 /*
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
2 * Assembly code extracted out of TI's l1_small.c
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
3 *
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
4 * This code is correct ONLY for CHIPSET 10 or 11 as currently used
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
5 * by FreeCalypso; see TI's original code for what changes would be
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
6 * needed to support other CHIPSETs.
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
7 */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
8
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
9 .text
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
10 .code 32
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
11
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
12 /*-------------------------------------------------------*/
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
13 /* _GSM_Small_Sleep */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
14 /* (formerly INT_Small_Sleep) */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
15 /*-------------------------------------------------------*/
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
16 /* */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
17 /* Description: small sleep */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
18 /* ------------ */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
19 /* Called by TCT_Schedule main loop of Nucleus */
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
20 /*-------------------------------------------------------*/
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
21
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
22 #define SMALL_SLEEP 0x01
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
23 #define ALL_SLEEP 0x04
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
24 #define PWR_MNGT 0x01
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
25
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
26 .globl _GSM_Small_Sleep
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
27 _GSM_Small_Sleep:
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
28
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
29 ldr r0,Switch
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
30 ldr r0,[r0]
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
31 ldrb r1,[r0]
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
32 cmp r1,#PWR_MNGT
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
33 bne TCT_Schedule_Loop
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
34
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
35 ldr r0,Mode
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
36 ldr r0,[r0]
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
37 ldrb r1,[r0]
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
38 cmp r1,#SMALL_SLEEP
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
39 beq Small_sleep_ok
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
40 cmp r1,#ALL_SLEEP
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
41 bne TCT_Schedule_Loop
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
42
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
43 Small_sleep_ok:
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
44
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
45 // *****************************************************
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
46 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
47 // (Cf BUG_1278)
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
48
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
49 ldr r0,addrCLKM @ pick up CNTL_ARM_CLK register address
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
50 ldrh r1,[r0] @ take the current value of the register
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
51 orr r1,r1,#0x1000 @ reset the bit
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
52 strh r1,[r0] @ store the result
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
53
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
54 ldr r0,addrCLKM @ pick up CLKM clock register address
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
55 ldrh r1,[r0] @ take the current value of the register
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
56 bic r1,r1,#1 @ disable ARM clock
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
57 strh r1,[r0]
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
58
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
59 B TCT_Schedule_Loop @ Return to TCT_Schedule main loop
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
60
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
61 addrCLKM: .word 0xfffffd00 @ CLKM clock register address
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
62
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
63 Mode: .word mode_authorized
8d6062f4e7e4 L1: l1_small.c reworked for FreeCalypso
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
64 Switch: .word switch_PWR_MNGT