FreeCalypso > hg > freecalypso-sw
annotate gsm-fw/bsp/abb+spi/abb_core_inth.c @ 865:f5affe83ba2d
lldbg hack (poor girl's substitute for JTAG) implemented
author | Space Falcon <falcon@ivan.Harhan.ORG> |
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date | Fri, 15 May 2015 00:02:03 +0000 |
parents | 05342cadbaf1 |
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1 /******************************************************************************/ |
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2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */ |
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3 /* */ |
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4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */ |
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5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This*/ |
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6 /* product is protected under copyright law and trade secret law as an*/ |
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7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All*/ |
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8 /* rights reserved. */ |
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9 /* */ |
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10 /* */ |
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11 /* Filename : abb_core_inth.c */ |
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12 /* */ |
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13 /* Description : Functions to manage the ABB device interrupt. */ |
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14 /* The Serial Port Interface is used to connect the TI */ |
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15 /* Analog BaseBand (ABB). */ |
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16 /* It is assumed that the ABB is connected as the SPI */ |
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17 /* device 0, and ABB interrupt is mapped as external IT. */ |
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18 /* */ |
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19 /* Author : Pascal PUEL */ |
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20 /* */ |
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21 /* Version number : 1.2 */ |
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22 /* */ |
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23 /* Date and time : 07/02/03 */ |
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24 /* */ |
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25 /* Previous delta : Creation */ |
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26 /* */ |
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27 /******************************************************************************/ |
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28 /* */ |
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29 /* 17/12/03 */ |
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30 /* The original abb_inth.c has been splitted between the actual abb_inth.c */ |
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31 /* located in drv_apps directory and abb_inth_core.c located in drv_core */ |
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32 /* directory. */ |
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33 /* */ |
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34 /******************************************************************************/ |
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35 |
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36 #include "../../include/config.h" |
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37 #include "../../include/sys_types.h" |
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38 #include "../../riviera/rv/general.h" |
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39 #include "../../nucleus/nucleus.h" // for NUCLEUS functions and types |
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40 |
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41 #include "../../L1/include/l1_confg.h" |
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42 #include "../../L1/include/l1_macro.h" |
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43 |
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44 #include <string.h> |
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45 #include "abb_core_inth.h" |
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46 |
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47 #if (OP_L1_STANDALONE == 0) |
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48 #include "../../riviera/rv/rv_defined_swe.h" // for RVM_PWR_SWE |
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49 #endif |
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50 |
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51 #if (OP_L1_STANDALONE == 1) |
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52 #include "../../L1/include/l1_types.h" |
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53 #endif |
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54 |
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55 #include "../iq.h" |
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56 |
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57 #include "../../gpf/inc/cust_os.h" |
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58 #include "../../L1/include/l1_signa.h" |
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59 #include "abb.h" |
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60 |
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61 #if(OP_L1_STANDALONE == 0) |
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62 #include "../../riviera/rvm/rvm_use_id_list.h" // for SPI_USE_ID |
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63 #include "spi_env.h" |
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64 #include "spi_process.h" // for ABB_EXT_IRQ_EVT |
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65 #if 0 // FreeCalypso |
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66 #include "power/power.h" |
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67 #endif |
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68 #endif /* (OP_L1_STANDALONE == 0) */ |
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69 |
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70 |
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71 |
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72 // Size of the HISR stack associated to the ABB interrupt |
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73 #define ABB_HISR_STACK_SIZE (512) |
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74 |
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75 static NU_HISR ABB_Hisr; |
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76 static char ABB_HisrStack[ABB_HISR_STACK_SIZE]; |
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77 |
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78 |
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79 |
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80 /*-----------------------------------------------------------------------*/ |
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81 /* Create_ABB_HISR() */ |
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82 /* */ |
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83 /* This function is called from Layer1 during initialization process */ |
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84 /* to create the HISR associated to the ABB External Interrupt. */ |
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85 /* */ |
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86 /*-----------------------------------------------------------------------*/ |
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87 void Create_ABB_HISR(void) |
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88 { |
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89 // Fill the entire stack with the pattern 0xFE |
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90 memset (ABB_HisrStack, 0xFE, sizeof(ABB_HisrStack)); |
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91 |
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92 // Create the HISR which is called when an ABB interrupt is received. |
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93 NU_Create_HISR(&ABB_Hisr, "EXT_HISR", EXT_HisrEntry, 2, ABB_HisrStack, sizeof(ABB_HisrStack)); // lowest prty |
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94 } |
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95 |
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96 |
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97 |
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98 |
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99 /*-----------------------------------------------------------------------*/ |
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100 /* Activate_ABB_HISR() */ |
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101 /* */ |
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102 /* This function is called from the interrupt handler to activate */ |
588
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103 /* the HISR associated to the ABB External Interrupt. */ |
148
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104 /* */ |
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105 /*-----------------------------------------------------------------------*/ |
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106 SYS_BOOL Activate_ABB_HISR(void) |
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107 { |
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108 if(NU_SUCCESS != NU_Activate_HISR(&ABB_Hisr)) |
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109 { |
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110 return 1; |
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111 } |
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112 return 0; |
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113 } |
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114 |
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115 |
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116 |
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117 /*-----------------------------------------------------------------------*/ |
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118 /* EXT_HisrEntry() */ |
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119 /* */ |
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120 /* This function is called when an ABB interrupt (external interrupt) */ |
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121 /* is received. */ |
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122 /* In a "L1_STANDALONE" environment, this IT is related to ADC. */ |
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123 /* In a complete system, this IT can have several causes. In that case, */ |
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124 /* it sends a message to the SPI task, to handle the IT in calling a */ |
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125 /* callback function. */ |
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126 /* */ |
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127 /*-----------------------------------------------------------------------*/ |
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128 void EXT_HisrEntry(void) |
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129 { |
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130 #if (OP_L1_STANDALONE == 1) |
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131 // New code in order to test the ADC with the L1 standalone |
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132 UWORD16 data ; |
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133 xSignalHeaderRec *adc_msg; |
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134 |
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135 // Call to the low-level driver function to read the interrupt status register. |
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136 data = ABB_Read_Register_on_page(PAGE1, ITSTATREG); |
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137 |
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138 if(data & ADCEND_IT_STS) // end of ADC |
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139 { |
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140 adc_msg = os_alloc_sig(sizeof(T_CST_ADC_RESULT)); |
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141 if(adc_msg != NU_NULL) |
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142 { |
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143 adc_msg->SignalCode = CST_ADC_RESULT; |
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144 ABB_Read_ADC(&((T_CST_ADC_RESULT *)(adc_msg->SigP))->adc_result[0]); |
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145 os_send_sig(adc_msg, RRM1_QUEUE); |
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146 } |
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147 } |
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148 |
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149 #if (CHIPSET == 12) |
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150 // Unmask ABB ext interrupt |
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151 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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152 #else |
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153 // Unmask external (ABB) interrupt |
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154 IQ_Unmask(IQ_EXT); |
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155 #endif |
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156 #endif |
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157 |
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158 #if (OP_L1_STANDALONE == 0) |
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159 T_RV_HDR *msgPtr; |
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160 |
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161 if(SPI_GBL_INFO_PTR != NULL) |
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162 { |
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163 if(SPI_GBL_INFO_PTR->SpiTaskReady != FALSE) |
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164 { |
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165 if(rvf_get_buf (SPI_GBL_INFO_PTR->prim_id, sizeof (T_RV_HDR),(void **) &msgPtr) == RVF_RED) |
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166 { |
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167 rvf_send_trace ("SPI ERROR: ABB IQ External not possible. Reason: Not enough memory", |
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168 66, |
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169 NULL_PARAM, |
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170 RV_TRACE_LEVEL_ERROR, |
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171 SPI_USE_ID); |
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172 |
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173 /* Unmask External interrupt */ |
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174 #if (CHIPSET == 12) |
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175 // Unmask ABB ext interrupt |
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176 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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177 #else |
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178 // Unmask external (ABB) interrupt |
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179 IQ_Unmask(IQ_EXT); |
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180 #endif |
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181 } |
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182 else // enough memory => normal processing : a message is sent to the SPI task. |
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183 { |
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184 msgPtr->msg_id = ABB_EXT_IRQ_EVT; |
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185 msgPtr->dest_addr_id = SPI_GBL_INFO_PTR->addr_id; |
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186 msgPtr->callback_func = (CALLBACK_FUNC) spi_abb_read_int_reg_callback; |
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187 |
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188 rvf_send_msg (SPI_GBL_INFO_PTR->addr_id, msgPtr); |
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189 } |
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190 } |
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191 else // SpiTaskReady is false |
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192 { |
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193 rvf_send_trace("ABB IQ External not possible. Reason: SPI Task not ready",56, NULL_PARAM, |
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194 RV_TRACE_LEVEL_ERROR, SPI_USE_ID); |
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195 |
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196 /* Unmask External interrupt */ |
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197 #if (CHIPSET == 12) |
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198 // Unmask ABB ext interrupt |
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199 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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200 #else |
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201 // Unmask external (ABB) interrupt |
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202 IQ_Unmask(IQ_EXT); |
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203 #endif |
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204 } |
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205 } |
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206 else // SPI_GBL_INFO_PTR = NULL |
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207 { |
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208 rvf_send_trace("ABB IQ External ERROR. Reason: SPI task not started",51, NULL_PARAM, |
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209 RV_TRACE_LEVEL_ERROR, SPI_USE_ID); |
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210 |
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211 /* Unmask External interrupt */ |
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212 #if (CHIPSET == 12) |
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213 // Unmask ABB ext interrupt |
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214 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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215 #else |
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216 // Unmask external (ABB) interrupt |
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217 IQ_Unmask(IQ_EXT); |
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218 #endif |
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219 } |
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220 #endif |
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221 } |