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annotate gsm-fw/L1/include/l1_signa.h @ 230:ffaa033e7643

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tiffs IVA: find_inode_block() integrated
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sun, 26 Jan 2014 00:34:22 +0000
parents afceeeb2cba1
children 25a7fe25864c
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_SIGNA.H
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4 *
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5 * Filename l1_signa.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
1e41550feec5 nuc-fw: Init_Target() reconstructed
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8 ************* Revision Controle System Header *************/
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9
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10 #define P_L1C 0
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11 #define P_DLL ( P_L1C + 1 )
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12
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13 // Messages Test/PWRMNGT <-> L1A
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14
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15 #if (OP_L1_STANDALONE == 1)
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16 /* Message used for hardware dynamic configuration */
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17 #define TST_HW_CONFIG_REQ ( ( P_L1C << 8 ) | 116)
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18 #endif
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19
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20 #define TST_TEST_HW_REQ ( ( P_L1C << 8 ) | 1 )
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21 #define TST_TEST_HW_CON ( ( P_L1C << 8 ) | 2 )
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22 #define TST_TIMESTAMP_MSG ( ( P_L1C << 8 ) | 3 )
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23 #define TST_SLEEP_REQ ( ( P_L1C << 8 ) | 4 )
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25
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26 // Messages L3 <-> L1A
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27 #define MPHC_RXLEV_REQ ( ( P_L1C << 8 ) | 11 )
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28 #define MPHC_RXLEV_IND ( ( P_L1C << 8 ) | 12 )
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29
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30 #define MPHC_STOP_RXLEV_REQ ( ( P_L1C << 8 ) | 13 )
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31 #define MPHC_STOP_RXLEV_CON ( ( P_L1C << 8 ) | 14 )
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32
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33 #define MPHC_NETWORK_SYNC_REQ ( ( P_L1C << 8 ) | 15 )
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34 #define MPHC_NETWORK_SYNC_IND ( ( P_L1C << 8 ) | 16 )
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35
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36 #define MPHC_STOP_NETWORK_SYNC_REQ ( ( P_L1C << 8 ) | 17 )
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37 #define MPHC_STOP_NETWORK_SYNC_CON ( ( P_L1C << 8 ) | 18 )
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38
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39 #define MPHC_NEW_SCELL_REQ ( ( P_L1C << 8 ) | 19 )
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40 #define MPHC_NEW_SCELL_CON ( ( P_L1C << 8 ) | 20 )
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41
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42 #define MPHC_START_CCCH_REQ ( ( P_L1C << 8 ) | 21 )
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43 #define MPHC_STOP_CCCH_REQ ( ( P_L1C << 8 ) | 22 )
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44 #define MPHC_STOP_CCCH_CON ( ( P_L1C << 8 ) | 23 )
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45
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46 #define MPHC_SCELL_NBCCH_REQ ( ( P_L1C << 8 ) | 24 )
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47 #define MPHC_SCELL_EBCCH_REQ ( ( P_L1C << 8 ) | 25 )
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48 #define MPHC_STOP_SCELL_BCCH_REQ ( ( P_L1C << 8 ) | 26 )
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49 #define MPHC_STOP_SCELL_BCCH_CON ( ( P_L1C << 8 ) | 27 )
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50
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51 #define MPHC_NCELL_BCCH_REQ ( ( P_L1C << 8 ) | 28 )
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52 #define MPHC_NCELL_BCCH_IND ( ( P_L1C << 8 ) | 29 )
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53 #define MPHC_STOP_NCELL_BCCH_REQ ( ( P_L1C << 8 ) | 30 )
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54 #define MPHC_STOP_NCELL_BCCH_CON ( ( P_L1C << 8 ) | 31 )
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55
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56 #define MPHC_NCELL_SYNC_REQ ( ( P_L1C << 8 ) | 32 )
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57 #define MPHC_NCELL_SYNC_IND ( ( P_L1C << 8 ) | 33 )
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58 #define MPHC_STOP_NCELL_SYNC_REQ ( ( P_L1C << 8 ) | 34 )
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59 #define MPHC_STOP_NCELL_SYNC_CON ( ( P_L1C << 8 ) | 35 )
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60
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61 #define MPHC_RXLEV_PERIODIC_REQ ( ( P_L1C << 8 ) | 36 )
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62 #define MPHC_RXLEV_PERIODIC_IND ( ( P_L1C << 8 ) | 37 )
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63 #define MPHC_STOP_RXLEV_PERIODIC_REQ ( ( P_L1C << 8 ) | 38 )
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64 #define MPHC_STOP_RXLEV_PERIODIC_CON ( ( P_L1C << 8 ) | 39 )
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65
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66 #define MPHC_CONFIG_CBCH_REQ ( ( P_L1C << 8 ) | 40 )
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67 #define MPHC_CBCH_SCHEDULE_REQ ( ( P_L1C << 8 ) | 41 )
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68 #define MPHC_CBCH_UPDATE_REQ ( ( P_L1C << 8 ) | 42 )
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69 #define MPHC_CBCH_INFO_REQ ( ( P_L1C << 8 ) | 43 )
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70 #define MPHC_STOP_CBCH_REQ ( ( P_L1C << 8 ) | 44 )
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71 #define MPHC_STOP_CBCH_CON ( ( P_L1C << 8 ) | 45 )
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72
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73 #define MPHC_RA_REQ ( ( P_L1C << 8 ) | 46 )
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74 #define MPHC_RA_CON ( ( P_L1C << 8 ) | 47 )
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75
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76 #define MPHC_STOP_RA_REQ ( ( P_L1C << 8 ) | 48 )
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77 #define MPHC_STOP_RA_CON ( ( P_L1C << 8 ) | 49 )
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78
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79 #define MPHC_DATA_IND ( ( P_L1C << 8 ) | 50 )
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80
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81 #define MPHC_IMMED_ASSIGN_REQ ( ( P_L1C << 8 ) | 51 )
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82 #define MPHC_CHANNEL_ASSIGN_REQ ( ( P_L1C << 8 ) | 52 )
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83 #define MPHC_ASYNC_HO_REQ ( ( P_L1C << 8 ) | 53 )
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84 #define MPHC_SYNC_HO_REQ ( ( P_L1C << 8 ) | 54 )
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85 #define MPHC_PRE_SYNC_HO_REQ ( ( P_L1C << 8 ) | 55 )
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86 #define MPHC_PSEUDO_SYNC_HO_REQ ( ( P_L1C << 8 ) | 56 )
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87 #define MPHC_STOP_DEDICATED_REQ ( ( P_L1C << 8 ) | 57 )
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88 #define MPHC_STOP_DEDICATED_CON ( ( P_L1C << 8 ) | 128 )
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89
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90 #define MPHC_CHANGE_FREQUENCY_CON ( ( P_L1C << 8 ) | 58 )
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91 #define MPHC_ASYNC_HO_CON ( ( P_L1C << 8 ) | 59 )
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92 #define MPHC_CHANNEL_ASSIGN_CON ( ( P_L1C << 8 ) | 60 )
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93 #define MPHC_CHANNEL_MODE_MODIFY_CON ( ( P_L1C << 8 ) | 61 )
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94 #define MPHC_HANDOVER_FAIL_CON ( ( P_L1C << 8 ) | 62 )
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95 #define MPHC_IMMED_ASSIGN_CON ( ( P_L1C << 8 ) | 63 )
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96 #define MPHC_PRE_SYNC_HO_CON ( ( P_L1C << 8 ) | 64 )
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97 #define MPHC_SET_CIPHERING_CON ( ( P_L1C << 8 ) | 65 )
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98 #define MPHC_SYNC_HO_CON ( ( P_L1C << 8 ) | 66 )
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99 #define MPHC_TA_FAIL_IND ( ( P_L1C << 8 ) | 67 )
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100
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101 #define MPHC_HANDOVER_FINISHED ( ( P_L1C << 8 ) | 68 )
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102
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103 #define MPHC_CHANGE_FREQUENCY ( ( P_L1C << 8 ) | 69 )
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104 #define MPHC_CHANNEL_MODE_MODIFY_REQ ( ( P_L1C << 8 ) | 70 )
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105 #define MPHC_HANDOVER_FAIL_REQ ( ( P_L1C << 8 ) | 71 )
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106 #define MPHC_SET_CIPHERING_REQ ( ( P_L1C << 8 ) | 72 )
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107
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108 #define MPHC_MEAS_REPORT ( ( P_L1C << 8 ) | 73 )
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109 #define MPHC_UPDATE_BA_LIST ( ( P_L1C << 8 ) | 74 )
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110
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111 #define MPHC_NCELL_FB_SB_READ ( ( P_L1C << 8 ) | 75 )
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112 #define MPHC_NCELL_SB_READ ( ( P_L1C << 8 ) | 76 )
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113 #define MPHC_NCELL_BCCH_READ ( ( P_L1C << 8 ) | 77 )
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114
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115
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116
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117 // Messages L1S -> L1A
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
118 #define L1C_VALID_MEAS_INFO ( ( P_L1C << 8 ) | 80 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
119 #define L1C_FB_INFO ( ( P_L1C << 8 ) | 81 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
120 #define L1C_SB_INFO ( ( P_L1C << 8 ) | 82 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
121 #define L1C_SBCONF_INFO ( ( P_L1C << 8 ) | 83 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
122 #define L1C_BCCHS_INFO ( ( P_L1C << 8 ) | 84 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
123 #define L1C_BCCHN_INFO ( ( P_L1C << 8 ) | 85 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
124 #define L1C_NP_INFO ( ( P_L1C << 8 ) | 86 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
125 #define L1C_EP_INFO ( ( P_L1C << 8 ) | 87 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
126 #define L1C_ALLC_INFO ( ( P_L1C << 8 ) | 88 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
127 #define L1C_RXLEV_PERIODIC_DONE ( ( P_L1C << 8 ) | 89 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
128 #define L1C_CB_INFO ( ( P_L1C << 8 ) | 90 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
129 #define L1C_RA_DONE ( ( P_L1C << 8 ) | 91 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
130 #define L1C_SACCH_INFO ( ( P_L1C << 8 ) | 92 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
131 #define L1C_MEAS_DONE ( ( P_L1C << 8 ) | 93 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
132 #define L1C_DEDIC_DONE ( ( P_L1C << 8 ) | 94 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
133 #define L1C_HANDOVER_FINISHED ( ( P_L1C << 8 ) | 95 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
134 #define L1C_REDEF_DONE ( ( P_L1C << 8 ) | 96 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
135 #define L1C_STOP_DEDICATED_DONE ( ( P_L1C << 8 ) | 129 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
136
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
137 // Messages O&M <-> L1A
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
138 #define OML1_CLOSE_TCH_LOOP_REQ ( ( P_L1C << 8 ) | 97 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
139 #define OML1_OPEN_TCH_LOOP_REQ ( ( P_L1C << 8 ) | 98 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
140 #define OML1_START_DAI_TEST_REQ ( ( P_L1C << 8 ) | 99 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
141 #define OML1_STOP_DAI_TEST_REQ ( ( P_L1C << 8 ) | 100 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
142
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
143 #define OML1_CLOSE_TCH_LOOP_CON ( ( P_L1C << 8 ) | 101 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
144 #define OML1_OPEN_TCH_LOOP_CON ( ( P_L1C << 8 ) | 102 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
145 #define OML1_START_DAI_TEST_CON ( ( P_L1C << 8 ) | 103 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
146 #define OML1_STOP_DAI_TEST_CON ( ( P_L1C << 8 ) | 104 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
147
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
148
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
149 // Message Custom I/F <- L1S
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
150 #define CST_ADC_RESULT ( ( P_L1C << 8 ) | 105 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
151
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
152
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
153 // Messages for trace
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
154 #define L1_STATS_REQ ( ( P_L1C << 8 ) | 107 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
155 #define L1_DUMMY_FOR_SIM ( ( P_L1C << 8 ) | 108 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
156
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
157 #define TRACE_DSP_DEBUG ( ( P_L1C << 8 ) | 106 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
158 #define TRACE_CONFIG ( ( P_L1C << 8 ) | 123 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
159 #define TRACE_CONDENSED_PDTCH ( ( P_L1C << 8 ) | 124 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
160 #define TRACE_INFO ( ( P_L1C << 8 ) | 125 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
161 #define QUICK_TRACE ( ( P_L1C << 8 ) | 126 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
162 #define TRACE_DSP_AMR_DEBUG ( ( P_L1C << 8 ) | 127 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
163
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
164 #define MPHC_NETWORK_LOST_IND ( ( P_L1C << 8 ) | 110 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
165
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
166 // Messages MMI <-> L1A
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
167 #define MMI_ADC_REQ ( ( P_L1C << 8 ) | 111 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
168 #define MMI_STOP_ADC_REQ ( ( P_L1C << 8 ) | 112 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
169 #define MMI_STOP_ADC_CON ( ( P_L1C << 8 ) | 113 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
170
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
171 #define L1_TEST_HW_INFO ( ( P_L1C << 8 ) | 119 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
172
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
173 // Multi-band selection E-GSM900/DCS1800/PCS1900/GSM850
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
174 #define MPHC_INIT_L1_REQ ( ( P_L1C << 8 ) | 114 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
175 #define MPHC_INIT_L1_CON ( ( P_L1C << 8 ) | 115 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
176
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
177 // MEssage RR -> L1A for Enhanced meas.
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
178 #if (L1_12NEIGH ==1)
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
179 #define MPHC_NCELL_LIST_SYNC_REQ ( ( P_L1C << 8 ) | 122 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
180 #endif
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
181
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
182 // Messages L2 <-> L1A
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
183 #define PH_DATA_IND ( ( P_DLL << 8 ) | 109 )
1e41550feec5 nuc-fw: Init_Target() reconstructed
Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
parents:
diff changeset
184