FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/services/etm/etm_tmcore.c @ 166:13af69b6a3dc
ETM core compiles
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Tue, 19 Nov 2013 05:07:24 +0000 |
parents | d78219c43fbf |
children | f9ac53d8e999 |
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165:9dbf3248a197 | 166:13af69b6a3dc |
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18 * instead of 8 bits. | 18 * instead of 8 bits. |
19 * | 19 * |
20 * (C) Copyright 2003 by Texas Instruments Incorporated, All Rights Reserved | 20 * (C) Copyright 2003 by Texas Instruments Incorporated, All Rights Reserved |
21 *********************************************************************************/ | 21 *********************************************************************************/ |
22 | 22 |
23 #include "rv/rv_defined_swe.h" | 23 #include "../../riviera/rv/rv_defined_swe.h" |
24 #include "rv/rv_general.h" | 24 #include "../../riviera/rv/rv_general.h" |
25 | 25 |
26 #include "etm/etm.h" | 26 #include "etm.h" |
27 #include "etm/etm_api.h" | 27 #include "etm_config.h" |
28 #include "etm/etm_trace.h" | 28 #include "etm_api.h" |
29 #include "etm/etm_version.h" | 29 #include "etm_trace.h" |
30 | 30 #include "etm_version.h" |
31 #include "abb/abb.h" | 31 |
32 | 32 #include "../../bsp/abb+spi/abb.h" |
33 #include "spi/spi_drv.h" | 33 #include "../../bsp/abb+spi/spi_drv.h" |
34 | |
34 extern void tr_etm_init(unsigned int mask); | 35 extern void tr_etm_init(unsigned int mask); |
35 | 36 |
36 // Version of the ETM CORE module | 37 // Version of the ETM CORE module |
37 // See the file etm_version.h | 38 // See the file etm_version.h |
38 | 39 |
91 uint8 type, param; | 92 uint8 type, param; |
92 uint8 *mem8; | 93 uint8 *mem8; |
93 uint16 *mem16; | 94 uint16 *mem16; |
94 uint32 *mem32; | 95 uint32 *mem32; |
95 uint32 addr, tmp; | 96 uint32 addr, tmp; |
96 static unsigned char test_buf[64]; | |
97 | 97 |
98 param = unitsize = *buf & 0x3; | 98 param = unitsize = *buf & 0x3; |
99 if (unitsize == 0) | 99 if (unitsize == 0) |
100 unitsize = 4; | 100 unitsize = 4; |
101 | 101 |
184 // Bit field is: PPPR RRRR | 184 // Bit field is: PPPR RRRR |
185 // where P = page bit, R = register address bits and X = don't care bits. | 185 // where P = page bit, R = register address bits and X = don't care bits. |
186 | 186 |
187 int etm_codec_write(T_ETM_PKT *pkt, uint8 *buf) | 187 int etm_codec_write(T_ETM_PKT *pkt, uint8 *buf) |
188 { | 188 { |
189 extern void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value); | |
190 uint16 page, reg, data; | 189 uint16 page, reg, data; |
191 int result, reg_data; | 190 int result, reg_data; |
192 | 191 |
193 reg_data = *buf++; | 192 reg_data = *buf++; |
194 if ((result = etm_pkt_put8(pkt, reg_data)) < 0) | 193 if ((result = etm_pkt_put8(pkt, reg_data)) < 0) |
214 } | 213 } |
215 | 214 |
216 | 215 |
217 int etm_codec_read(T_ETM_PKT *pkt, uint8 *buf) | 216 int etm_codec_read(T_ETM_PKT *pkt, uint8 *buf) |
218 { | 217 { |
219 extern SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id); | 218 uint16 value; |
220 volatile uint16 value; | |
221 uint16 page, reg; | 219 uint16 page, reg; |
222 int result, reg_data; | 220 int result, reg_data; |
223 | 221 |
224 reg_data = *buf; | 222 reg_data = *buf; |
225 if ((result = etm_pkt_put8(pkt, reg_data)) < 0) | 223 if ((result = etm_pkt_put8(pkt, reg_data)) < 0) |
226 return result; | 224 return result; |
227 | 225 |
228 page = (reg_data >> 5) & 0x3; | 226 page = (reg_data >> 5) & 0x3; |
291 *(volatile uint16*) 0xfffff804 = 0xFFFF; // Timer to watchdog | 289 *(volatile uint16*) 0xfffff804 = 0xFFFF; // Timer to watchdog |
292 *(volatile uint16*) 0xfffff800 = 0x0080; // Start timer | 290 *(volatile uint16*) 0xfffff800 = 0x0080; // Start timer |
293 // Apparently works it only if we read this register? | 291 // Apparently works it only if we read this register? |
294 i = *(volatile uint16*) 0xfffff802; | 292 i = *(volatile uint16*) 0xfffff802; |
295 *(volatile uint16*) 0xfffff802 = 0x0001; // Load timer | 293 *(volatile uint16*) 0xfffff802 = 0x0001; // Load timer |
296 | 294 |
297 return ETM_OK; | 295 return ETM_OK; |
298 } | 296 } |
299 | 297 |
300 | 298 |
301 /****************************************************************************** | 299 /****************************************************************************** |
352 { | 350 { |
353 extern uint16 etm_audio_revision; | 351 extern uint16 etm_audio_revision; |
354 extern uint16 etm_task_revision; | 352 extern uint16 etm_task_revision; |
355 int error, fid, ffs_tm_version; | 353 int error, fid, ffs_tm_version; |
356 volatile int revision = 0; | 354 volatile int revision = 0; |
355 #if 0 | |
357 T_VERSION *l1s_version; | 356 T_VERSION *l1s_version; |
357 #endif | |
358 | 358 |
359 fid = etm_get32(buf); | 359 fid = etm_get32(buf); |
360 | 360 |
361 tr_etm(TgTrCore, "ETM CORE: _version: fid(0x%x)", fid); | 361 tr_etm(TgTrCore, "ETM CORE: _version: fid(0x%x)", fid); |
362 | 362 |
363 #if 0 | |
363 l1s_version = (T_VERSION*) l1s_get_version(); | 364 l1s_version = (T_VERSION*) l1s_get_version(); |
365 #endif | |
364 | 366 |
365 switch (fid) { | 367 switch (fid) { |
366 // Code Versions related to ETM modules | 368 // Code Versions related to ETM modules |
367 case SW_REV_ETM_CORE: | 369 case SW_REV_ETM_CORE: |
368 error = etm_pkt_put32(pkt, ETM_CORE_VERSION); | 370 error = etm_pkt_put32(pkt, ETM_CORE_VERSION); |
390 error = etm_pkt_put32(pkt, ETM_API_VERSION); | 392 error = etm_pkt_put32(pkt, ETM_API_VERSION); |
391 break; | 393 break; |
392 // Code Versions related to L1, see in l1_defty.h | 394 // Code Versions related to L1, see in l1_defty.h |
393 // Get the version on this way "revision = l1s.version.dsp_code_version;" | 395 // Get the version on this way "revision = l1s.version.dsp_code_version;" |
394 // doesn't work because of struct aligment -> compile flag -mw !!!! | 396 // doesn't work because of struct aligment -> compile flag -mw !!!! |
397 #if 0 | |
395 case SW_DSP_CODE_VERSION: | 398 case SW_DSP_CODE_VERSION: |
396 revision = ((T_VERSION*) l1s_version)->dsp_code_version; | 399 revision = ((T_VERSION*) l1s_version)->dsp_code_version; |
397 error = etm_pkt_put32(pkt, revision); | 400 error = etm_pkt_put32(pkt, revision); |
398 break; | 401 break; |
399 case SW_DSP_PATCH_VERSION: | 402 case SW_DSP_PATCH_VERSION: |
414 break; | 417 break; |
415 case SW_MCU_TM_VERSION: | 418 case SW_MCU_TM_VERSION: |
416 revision = ((T_VERSION*) l1s_version)->mcu_tm_version; | 419 revision = ((T_VERSION*) l1s_version)->mcu_tm_version; |
417 error = etm_pkt_put32(pkt, revision); | 420 error = etm_pkt_put32(pkt, revision); |
418 break; | 421 break; |
422 #endif | |
419 default: | 423 default: |
420 error = ETM_NOSYS; | 424 error = ETM_NOSYS; |
421 } | 425 } |
422 | 426 |
423 tr_etm(TgTrCore, "ETM CORE: _version: version(%d)", revision); | 427 tr_etm(TgTrCore, "ETM CORE: _version: version(%d)", revision); |
486 pkt->size = 0; | 490 pkt->size = 0; |
487 pkt->index = 0; | 491 pkt->index = 0; |
488 etm_pkt_put8(pkt, fid); | 492 etm_pkt_put8(pkt, fid); |
489 | 493 |
490 switch (fid) { | 494 switch (fid) { |
491 #ifdef RVM_ATP_SWE | 495 #if ETM_ATP_SUPPORT |
492 case 0x60: // old 'G' | 496 case 0x60: // old 'G' |
493 error = etm_at(pkt, (char *) buf); | 497 error = etm_at(pkt, (char *) buf); |
494 break; | 498 break; |
495 #endif | 499 #endif |
496 case 0x61: // old 'M' | 500 case 0x61: // old 'M' |