FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/include/l1_const.h @ 530:25a7fe25864c
gsm-fw/L1/include: switch to LoCosto versions of all header files
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 01 Aug 2014 16:38:35 +0000 |
parents | 1affe428bf72 |
children | de635895e0be |
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529:f72c9db5e2f5 | 530:25a7fe25864c |
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4 * | 4 * |
5 * Filename l1_const.h | 5 * Filename l1_const.h |
6 * Copyright 2003 (C) Texas Instruments | 6 * Copyright 2003 (C) Texas Instruments |
7 * | 7 * |
8 ************* Revision Controle System Header *************/ | 8 ************* Revision Controle System Header *************/ |
9 #ifndef L1_CONST_H | |
10 #define L1_CONST_H | |
9 | 11 |
10 #ifdef __MSDOS__ // Running BORLANDC compiler. | 12 #ifdef __MSDOS__ // Running BORLANDC compiler. |
11 #ifdef MVC | 13 #ifdef MVC |
12 #define EXIT exit(0) | 14 #define EXIT exit(0) |
13 #define FAR | 15 #define FAR |
16 #define FAR far | 18 #define FAR far |
17 #endif | 19 #endif |
18 #else // Running ARM compiler. | 20 #else // Running ARM compiler. |
19 #define FAR | 21 #define FAR |
20 #define EXIT exit(0) | 22 #define EXIT exit(0) |
21 #undef stricmp // appease gcc | |
22 #define stricmp strcmp | 23 #define stricmp strcmp |
23 #endif | 24 #endif |
24 | 25 |
25 | 26 |
26 #if (CODE_VERSION != SIMULATION) | 27 #if (CODE_VERSION != SIMULATION) |
27 #undef NULL // appease gcc | |
28 #define NULL 0 | 28 #define NULL 0 |
29 #endif | 29 #endif |
30 | 30 |
31 #define NO_PAR 0 | 31 #define NO_PAR 0 |
32 | 32 |
55 #define GSM_SCHEDULER 2 // Select GSM scheduler | 55 #define GSM_SCHEDULER 2 // Select GSM scheduler |
56 | 56 |
57 //----------------------------- | 57 //----------------------------- |
58 // POWER MANAGEMENT............ | 58 // POWER MANAGEMENT............ |
59 //----------------------------- | 59 //----------------------------- |
60 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.setup_afc_and_rf) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(2) | 60 #define MIN_SLEEP_TIME (SETUP_FRAME+2+l1_config.params.rf_wakeup_tpu_scenario_duration) //HW WAKE-UP+MIN_SLEEP(2)+AFC RESTORE(rf_wakeup_tpu_scenario_duration) |
61 #define TPU_LOAD 01 | 61 #define TPU_LOAD 01 |
62 #define TPU_FREEZE 02 | 62 #define TPU_FREEZE 02 |
63 | 63 |
64 // SLEEP ALGO SWITCH | 64 // SLEEP ALGO SWITCH |
65 #define NO_SLEEP 00 // ------ + ------ + ------ | 65 #define NO_SLEEP 00 // ------ + ------ + ------ |
71 // GAUGING SAMPLES | 71 // GAUGING SAMPLES |
72 #define SIZE_HIST 10 | 72 #define SIZE_HIST 10 |
73 #define MAX_BAD_GAUGING 3 | 73 #define MAX_BAD_GAUGING 3 |
74 | 74 |
75 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) | 75 // GAUG_IN_32T = (HF in clock of 13Mhz*dpll) * ( LF in Khz) |
76 #define GAUG_IN_32T 1348 // gauging duration is 1348*T32 measured on eva4 | 76 #define GAUG_IN_32T 605 // gauging duration is 1348*T32 measured on eva4 |
77 | 77 |
78 // DSP state need to be used to enter Deep Sleep mode | 78 // DSP state need to be used to enter Deep Sleep mode |
79 #if (W_A_DSP_IDLE3 == 1) | 79 #if (W_A_DSP_IDLE3 == 1) |
80 #define C_DSP_IDLE3 3 | 80 #define C_DSP_IDLE3 3 |
81 #endif | 81 #endif |
152 | 152 |
153 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) | 153 #define A_D_BLEN 456 // SACCH/SDCCH data block length (GSM 5.01 $7) |
154 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length | 154 #define TCH_FS_BLEN 378 // TCH FULL SPEECH block length |
155 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length | 155 #define TCH_HS_BLEN 211 // TCH HALF SPEECH block length |
156 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length | 156 #define TCH_F_D_BLEN 456 // FACCH, TCH_DATA block length |
157 #define MIN_ACCEPTABLE_SNR_FOR_SB 200 // threshold under which a SB shall be considered as not found | |
157 | 158 |
158 // Define max PM/TDMA according to DSP code and TPU RAM size | 159 // Define max PM/TDMA according to DSP code and TPU RAM size |
159 //---------------------------------------------------------- | 160 //---------------------------------------------------------- |
160 | 161 |
161 // NOTE: we should use a global variable initialized at L1 start and function of rx synth setup time. | 162 // NOTE: we should use a global variable initialized at L1 start and function of rx synth setup time. |
165 // TPU RAM size limitation | 166 // TPU RAM size limitation |
166 | 167 |
167 #define NB_MEAS_MAX 4 | 168 #define NB_MEAS_MAX 4 |
168 #define NB_MEAS_MAX_GPRS 4 | 169 #define NB_MEAS_MAX_GPRS 4 |
169 | 170 |
170 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12)) | 171 #elif ((CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15)) |
171 | 172 |
172 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) | 173 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
173 | 174 |
174 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler | 175 // DSP code 33: upto 8 PMs with GSM and GPRS scheduler |
175 | 176 |
176 #define NB_MEAS_MAX 8 | 177 #define NB_MEAS_MAX 8 |
177 #define NB_MEAS_MAX_GPRS 8 | 178 #define NB_MEAS_MAX_GPRS 8 |
209 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length | 210 #define TCH_AHS_4_75_BLEN 212 // TCH AHS 4.75 Speech block length |
210 #endif | 211 #endif |
211 //---------------------------------------- | 212 //---------------------------------------- |
212 // LAYER 1 Asynchronous processes names... | 213 // LAYER 1 Asynchronous processes names... |
213 //---------------------------------------- | 214 //---------------------------------------- |
214 #if (TESTMODE) && !(L1_GPRS) | 215 #define NBR_L1A_PROCESSES 63 |
215 #if (AUDIO_TASK == 1) | 216 |
216 #if (L1_GTT) | 217 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) |
217 #if (OP_L1_STANDALONE == 1) | 218 #define CS_NORM 1 // l1a_cs_bcch_process(msg) |
218 #define NBR_L1A_PROCESSES 45 | 219 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) |
219 #else | 220 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) |
220 #define NBR_L1A_PROCESSES 44 | 221 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) |
221 #endif | 222 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) |
222 #else | 223 #define CR_B 6 // l1a_cres_process(msg) |
223 #if (OP_L1_STANDALONE == 1) | 224 #define ACCESS 7 // l1a_access_process(msg) |
224 #define NBR_L1A_PROCESSES 44 | 225 #define DEDICATED 8 // l1a_dedicated_process(msg) |
225 #else | 226 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) |
226 #define NBR_L1A_PROCESSES 43 | 227 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) |
227 #endif | 228 #define DEDIC_6 11 // l1a_dedic6_process(msg) |
228 #endif | 229 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) |
229 #else | 230 #define HW_TEST 13 // l1a_test_process(msg) |
230 #if (L1_GTT) | 231 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) |
231 #if (OP_L1_STANDALONE == 1) | 232 #define I_ADC 15 // l1a_mmi_adc_req(msg) |
232 #define NBR_L1A_PROCESSES 27 | 233 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) |
233 #else | 234 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) |
234 #define NBR_L1A_PROCESSES 26 | 235 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) |
235 #endif | 236 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) |
236 #else | 237 #define TMODE_RA 20 // l1a_tmode_access_process(msg) |
237 #if (OP_L1_STANDALONE == 1) | 238 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) |
238 #define NBR_L1A_PROCESSES 26 | 239 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) |
239 #else | 240 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) |
240 #define NBR_L1A_PROCESSES 25 | 241 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) |
241 #endif | 242 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) |
242 #endif | 243 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) |
243 #endif | 244 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) |
244 #endif | 245 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) |
245 | 246 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) |
246 #if (TESTMODE) && (L1_GPRS) | 247 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) |
247 #if (AUDIO_TASK == 1) | 248 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) |
248 #if (L1_GTT) | 249 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) |
249 #if (OP_L1_STANDALONE == 1) | 250 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) |
250 #define NBR_L1A_PROCESSES 46 | 251 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) |
251 #else | 252 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) |
252 #define NBR_L1A_PROCESSES 45 | 253 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) |
253 #endif | 254 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) |
254 #else | 255 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) |
255 #if (OP_L1_STANDALONE == 1) | 256 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) |
256 #define NBR_L1A_PROCESSES 45 | 257 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) |
257 #else | 258 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) |
258 #define NBR_L1A_PROCESSES 44 | 259 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) |
259 #endif | 260 #define L1A_AUDIO_ONOFF_STATE 43 // l1a_mmi_audio_onoff_process(msg) |
260 #endif | 261 #define L1A_GTT_STATE 44 // l1a_mmi_gtt_process(msg) |
261 #else | 262 #define INIT_L1 45 // l1a_init_layer1_process(msg) |
262 #if (L1_GTT) | 263 #define HSW_CONF 46 // l1a_test_config_process(msg) |
263 #if (OP_L1_STANDALONE == 1) | 264 #define L1A_MP3_STATE 47 // l1a_mmi_mp3_process(msg) |
264 #define NBR_L1A_PROCESSES 28 | 265 #define TMODE_AUDIO_STEREOPATH_DRV_STATE 48 // l1a_tmode_audio_stereopath_process(msg) |
265 #else | 266 #define L1A_EXT_AUDIO_MGT_STATE 49 // l1a_mmi_ext_audio_mgt_process(msg) |
266 #define NBR_L1A_PROCESSES 27 | 267 #define L1A_ANR_STATE 50 // l1a_mmi_anr_process(msg) |
267 #endif | 268 #define L1A_IIR_STATE 51 // l1a_mmi_iir_process(msg) |
268 #else | 269 #define L1A_LIMITER_STATE 52 // l1a_mmi_limiter_process(msg) |
269 #if (OP_L1_STANDALONE == 1) | 270 #define L1A_ES_STATE 53 // l1a_mmi_es_process(msg) |
270 #define NBR_L1A_PROCESSES 27 | 271 #define L1A_MIDI_STATE 54 // l1a_mmi_midi_process(msg) |
271 #else | 272 #define L1A_AGC_UL_STATE 55 // l1a_mmi_agc_ul_process(msg) |
272 #define NBR_L1A_PROCESSES 26 | 273 #define L1A_AGC_DL_STATE 56 // l1a_mmi_agc_dl_process(msg) |
273 #endif | 274 #define L1A_DRC_STATE 57 // l1a_mmi_drc_process(msg) |
274 #endif | 275 #define L1A_WCM_STATE 58 // l1a_mmi_wcm_process(msg) |
275 #endif | 276 #define L1A_AAC_STATE 59 // l1a_mmi_aac_process(msg) |
276 #endif | 277 #if (L1_VOCODER_IF_CHANGE == 1) |
277 | 278 #define L1A_VOCODER_CFG_STATE 60 // l1a_mmi_vocoder_cfg_process |
278 #if !(TESTMODE) | 279 #endif |
279 #if (AUDIO_TASK == 1) | 280 #if (L1_PCM_EXTRACTION) |
280 #if (L1_GTT) | 281 #define L1A_PCM_DOWNLOAD_STATE 61 |
281 #if (OP_L1_STANDALONE == 1) | 282 #define L1A_PCM_UPLOAD_STATE 62 |
282 #define NBR_L1A_PROCESSES 37 | 283 #endif |
283 #else | 284 |
284 #define NBR_L1A_PROCESSES 36 | |
285 #endif | |
286 #else | |
287 #if (OP_L1_STANDALONE == 1) | |
288 #define NBR_L1A_PROCESSES 36 | |
289 #else | |
290 #define NBR_L1A_PROCESSES 35 | |
291 #endif | |
292 #endif | |
293 #else | |
294 #if (L1_GTT) | |
295 #if (OP_L1_STANDALONE == 1) | |
296 #define NBR_L1A_PROCESSES 19 | |
297 #else | |
298 #define NBR_L1A_PROCESSES 18 | |
299 #endif | |
300 #else | |
301 #if (OP_L1_STANDALONE == 1) | |
302 #define NBR_L1A_PROCESSES 18 | |
303 #else | |
304 #define NBR_L1A_PROCESSES 17 | |
305 #endif | |
306 #endif | |
307 #endif | |
308 #endif | |
309 | |
310 | |
311 #define FULL_MEAS 0 // l1a_full_list_meas_process(msg) | |
312 #define CS_NORM 1 // l1a_cs_bcch_process(msg) | |
313 #define I_6MP 2 // l1a_idle_6strongest_monitoring_process(msg) | |
314 #define I_SCP 3 // l1a_idle_serving_cell_paging_process(msg) | |
315 #define I_SCB 4 // l1a_idle_serving_cell_bcch_reading_process(msg) | |
316 #define I_SMSCB 5 // l1a_idle_smscb_process(msg) | |
317 #define CR_B 6 // l1a_cres_process(msg) | |
318 #define ACCESS 7 // l1a_access_process(msg) | |
319 #define DEDICATED 8 // l1a_dedicated_process(msg) | |
320 #define I_FULL_MEAS 9 // l1a_dedicated_process(msg) | |
321 #define I_NMEAS 10 // l1a_idle_ba_meas_process(msg) | |
322 #define DEDIC_6 11 // l1a_dedic6_process(msg) | |
323 #define D_NMEAS 12 // l1a_dedic_ba_list_meas_process(msg) | |
324 #define HW_TEST 13 // l1a_test_process(msg) | |
325 #define I_BCCHN 14 // l1a_idle_neighbour_cell_bcch_reading_process(msg) | |
326 #define I_ADC 15 // l1a_mmi_adc_req(msg) | |
327 | |
328 #if (TESTMODE) && !(L1_GPRS) | |
329 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) | |
330 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) | |
331 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) | |
332 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) | |
333 #define TMODE_RA 20 // l1a_tmode_access_process(msg) | |
334 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) | |
335 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) | |
336 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) | |
337 #if (AUDIO_TASK == 1) | |
338 #define L1A_KEYBEEP_STATE 24 // l1a_mmi_keybeep_process(msg) | |
339 #define L1A_TONE_STATE 25 // l1a_mmi_tone_process(msg) | |
340 #define L1A_MELODY0_STATE 26 // l1a_mmi_melody0_process(msg) | |
341 #define L1A_MELODY1_STATE 27 // l1a_mmi_melody1_process(msg) | |
342 #define L1A_VM_PLAY_STATE 28 // l1a_mmi_vm_playing_process(msg) | |
343 #define L1A_VM_RECORD_STATE 29 // l1a_mmi_vm_recording_process(msg) | |
344 #define L1A_SR_ENROLL_STATE 30 // l1a_mmi_sr_enroll_process(msg) | |
345 #define L1A_SR_UPDATE_STATE 31 // l1a_mmi_sr_update_process(msg) | |
346 #define L1A_SR_RECO_STATE 32 // l1a_mmi_sr_reco_process(msg) | |
347 #define L1A_SR_UPDATE_CHECK_STATE 33 // l1a_mmi_sr_update_check_process(msg) | |
348 #define L1A_AEC_STATE 34 // l1a_mmi_aec_process(msg) | |
349 #define L1A_FIR_STATE 35 // l1a_mmi_fir_process(msg) | |
350 #define L1A_AUDIO_MODE_STATE 36 // l1a_mmi_audio_mode_process(msg) | |
351 #define L1A_MELODY0_E2_STATE 37 // l1a_mmi_melody0_e2_process(msg) | |
352 #define L1A_MELODY1_E2_STATE 38 // l1a_mmi_melody1_e2_process(msg) | |
353 #define L1A_VM_AMR_PLAY_STATE 39 // l1a_mmi_vm_amr_playing_process(msg) | |
354 #define L1A_VM_AMR_RECORD_STATE 40 // l1a_mmi_vm_amr_recording_process(msg) | |
355 #define L1A_CPORT_STATE 41 // l1a_mmi_cport_process(msg) | |
356 #if (L1_GTT == 1) | |
357 #define L1A_GTT_STATE 42 // l1a_mmi_gtt_process(msg) | |
358 #define INIT_L1 43 // l1a_init_layer1_process(msg) | |
359 #if (OP_L1_STANDALONE == 1) | |
360 #define HSW_CONF 44 // l1a_test_config_process(msg) | |
361 #endif | |
362 #else | |
363 #define INIT_L1 42 // l1a_init_layer1_process(msg) | |
364 #if (OP_L1_STANDALONE == 1) | |
365 #define HSW_CONF 43 // l1a_test_config_process(msg) | |
366 #endif | |
367 #endif | |
368 #else | |
369 #if (L1_GTT == 1) | |
370 #define L1A_GTT_STATE 24 // l1a_mmi_gtt_process(msg) | |
371 #define INIT_L1 25 // l1a_init_layer1_process(msg) | |
372 #if (OP_L1_STANDALONE == 1) | |
373 #define HSW_CONF 26 // l1a_test_config_process(msg) | |
374 #endif | |
375 #else | |
376 #define INIT_L1 24 // l1a_init_layer1_process(msg) | |
377 #if (OP_L1_STANDALONE == 1) | |
378 #define HSW_CONF 25 // l1a_test_config_process(msg) | |
379 #endif | |
380 #endif | |
381 #endif | |
382 #endif | |
383 | |
384 #if (TESTMODE) && (L1_GPRS) | |
385 #define TMODE_FB0 16 // l1a_tmode_fb0_process(msg) | |
386 #define TMODE_FB1 17 // l1a_tmode_fb1_process(msg) | |
387 #define TMODE_SB 18 // l1a_tmode_sb_process(msg) | |
388 #define TMODE_BCCH 19 // l1a_tmode_bcch_reading_process(msg) | |
389 #define TMODE_RA 20 // l1a_tmode_access_process(msg) | |
390 #define TMODE_DEDICATED 21 // l1a_tmode_dedicated_process(msg) | |
391 #define TMODE_FULL_MEAS 22 // l1a_tmode_full_list_meas_process(msg) | |
392 #define TMODE_PM 23 // l1a_tmode_meas_process(msg) | |
393 #define TMODE_TRANSFER 24 // l1a_tmode_transfer_process(msg) | |
394 #if (AUDIO_TASK == 1) | |
395 #define L1A_KEYBEEP_STATE 25 // l1a_mmi_keybeep_process(msg) | |
396 #define L1A_TONE_STATE 26 // l1a_mmi_tone_process(msg) | |
397 #define L1A_MELODY0_STATE 27 // l1a_mmi_melody0_process(msg) | |
398 #define L1A_MELODY1_STATE 28 // l1a_mmi_melody1_process(msg) | |
399 #define L1A_VM_PLAY_STATE 29 // l1a_mmi_vm_playing_process(msg) | |
400 #define L1A_VM_RECORD_STATE 30 // l1a_mmi_vm_recording_process(msg) | |
401 #define L1A_SR_ENROLL_STATE 31 // l1a_mmi_sr_enroll_process(msg) | |
402 #define L1A_SR_UPDATE_STATE 32 // l1a_mmi_sr_update_process(msg) | |
403 #define L1A_SR_RECO_STATE 33 // l1a_mmi_sr_reco_process(msg) | |
404 #define L1A_SR_UPDATE_CHECK_STATE 34 // l1a_mmi_sr_update_check_process(msg) | |
405 #define L1A_AEC_STATE 35 // l1a_mmi_aec_process(msg) | |
406 #define L1A_FIR_STATE 36 // l1a_mmi_fir_process(msg) | |
407 #define L1A_AUDIO_MODE_STATE 37 // l1a_mmi_audio_mode_process(msg) | |
408 #define L1A_MELODY0_E2_STATE 38 // l1a_mmi_melody0_e2_process(msg) | |
409 #define L1A_MELODY1_E2_STATE 39 // l1a_mmi_melody1_e2_process(msg) | |
410 #define L1A_VM_AMR_PLAY_STATE 40 // l1a_mmi_vm_amr_playing_process(msg) | |
411 #define L1A_VM_AMR_RECORD_STATE 41 // l1a_mmi_vm_amr_recording_process(msg) | |
412 #define L1A_CPORT_STATE 42 // l1a_mmi_cport_process(msg) | |
413 #if (L1_GTT == 1) | |
414 #define L1A_GTT_STATE 43 | |
415 #define INIT_L1 44 // l1a_init_layer1_process(msg) | |
416 #if (OP_L1_STANDALONE == 1) | |
417 #define HSW_CONF 45 // l1a_test_config_process(msg) | |
418 #endif | |
419 #else | |
420 #define INIT_L1 43 // l1a_init_layer1_process(msg) | |
421 #if (OP_L1_STANDALONE == 1) | |
422 #define HSW_CONF 44 // l1a_test_config_process(msg) | |
423 #endif | |
424 #endif | |
425 #else | |
426 #if (L1_GTT == 1) | |
427 #define L1A_GTT_STATE 25 | |
428 #define INIT_L1 26 // l1a_init_layer1_process(msg) | |
429 #if (OP_L1_STANDALONE == 1) | |
430 #define HSW_CONF 27 // l1a_test_config_process(msg) | |
431 #endif | |
432 #else | |
433 #define INIT_L1 25 // l1a_init_layer1_process(msg) | |
434 #if (OP_L1_STANDALONE == 1) | |
435 #define HSW_CONF 26 // l1a_test_config_process(msg) | |
436 #endif | |
437 #endif | |
438 #endif | |
439 #endif | |
440 | |
441 #if !(TESTMODE) && (AUDIO_TASK == 1) | |
442 #define L1A_KEYBEEP_STATE 16 // l1a_mmi_keybeep_process(msg) | |
443 #define L1A_TONE_STATE 17 // l1a_mmi_tone_process(msg) | |
444 #define L1A_MELODY0_STATE 18 // l1a_mmi_melody0_process(msg) | |
445 #define L1A_MELODY1_STATE 19 // l1a_mmi_melody1_process(msg) | |
446 #define L1A_VM_PLAY_STATE 20 // l1a_mmi_vm_playing_process(msg) | |
447 #define L1A_VM_RECORD_STATE 21 // l1a_mmi_vm_recording_process(msg) | |
448 #define L1A_SR_ENROLL_STATE 22 // l1a_mmi_sr_enroll_process(msg) | |
449 #define L1A_SR_UPDATE_STATE 23 // l1a_mmi_sr_update_process(msg) | |
450 #define L1A_SR_RECO_STATE 24 // l1a_mmi_sr_reco_process(msg) | |
451 #define L1A_SR_UPDATE_CHECK_STATE 25 // l1a_mmi_sr_update_check_process(msg) | |
452 #define L1A_AEC_STATE 26 // l1a_mmi_aec_process(msg) | |
453 #define L1A_FIR_STATE 27 // l1a_mmi_fir_process(msg) | |
454 #define L1A_AUDIO_MODE_STATE 28 // l1a_mmi_audio_mode_process(msg) | |
455 #define L1A_MELODY0_E2_STATE 29 // l1a_mmi_melody0_e2_process(msg) | |
456 #define L1A_MELODY1_E2_STATE 30 // l1a_mmi_melody1_e2_process(msg) | |
457 #define L1A_VM_AMR_PLAY_STATE 31 // l1a_mmi_vm_amr_playing_process(msg) | |
458 #define L1A_VM_AMR_RECORD_STATE 32 // l1a_mmi_vm_amr_recording_process(msg) | |
459 #define L1A_CPORT_STATE 33 // l1a_mmi_cport_process(msg) | |
460 #if (L1_GTT == 1) | |
461 #define L1A_GTT_STATE 34 // l1a_mmi_tty_process(msg) | |
462 #define INIT_L1 35 // l1a_init_layer1_process(msg) | |
463 #if (OP_L1_STANDALONE == 1) | |
464 #define HSW_CONF 36 // l1a_test_config_process(msg) | |
465 #endif | |
466 #else | |
467 #define INIT_L1 34 // l1a_init_layer1_process(msg) | |
468 #if (OP_L1_STANDALONE == 1) | |
469 #define HSW_CONF 35 // l1a_test_config_process(msg) | |
470 #endif | |
471 #endif | |
472 #elif !(TESTMODE) && !(AUDIO_TASK == 1) | |
473 #if (L1_GTT == 1) | |
474 #define L1A_GTT_STATE 16 // l1a_mmi_tty_process(msg) | |
475 #define INIT_L1 17 // l1a_init_layer1_process(msg) | |
476 #if (OP_L1_STANDALONE == 1) | |
477 #define HSW_CONF 18 // l1a_test_config_process(msg) | |
478 #endif | |
479 #else | |
480 #define INIT_L1 16 // l1a_init_layer1_process(msg) | |
481 #if (OP_L1_STANDALONE == 1) | |
482 #define HSW_CONF 17 // l1a_test_config_process(msg) | |
483 #endif | |
484 #endif | |
485 #endif | |
486 | 285 |
487 #if TESTMODE | 286 #if TESTMODE |
488 #define TMODE_UPLINK (1<<0) | 287 #define TMODE_UPLINK (1<<0) |
489 #define TMODE_DOWNLINK (1<<1) | 288 #define TMODE_DOWNLINK (1<<1) |
490 #endif | 289 #endif |
501 #define NO_NEW_TASK -1 | 300 #define NO_NEW_TASK -1 |
502 | 301 |
503 | 302 |
504 // Tasks in the order of their priority (low to high). | 303 // Tasks in the order of their priority (low to high). |
505 | 304 |
305 #if (GSM_IDLE_RAM != 0) | |
306 #define INT_RAM_GSM_IDLE_L1S_PROCESSES1 0x00000618 // PNP, PEP, NP, EP only are supported | |
307 #endif | |
308 | |
309 | |
506 #if !L1_GPRS | 310 #if !L1_GPRS |
507 | 311 |
312 #if ((REL99 == 1) && (FF_BHO == 1)) | |
313 #define NBR_DL_L1S_TASKS 33 | |
314 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
508 #define NBR_DL_L1S_TASKS 32 | 315 #define NBR_DL_L1S_TASKS 32 |
316 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
509 | 317 |
510 //GSM_TASKS/ | 318 //GSM_TASKS/ |
511 #define HWTEST 0 // DSP checksum reading | 319 #define HWTEST 0 // DSP checksum reading |
512 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode | 320 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
513 #define DEDIC 2 // Global Dedicated mode switch | 321 #define DEDIC 2 // Global Dedicated mode switch |
537 #define TCHD 26 // Dummy for TCH Half rate | 345 #define TCHD 26 // Dummy for TCH Half rate |
538 #define TCHA 27 // SACCH(TCH) | 346 #define TCHA 27 // SACCH(TCH) |
539 #define TCHTF 28 // TCH Full rate | 347 #define TCHTF 28 // TCH Full rate |
540 #define TCHTH 29 // TCH Half rate | 348 #define TCHTH 29 // TCH Half rate |
541 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode | 349 #define BCCHN_TOP 30 // BCCH Neighbour TOP priority in Idle mode |
350 #if ((REL99 == 1) && (FF_BHO == 1)) | |
351 #define FBSB 31 // Freq + Synchro Burst Reading in Blind Handover | |
352 #define SYNCHRO 32 // synchro task: L1S reset | |
353 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
542 #define SYNCHRO 31 // synchro task: L1S reset | 354 #define SYNCHRO 31 // synchro task: L1S reset |
355 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
543 //END_GSM_TASKS/ | 356 //END_GSM_TASKS/ |
544 | 357 |
545 #else | 358 #else |
546 | 359 |
360 #if ((REL99 == 1) && (FF_BHO == 1)) | |
361 #define NBR_DL_L1S_TASKS 46 | |
362 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
547 #define NBR_DL_L1S_TASKS 45 | 363 #define NBR_DL_L1S_TASKS 45 |
548 | 364 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) |
365 | |
366 #if (FF_REPEATED_SACCH == 1 ) | |
367 #define REPEATED_SACCH_ENABLE 1 | |
368 #endif /* FF_REPEATED_SACCH */ | |
549 //GPRS_TASKS/ | 369 //GPRS_TASKS/ |
550 #define HWTEST 0 // DSP checksum reading | 370 #define HWTEST 0 // DSP checksum reading |
551 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode | 371 #define ADC_CSMODE0 1 // ADC task in CS_MODE0 mode |
552 #define DEDIC 2 // Global Dedicated mode switch | 372 #define DEDIC 2 // Global Dedicated mode switch |
553 #define RAACC 3 // Channel access (ul) | 373 #define RAACC 3 // Channel access (ul) |
555 #define NSYNC 5 // Global Neighbour cell synchro switch | 375 #define NSYNC 5 // Global Neighbour cell synchro switch |
556 #define POLL 6 // Packet Polling (Access) | 376 #define POLL 6 // Packet Polling (Access) |
557 #define PRACH 7 // Packet Random Access Channel | 377 #define PRACH 7 // Packet Random Access Channel |
558 #define ITMEAS 8 // Interference measurements | 378 #define ITMEAS 8 // Interference measurements |
559 #define FBNEW 9 // Frequency burst search (Idle mode) | 379 #define FBNEW 9 // Frequency burst search (Idle mode) |
560 #define SBCONF 10 // Synchro. burst confirmation | 380 #define SBCONF 10 // Synchro. burst confirmation |
561 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) | 381 #define SB2 11 // Synchro. burst read (1 frame uncertainty / SB position) |
562 #define PTCCH 12 // Packet Timing Advance control channel | 382 #define PTCCH 12 // Packet Timing Advance control channel |
563 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 | 383 #define FB26 13 // Frequency burst search, dedic/transfer mode MF26 or MF52 |
564 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 | 384 #define SB26 14 // Synchro burst search, dedic/transfer mode MF26 or MF52 |
565 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 | 385 #define SBCNF26 15 // Synchro burst confirmation, dedic/transfer mode MF26 or MF52 |
589 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. | 409 #define PBCCHN_IDLE 39 // Packet BCCH Neighbor in Idle mode. |
590 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode | 410 #define BCCHN_TRAN 40 // BCCH Neighbour in Packet Transfer mode |
591 #define NP 41 // Normal paging Reading | 411 #define NP 41 // Normal paging Reading |
592 #define EP 42 // Extended paging Reading | 412 #define EP 42 // Extended paging Reading |
593 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode | 413 #define BCCHN_TOP 43 // BCCH Neighbour TOP priority in Idle mode |
414 #if ((REL99 == 1) && (FF_BHO == 1)) | |
415 #define FBSB 44 // Freq + Synchro Burst Reading in Blind Handover | |
416 #define SYNCHRO 45 // synchro task: L1S reset | |
417 #else //#if ((REL99 == 1) && (FF_BHO == 1)) | |
594 #define SYNCHRO 44 // synchro task: L1S reset | 418 #define SYNCHRO 44 // synchro task: L1S reset |
419 #endif //#if ((REL99 == 1) && (FF_BHO == 1)) | |
595 //END_GPRS_TASKS/ | 420 //END_GPRS_TASKS/ |
596 | 421 |
422 #endif | |
423 | |
424 #if (GSM_IDLE_RAM != 0) | |
425 #define SIZE_TAB_L1S_MONITOR (((NBR_DL_L1S_TASKS-1) >> 5) + 1) | |
597 #endif | 426 #endif |
598 | 427 |
599 //------------------------------------ | 428 //------------------------------------ |
600 // LAYER 1 API | 429 // LAYER 1 API |
601 //------------------------------------ | 430 //------------------------------------ |
602 #define MCSI_PORT1 0 | 431 #define MCSI_PORT1 0 |
603 #define MCSI_PORT2 1 | 432 #define MCSI_PORT2 1 |
604 | 433 |
605 | 434 |
606 //--------------------------------- | 435 #if (W_A_DSP_PR20037 == 1) |
607 // DSP vocoder Enable/ Disable | 436 //--------------------------------- |
608 //--------------------------------- | 437 // DSP vocoder Enable/ Disable |
609 | 438 //--------------------------------- |
610 #if (L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) | 439 #if (FF_L1_TCH_VOCODER_CONTROL == 1) |
611 #if (FF_L1_TCH_VOCODER_CONTROL == 1) | 440 #if (L1_VOCODER_IF_CHANGE == 0) |
612 #define TCH_VOCODER_DISABLE_REQ 0 | 441 #define TCH_VOCODER_DISABLE_REQ 0 |
613 #define TCH_VOCODER_ENABLE_REQ 1 | 442 #define TCH_VOCODER_ENABLE_REQ 1 |
614 #define TCH_VOCODER_ENABLED 2 | 443 #define TCH_VOCODER_ENABLED 2 |
615 #define TCH_VOCODER_DISABLED 3 | 444 #define TCH_VOCODER_DISABLED 3 |
616 | 445 #else |
446 #define TCH_VOCODER_RESET_COMMAND 0 | |
447 #define TCH_VOCODER_ENABLE_COMMAND 1 | |
448 #define TCH_VOCODER_DISABLE_COMMAND 2 | |
449 #endif // L1_VOCODER_IF_CHANGE == 0 | |
450 | |
451 #if (W_A_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE ==1) | |
617 // Number of TDMA wait frames until the DSP output is steady | 452 // Number of TDMA wait frames until the DSP output is steady |
618 #define DSP_VOCODER_ON_TRANSITION 165 | 453 #define DSP_VOCODER_ON_TRANSITION 165 |
619 #endif // FF_L1_TCH_VOCODER_CONTROL | 454 #endif |
620 #endif | 455 #endif // FF_L1_TCH_VOCODER_CONTROL |
456 #endif // W_A_DSP_PR20037 | |
457 | |
621 | 458 |
622 //--------------------------------- | 459 //--------------------------------- |
623 // Handover Finished cause defines. | 460 // Handover Finished cause defines. |
624 //--------------------------------- | 461 //--------------------------------- |
625 #define HO_COMPLETE 0 | 462 #define HO_COMPLETE 0 |
626 #define HO_TIMEOUT 1 | 463 #define HO_TIMEOUT 1 |
464 #if ((REL99 == 1) && (FF_BHO == 1)) | |
465 #define HO_FB_FAIL 2 | |
466 #define HO_SB_FAIL 3 | |
467 | |
468 #define NORMAL_HANDOVER 0 | |
469 #define BLIND_HANDOVER 1 | |
470 #endif | |
627 | 471 |
628 //--------------------------------- | 472 //--------------------------------- |
629 // FB detection algorithm defines. | 473 // FB detection algorithm defines. |
630 //--------------------------------- | 474 //--------------------------------- |
631 #define FB_MODE_0 0 // FB detec. mode 0. | 475 #define FB_MODE_0 0 // FB detec. mode 0. |
632 #define FB_MODE_1 1 // FB detec. mode 1. | 476 #define FB_MODE_1 1 // FB detec. mode 1. |
477 | |
478 //--------------------------------- | |
479 // SB acquisition phase. | |
480 //--------------------------------- | |
481 #if ((REL99 == 1) && ((FF_BHO == 1) || (FF_RTD == 1))) | |
482 #define SB_ACQUISITION_PHASE 5 | |
483 #endif | |
633 | 484 |
634 //--------------------------------- | 485 //--------------------------------- |
635 // AFC control defines. | 486 // AFC control defines. |
636 //--------------------------------- | 487 //--------------------------------- |
637 #define AFC_INIT 1 | 488 #define AFC_INIT 1 |
642 #if (VCXO_ALGO) | 493 #if (VCXO_ALGO) |
643 #define AFC_INIT_CENTER 4 | 494 #define AFC_INIT_CENTER 4 |
644 #define AFC_INIT_MAX 5 | 495 #define AFC_INIT_MAX 5 |
645 #define AFC_INIT_MIN 6 | 496 #define AFC_INIT_MIN 6 |
646 #endif | 497 #endif |
498 | |
499 // For Locosto | |
500 #define L1_AFC_MANUAL_MODE 0 | |
501 #define L1_AFC_SCRIPT_MODE 1 | |
502 #define L1_AFC_NONE 2 | |
503 | |
504 #define L1_CTL_ZERO_IF 2 | |
505 #define L1_CTL_LOW_IF 1 | |
506 | |
507 #define L1_IL_INVALID 0 | |
508 #define L1_IL_VALID 1 | |
509 | |
510 | |
511 // End Locosto | |
512 | |
647 //--------------------------------- | 513 //--------------------------------- |
648 // TOA control defines. | 514 // TOA control defines. |
649 //--------------------------------- | 515 //--------------------------------- |
650 #define TOA_INIT 1 | 516 #define TOA_INIT 1 |
651 #define TOA_RUN 2 | 517 #define TOA_RUN 2 |
518 #if (TOA_ALGO == 2) | |
519 // In this version TOA is refreshed every 2 seconds | |
520 #define L1_TOA_UPDATE_TIME ((UWORD32)(433)) | |
521 #endif | |
652 | 522 |
653 //--------------------------------- | 523 //--------------------------------- |
654 // Neighbour Synchro possible status. | 524 // Neighbour Synchro possible status. |
655 //--------------------------------- | 525 //--------------------------------- |
656 #define NSYNC_FREE 0 | 526 #define NSYNC_FREE 0 |
667 | 537 |
668 #if L1_GPRS | 538 #if L1_GPRS |
669 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX | 539 #define MAX_BLOCK_ID ((UWORD32) (3 * (UWORD32) (MAX_FN / 13))) // Block ID corresponding to fn = FN MAX |
670 #endif | 540 #endif |
671 | 541 |
542 #if FF_L1_IT_DSP_DTX | |
543 // dtx_status states | |
544 #define DTX_AVAILABLE 0 | |
545 #define DTX_AWAITED 1 | |
546 #define DTX_IT_DSP 2 | |
547 | |
548 // Latency time for Fast DTX availability upon channel start (TDMAs) | |
549 #define FAST_DTX_LATENCY 10 //chaged from value-4 -CQ- 74387 | |
550 #endif | |
551 | |
672 //-------------------------------------------------------- | 552 //-------------------------------------------------------- |
673 // standard specific constants used in l1_config.std.xxx | 553 // standard specific constants used in l1_config.std.xxx |
674 //-------------------------------------------------------- | 554 //-------------------------------------------------------- |
675 | 555 #if (L1_FF_MULTIBAND == 0) |
676 | 556 |
677 // GSM | 557 // GSM |
678 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 | 558 #define FIRST_ARFCN_GSM 1 // 1st arfcn is 1 |
679 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. | 559 #define NBMAX_CARRIER_GSM 124 // 124 for GSM, 174 for E_GSM, 374 for DCS1800. |
680 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band | 560 #define MAX_TXPWR_GSM 19 // lowest power ctrl level value in GSM band |
716 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement | 596 #define NBMAX_CARRIER NBMAX_CARRIER_DUALEXT //used in arrays for power measurement |
717 //non optimized!!! (dynamic memory allocation to optimize) | 597 //non optimized!!! (dynamic memory allocation to optimize) |
718 #define BAND1 1 | 598 #define BAND1 1 |
719 #define BAND2 2 | 599 #define BAND2 2 |
720 | 600 |
601 #else // L1_FF_MULTIBAND == 1 below | |
602 | |
603 /***** GSM Band Identifiers to be communicated to the L3, these indexes are fixed *****************/ | |
604 #define PGSM900 0 | |
605 #define GSM850 1 | |
606 #define PCS1900 2 | |
607 #define DCS1800 3 | |
608 #define GSM750 4 | |
609 #define GSM480 5 | |
610 #define GSM450 6 | |
611 #define T_GSM380 7 | |
612 #define T_GSM410 8 | |
613 #define T_GSM900 9 | |
614 #define EGSM900 10 | |
615 #define RGSM900 11 | |
616 | |
617 /***** PGSM900, EGSM900 and RGSM900 are seen a single band GSM900 **********************************/ | |
618 #define GSM900 12 | |
619 | |
620 /***** The total number of bands specified in the 3GPP Specs ***************************************/ | |
621 #define NB_MAX_GSM_BANDS 12 | |
622 | |
623 #if 0 | |
624 /********************************* Physical_band_ids to be supported Definition *******************/ | |
625 #define RGSM900_SUPPORTED 0 | |
626 #define EGSM900_SUPPORTED 1 | |
627 #define PGSM900_SUPPORTED 0 | |
628 #define GSM850_SUPPORTED 1 | |
629 #define PCS1900_SUPPORTED 1 | |
630 #define DCS1800_SUPPORTED 1 | |
631 #define GSM750_SUPPORTED 0 | |
632 #define GSM710_SUPPORTED 0 | |
633 #define GSM480_SUPPORTED 0 | |
634 #define T_GSM380_SUPPORTED 0 | |
635 #define T_GSM410_SUPPORTED 0 | |
636 #define GSM450_SUPPORTED 0 | |
637 #define T_GSM900_SUPPORTED 0 | |
638 | |
639 /***** Bands to be supported Eror Cases ******************************************/ | |
640 | |
641 #if (RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1) | |
642 #error " Only one of the RGSM900 or EGSM900 or PGSM900 bands is supported" | |
643 #endif/*if(RGSM900_SUPPORTED + EGSM900_SUPPORTED + PGSM900_SUPPORTED > 1)*/ | |
644 | |
645 | |
646 /***** GSM900_SUPPORTED means one of P, E or R GSM900 is supported ***/ | |
647 #if ((PGSM900_SUPPORTED == 1) || (EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) | |
648 #define GSM900_SUPPORTED 1 | |
649 #endif | |
650 | |
651 #endif // if 0 | |
652 | |
653 /***** Number of Physical Bands Supported by the L1 Calculation, this constant is less than NB_MAX_GSM_BANDS**********/ | |
654 #define NB_MAX_SUPPORTED_BANDS (GSM900_SUPPORTED +\ | |
655 GSM850_SUPPORTED + \ | |
656 PCS1900_SUPPORTED + \ | |
657 DCS1800_SUPPORTED + \ | |
658 GSM750_SUPPORTED + \ | |
659 GSM480_SUPPORTED + \ | |
660 GSM450_SUPPORTED + \ | |
661 T_GSM410_SUPPORTED + \ | |
662 T_GSM380_SUPPORTED + \ | |
663 T_GSM900_SUPPORTED) | |
664 | |
665 /***** | |
666 EGSM and RGSM have two separate ranges of ARFCN's that are considered by L1 as | |
667 separate bands. Hence number of supported bands is one more if E or R GSM900 is | |
668 supported. | |
669 *****/ | |
670 #if (PGSM900_SUPPORTED == 1)// This means E or R GSM900 is not supported | |
671 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS NB_MAX_SUPPORTED_BANDS | |
672 #endif | |
673 | |
674 #if ((EGSM900_SUPPORTED == 1) || (RGSM900_SUPPORTED == 1)) | |
675 #define NB_MAX_EFFECTIVE_SUPPORTED_BANDS (NB_MAX_SUPPORTED_BANDS + 1) | |
676 #endif | |
677 | |
678 #if 0 | |
679 /*The following constants allows the indexing of the physical bands in the MULTIBAND rf table located in l1_cust.c*/ | |
680 /*The bands positionning order is related to the bands ENUMERATION here below*/ | |
681 /*Changing the bands positions in this table implies changing the the band ENUMERATION in the file l1_const.h*/ | |
682 /*Changing the the band ENUMERATION in the file l1_const.h implies changing the bands positions in the table below*/ | |
683 enum | |
684 { | |
685 #if (GSM900_SUPPORTED == 1) | |
686 GSM900_ID, | |
687 #endif /*if (GSM900_SUPPORTED == 1)*/ | |
688 | |
689 #if (GSM850_SUPPORTED == 1) | |
690 GSM850_ID, | |
691 #endif /*if (GSM850_SUPPORTED == 1)*/ | |
692 | |
693 #if (DCS1800_SUPPORTED == 1) | |
694 DCS1800_ID, | |
695 #endif /*if (DCS1800_SUPPORTED == 1)*/ | |
696 | |
697 #if (PCS1900_SUPPORTED == 1) | |
698 PCS1900_ID, | |
699 #endif /*if (PCS1900_SUPPORTED == 1)*/ | |
700 | |
701 #if (GSM750_SUPPORTED == 1) | |
702 GSM750_ID, | |
703 #endif /*if (GSM750_SUPPORTED == 1)*/ | |
704 | |
705 #if (GSM480_SUPPORTED == 1) | |
706 GSM480_ID, | |
707 #endif /*if (GSM480_SUPPORTED == 1)*/ | |
708 | |
709 #if GSM450_SUPPORTED | |
710 GSM450_ID, | |
711 #endif /*if (GSM450_SUPPORTED == 1)*/ | |
712 | |
713 #if (T_GSM410_SUPPORTED == 1) | |
714 T_GSM410_ID, | |
715 #endif /*if (T_GSM410_SUPPORTED == 1)*/ | |
716 | |
717 #if (T_GSM380_SUPPORTED == 1) | |
718 T_GSM380_ID, | |
719 #endif /*if (T_GSM380_SUPPORTED == 1)*/ | |
720 | |
721 #if (T_GSM900_SUPPORTED == 1) | |
722 T_GSM900_ID, | |
723 #endif /*if (T_GSM900_SUPPORTED == 1)*/ | |
724 }; | |
725 #endif | |
726 /***********************************Calculation of the number of carriers per Effective Band*********/ | |
727 #if 0 | |
728 | |
729 #if (PGSM900_SUPPORTED == 1) | |
730 #define NB_CARRIER_900_LOW_SUB_BAND 124 | |
731 #define NB_CARRIER_900_HIGH_SUB_BAND 0 | |
732 #endif /*if (PGSM900_SUPPORTED == 1)*/ | |
733 | |
734 #if (EGSM900_SUPPORTED == 1) | |
735 #define NB_CARRIER_900_LOW_SUB_BAND 125 | |
736 #define NB_CARRIER_900_HIGH_SUB_BAND 49 | |
737 #endif /*if (EGSM900_SUPPORTED == 1)*/ | |
738 | |
739 #if (RGSM900_SUPPORTED == 1) | |
740 #define NB_CARRIER_900_LOW_SUB_BAND 125 | |
741 #define NB_CARRIER_900_HIGH_SUB_BAND 69 | |
742 #endif /*if (RGSM900_SUPPORTED == 1)*/ | |
743 | |
744 #define NB_CARRIER_850 124 | |
745 #define NB_CARRIER_1800 344 | |
746 #define NB_CARRIER_1900 299 | |
747 #define NB_CARRIER_750 74 | |
748 #define NB_CARRIER_480 35 | |
749 #define NB_CARRIER_450 35 | |
750 #define NB_CARRIER_T_410 47 | |
751 #define NB_CARRIER_T_380 47 | |
752 #define NB_CARRIER_T_900 27 | |
753 | |
754 /****** NBMAX_CARRIER is the total number of carriers supported based on band support *********/ | |
755 | |
756 #define NBMAX_CARRIER (((NB_CARRIER_900_LOW_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM900_SUPPORTED) \ | |
757 + (NB_CARRIER_850 * GSM850_SUPPORTED) \ | |
758 + (NB_CARRIER_1800 * DCS1800_SUPPORTED)\ | |
759 + (NB_CARRIER_1900 * PCS1900_SUPPORTED) \ | |
760 + (NB_CARRIER_750 * GSM750_SUPPORTED) \ | |
761 + (NB_CARRIER_480 * GSM480_SUPPORTED) \ | |
762 + (NB_CARRIER_450 * GSM450_SUPPORTED) \ | |
763 + (NB_CARRIER_T_410 * T_GSM410_SUPPORTED) \ | |
764 + (NB_CARRIER_T_380 * T_GSM380_SUPPORTED) \ | |
765 + (NB_CARRIER_T_900 * T_GSM900_SUPPORTED)) | |
766 | |
767 | |
768 /** | |
769 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers | |
770 with exceptiopn of 1900 where the numbers start from 1024 onwards. This results in | |
771 holes in the numbering given from L3 and hence cannot be used for indexing arrays of | |
772 carriers. To index arrays the frequency numbers from L3 are translated to 'operative radio | |
773 frequencies'. For any band configuration supported, this is a continuos number from | |
774 0 to NBMAX_CARRIER (The sum of number of carriers in all supported bands) | |
775 The defines below are for finding the first operative frequency corresponding to each band | |
776 **/ | |
777 | |
778 #define FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
779 #define FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND (FIRST_OPERATIVE_RADIO_FREQ_900_LOW_SUB_BAND + NB_CARRIER_900_LOW_SUB_BAND) * GSM900_SUPPORTED | |
780 #define FIRST_OPERATIVE_RADIO_FREQ_850 (FIRST_OPERATIVE_RADIO_FREQ_900_HIGH_SUB_BAND + NB_CARRIER_900_HIGH_SUB_BAND) * GSM850_SUPPORTED | |
781 #define FIRST_OPERATIVE_RADIO_FREQ_1900 (FIRST_OPERATIVE_RADIO_FREQ_850 + NB_CARRIER_850) * PCS1900_SUPPORTED | |
782 #define FIRST_OPERATIVE_RADIO_FREQ_1800 (FIRST_OPERATIVE_RADIO_FREQ_1900 + NB_CARRIER_1900) * DCS1800_SUPPORTED | |
783 #define FIRST_OPERATIVE_RADIO_FREQ_750 (FIRST_OPERATIVE_RADIO_FREQ_1800 + NB_CARRIER_1800) * GSM750_SUPPORTED | |
784 #define FIRST_OPERATIVE_RADIO_FREQ_480 (FIRST_OPERATIVE_RADIO_FREQ_750 + NB_CARRIER_750) * GSM480_SUPPORTED | |
785 #define FIRST_OPERATIVE_RADIO_FREQ_450 (FIRST_OPERATIVE_RADIO_FREQ_480 + NB_CARRIER_480) * GSM450_SUPPORTED | |
786 #define FIRST_OPERATIVE_RADIO_FREQ_T_410 (FIRST_OPERATIVE_RADIO_FREQ_450 + NB_CARRIER_450) * T_GSM410_SUPPORTED | |
787 #define FIRST_OPERATIVE_RADIO_FREQ_T_380 (FIRST_OPERATIVE_RADIO_FREQ_T_410 + NB_CARRIER_T_410) * T_GSM380_SUPPORTED | |
788 #define FIRST_OPERATIVE_RADIO_FREQ_T_900 (FIRST_OPERATIVE_RADIO_FREQ_T_380 + NB_CARRIER_T_380) * T_GSM900_SUPPORTED | |
789 | |
790 /********************** Definition of the first radio freqs as per L3-L1 interface *********/ | |
791 | |
792 #if (PGSM900_SUPPORTED == 1) | |
793 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 1 | |
794 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 0 | |
795 #endif /*if (PGSM900_SUPPORTED == 1)*/ | |
796 | |
797 #if (EGSM900_SUPPORTED == 1) | |
798 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
799 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 975 | |
800 #endif /*if (EGSM900_SUPPORTED == 1)*/ | |
801 | |
802 #if (RGSM900_SUPPORTED == 1) | |
803 #define FIRST_RADIO_FREQ_900_LOW_SUB_BAND 0 | |
804 #define FIRST_RADIO_FREQ_900_HIGH_SUB_BAND 955 | |
805 #endif /* (RGSM900_SUPPORTED == 1)*/ | |
806 | |
807 #define FIRST_RADIO_FREQ_850 128 | |
808 #define FIRST_RADIO_FREQ_1800 512 | |
809 #define FIRST_RADIO_FREQ_1900 1024 | |
810 #define FIRST_TPU_RADIO_FREQ_1900 512 /* TBD The GSM1900 is the unique band in which the FIRST_TPU_RADIO is not equal to FIRST_RADIO_FREQ*/ | |
811 | |
812 #endif // if 0 | |
813 | |
814 #endif // L1_FF_MULTIBAND == 0 | |
815 | |
816 #if (L1_FF_MULTIBAND == 0) | |
817 #else | |
818 /* Prototypes */ | |
819 | |
820 #define l1_multiband_radio_freq_convert_into_effective_band_id(radio_freq) \ | |
821 rf_convert_rffreq_to_l1subband(radio_freq) | |
822 | |
823 #define l1_multiband_radio_freq_convert_into_physical_band_id(radio_freq) \ | |
824 ((UWORD8)rf_convert_l1freq_to_rf_band_idx(rf_convert_rffreq_to_l1freq(radio_freq))) | |
825 | |
826 #define l1_multiband_radio_freq_convert_into_operative_radio_freq(radio_freq) \ | |
827 rf_convert_rffreq_to_l1freq(radio_freq) | |
828 | |
829 #if (CODE_VERSION != SIMULATION) | |
830 UWORD8 rf_convert_rffreq_to_l1subband(UWORD16 rf_freq); | |
831 UWORD8 rf_convert_l1freq_to_l1subband(UWORD16 l1_freq); | |
832 WORD8 rf_convert_l1freq_to_rf_band_idx(UWORD16 l1_freq); | |
833 UWORD16 rf_convert_l1freq_to_rffreq(UWORD16 l1_freq ); | |
834 UWORD16 rf_convert_l1freq_to_rffreq_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); | |
835 UWORD16 rf_convert_l1freq_to_arfcn_rfband(UWORD16 l1_freq, WORD8 *rf_band_index); | |
836 UWORD16 rf_convert_rffreq_to_l1freq(UWORD16 rf_freq); | |
837 UWORD16 rf_convert_rffreq_to_l1freq_rfband(UWORD16 rf_freq, WORD8 *rf_band_index); | |
838 UWORD16 rf_convert_tmarfcn_to_l1freq(UWORD16 tm_arfcn, WORD8 * error_flag); | |
839 #endif | |
840 | |
841 /* RF defines */ | |
842 /******************************Physical_band_ids to be supported Definition****************************************/ | |
843 #define RGSM900_SUPPORTED 0 | |
844 #define PGSM900_SUPPORTED 0 | |
845 #define GSM750_SUPPORTED 0 | |
846 #define GSM710_SUPPORTED 0 | |
847 #define GSM480_SUPPORTED 0 | |
848 #define T_GSM380_SUPPORTED 0 | |
849 #define T_GSM410_SUPPORTED 0 | |
850 #define GSM450_SUPPORTED 0 | |
851 #define T_GSM900_SUPPORTED 0 | |
852 #if 0 | |
853 #if (RF_BAND_SYSTEM_INDEX == RF_DCS1800_850_DUALBAND) | |
854 #define GSM900_SUPPORTED 0 | |
855 #define GSM850_SUPPORTED 1 | |
856 #define PCS1900_SUPPORTED 0 | |
857 #define DCS1800_SUPPORTED 1 | |
858 #elif (RF_BAND_SYSTEM_INDEX == RF_PCS1900_900_DUALBAND) | |
859 #define GSM900_SUPPORTED 1 | |
860 #define GSM850_SUPPORTED 0 | |
861 #define PCS1900_SUPPORTED 1 | |
862 #define DCS1800_SUPPORTED 0 | |
863 #elif (RF_BAND_SYSTEM_INDEX == RF_US_DUALBAND) | |
864 #define GSM900_SUPPORTED 0 | |
865 #define GSM850_SUPPORTED 1 | |
866 #define PCS1900_SUPPORTED 1 | |
867 #define DCS1800_SUPPORTED 0 | |
868 #elif (RF_BAND_SYSTEM_INDEX == RF_US_TRIBAND) | |
869 #define GSM900_SUPPORTED 0 | |
870 #define GSM850_SUPPORTED 1 | |
871 #define PCS1900_SUPPORTED 1 | |
872 #define DCS1800_SUPPORTED 1 | |
873 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_DUALBAND) | |
874 #define GSM900_SUPPORTED 1 | |
875 #define GSM850_SUPPORTED 0 | |
876 #define PCS1900_SUPPORTED 0 | |
877 #define DCS1800_SUPPORTED 1 | |
878 #elif (RF_BAND_SYSTEM_INDEX == RF_EU_TRIBAND) | |
879 #define GSM900_SUPPORTED 1 | |
880 #define GSM850_SUPPORTED 0 | |
881 #define PCS1900_SUPPORTED 1 | |
882 #define DCS1800_SUPPORTED 1 | |
883 #elif (RF_BAND_SYSTEM_INDEX == RF_QUADBAND) | |
884 #define GSM900_SUPPORTED 1 | |
885 #define GSM850_SUPPORTED 1 | |
886 #define PCS1900_SUPPORTED 1 | |
887 #define DCS1800_SUPPORTED 1 | |
888 #endif | |
889 #endif // if 0 TBD | |
890 #define GSM900_SUPPORTED 1 | |
891 #define GSM850_SUPPORTED 1 | |
892 #define PCS1900_SUPPORTED 1 | |
893 #define DCS1800_SUPPORTED 1 | |
894 | |
895 /* The physical RF bands are enumerated in order of increasing frequencies */ | |
896 /* The same order must be used in l1_rf61, l1_cust, and l1_const */ | |
897 enum | |
898 { | |
899 #if (GSM900_SUPPORTED == 1) | |
900 RF_GSM900, | |
901 #endif | |
902 #if (GSM850_SUPPORTED == 1) | |
903 RF_GSM850, | |
904 #endif | |
905 #if (DCS1800_SUPPORTED == 1) | |
906 RF_DCS1800, | |
907 #endif | |
908 #if (PCS1900_SUPPORTED == 1) | |
909 RF_PCS1900, | |
910 #endif | |
911 RF_NB_SUPPORTED_BANDS /* The number of supported physical bands */ | |
912 }; | |
913 | |
914 #if GSM900_SUPPORTED | |
915 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS + 1) | |
916 #else | |
917 #define RF_NB_SUBBANDS (RF_NB_SUPPORTED_BANDS) | |
918 #endif | |
919 | |
920 /***********************************Calculation of the number of carriers per Effective Band*********/ | |
921 #define NB_CHAN_900L 125 | |
922 #define NB_CHAN_900H 49 | |
923 #define NB_CHAN_850 124 | |
924 #define NB_CHAN_1800 374 | |
925 #define NB_CHAN_1900 299 | |
926 | |
927 /** | |
928 The multiband frequency numbers exchanged across L3-L1 I/F are the 3GPP ARFCN numbers | |
929 except for DCS1900 where the numbers start from 1024 onwards, i.e. ARFCN+512. | |
930 L1 cannot have holes in the numbering, so a different L1 internal one is needed to build arrays in L1. | |
931 This numbering is similar to ARFCN numbering, except the high part of GSM900 channel numbers | |
932 are mapped between low part of GSM900 numbers and the GSM850 numbers. | |
933 For any band configuration supported, this is a continuos number from | |
934 0 to NB_CARRIERS (The sum of number of carriers in all supported bands) | |
935 **/ | |
936 /****** L1_NB_CARRIER is the total number of carriers supported based on band support *********/ | |
937 #define L1_FREQ_1ST_900L 0 | |
938 #define L1_FREQ_1ST_900H (L1_FREQ_1ST_900L + NB_CHAN_900L * GSM900_SUPPORTED) | |
939 #define L1_FREQ_1ST_850 (L1_FREQ_1ST_900H + NB_CHAN_900H * GSM900_SUPPORTED) | |
940 #define L1_FREQ_1ST_1800 (L1_FREQ_1ST_850 + NB_CHAN_850 * GSM850_SUPPORTED) | |
941 #define L1_FREQ_1ST_1900 (L1_FREQ_1ST_1800 + NB_CHAN_1800 * DCS1800_SUPPORTED) | |
942 #define NBMAX_CARRIER (L1_FREQ_1ST_1900 + NB_CHAN_1900 * PCS1900_SUPPORTED) | |
943 | |
944 #define ARFCN_1ST_900L 0 | |
945 #define ARFCN_1ST_900H 975 | |
946 #define ARFCN_1ST_850 128 | |
947 #define ARFCN_1ST_1800 512 | |
948 #define ARFCN_1ST_1900 512 | |
949 | |
950 #define RF_FREQ_1ST_900L ARFCN_1ST_900L | |
951 #define RF_FREQ_1ST_900H ARFCN_1ST_900H | |
952 #define RF_FREQ_1ST_850 ARFCN_1ST_850 | |
953 #define RF_FREQ_1ST_1800 ARFCN_1ST_1800 | |
954 #define RF_FREQ_1ST_1900 (ARFCN_1ST_1900 + 512) | |
955 | |
956 | |
957 typedef struct | |
958 { | |
959 UWORD16 first_rf_freq; | |
960 UWORD16 last_rf_freq; | |
961 UWORD16 first_l1_freq; | |
962 WORD16 l1freq2rffreq; | |
963 } | |
964 T_MULTIBAND_CONVERT; | |
965 | |
966 typedef struct | |
967 { | |
968 UWORD8 power_class; | |
969 UWORD8 tx_turning_point; | |
970 UWORD8 max_txpwr; | |
971 UWORD8 gsm_band_identifier; | |
972 char* name; | |
973 } | |
974 T_MULTIBAND_RF; | |
975 | |
976 #endif /*if (L1_FF_MULTIBAND == 1)*/ | |
977 | |
978 | |
979 | |
721 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. | 980 #define NO_TXPWR 255 // sentinal value used with UWORD8 type. |
722 | 981 |
723 | 982 |
724 //-------------------------------------------------------- | 983 //-------------------------------------------------------- |
725 // Receive level values. | 984 // Receive level values. |
726 //-------------------------------------------------------- | 985 //-------------------------------------------------------- |
727 #define RXLEV63 63 // max value for RXLEV. | 986 #define RXLEV63 63 // max value for RXLEV. |
728 #define IL_MIN 240 // minimum input level is -120 dbm. | 987 #define IL_MIN 240 // minimum input level is -120 dbm. |
729 | |
730 //-------------------------------------------------------- | |
731 // Max number of cell to report in MPHC_RXLEV_IND. | |
732 // Nb cells to check to see if cell of MPHC_NETWORK_SYNC_REQ has been detected | |
733 //-------------------------------------------------------- | |
734 #define MAX_MEAS_RXLEV_IND_TRACE 10 | |
735 #define NB_FQ_TO_CHK 4 | |
736 | 988 |
737 /*--------------------------------------------------------*/ | 989 /*--------------------------------------------------------*/ |
738 /* Max value for GSM Paging Parameters. */ | 990 /* Max value for GSM Paging Parameters. */ |
739 /*--------------------------------------------------------*/ | 991 /*--------------------------------------------------------*/ |
740 #define MAX_AG_BLKS_RES_NCOMB 7 | 992 #define MAX_AG_BLKS_RES_NCOMB 7 |
789 #define CBCH_TB3 0x0004 | 1041 #define CBCH_TB3 0x0004 |
790 #define CBCH_TB5 0x0008 | 1042 #define CBCH_TB5 0x0008 |
791 #define CBCH_TB6 0x0010 | 1043 #define CBCH_TB6 0x0010 |
792 #define CBCH_TB7 0x0020 | 1044 #define CBCH_TB7 0x0020 |
793 | 1045 |
1046 #if FF_TBF | |
1047 /*--------------------------------------------------------*/ | |
1048 /* Access burst types on the RACH/PRACH */ | |
1049 /*--------------------------------------------------------*/ | |
1050 #define ACC_BURST_8 0 | |
1051 #define ACC_BURST_11 1 | |
1052 #define ACC_BURST_11_TS1 2 | |
1053 #define ACC_BURST_11_TS2 3 | |
1054 #endif | |
794 #define CBCH_CONTINUOUS_READING 0 | 1055 #define CBCH_CONTINUOUS_READING 0 |
795 #define CBCH_SCHEDULED 1 | 1056 #define CBCH_SCHEDULED 1 |
796 #define CBCH_INACTIVE 2 | 1057 #define CBCH_INACTIVE 2 |
797 | 1058 |
798 /*--------------------------------------------------------*/ | 1059 /*--------------------------------------------------------*/ |
835 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). | 1096 #define CON_EST_MODE1 3 // functional mode in ACCESS (before 1st RA, for TOA convergency). |
836 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). | 1097 #define CON_EST_MODE2 4 // functional mode in ACCESS (after 1st RA). |
837 #define DEDIC_MODE 5 // functional mode in DEDICATED. | 1098 #define DEDIC_MODE 5 // functional mode in DEDICATED. |
838 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. | 1099 #define DEDIC_MODE_HALF_DATA 6 // used only for TOA histogram length purpose. |
839 #if L1_GPRS | 1100 #if L1_GPRS |
840 #define PACKET_TRANSFER_MODE 7 | 1101 #define PACKET_TRANSFER_MODE 7 // |
841 #endif | 1102 #endif |
842 | 1103 |
843 /*--------------------------------------------------------*/ | 1104 /*--------------------------------------------------------*/ |
844 /* Error causes for MPHC_NO_BCCH message. */ | 1105 /* Error causes for MPHC_NO_BCCH message. */ |
845 /*--------------------------------------------------------*/ | 1106 /*--------------------------------------------------------*/ |
846 #define NO_FB_SB 0 // FB or SB not found. | 1107 #define NO_FB_SB 0 // FB or SB not found. |
847 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. | 1108 #define NCC_NOT_PERMITTED 1 // Synchro OK! but PLMN not permitted. |
848 | 1109 |
849 /*--------------------------------------------------------*/ | 1110 /*--------------------------------------------------------*/ |
868 #define CTRL_FB_ABORT (TRUE_L << 9) | 1129 #define CTRL_FB_ABORT (TRUE_L << 9) |
869 #if L1_GPRS | 1130 #if L1_GPRS |
870 #define CTRL_PRACH (TRUE_L << 10) | 1131 #define CTRL_PRACH (TRUE_L << 10) |
871 #define CTRL_SYSINGLE (TRUE_L << 11) | 1132 #define CTRL_SYSINGLE (TRUE_L << 11) |
872 #endif | 1133 #endif |
873 | 1134 #if ((REL99 == 1) && (FF_BHO == 1)) |
1135 #define CTRL_FBSB_ABORT (TRUE_L << 12) | |
1136 #endif | |
874 | 1137 |
875 /********************************/ | 1138 /********************************/ |
876 /* MISC management */ | 1139 /* MISC management */ |
877 /********************************/ | 1140 /********************************/ |
878 #define GSM_CTL 0 // DSP ctrl for a GSM task | 1141 #define GSM_CTL 0 // DSP ctrl for a GSM task |
981 // Values 1,2,3 reserved for "number of measurements". | 1244 // Values 1,2,3 reserved for "number of measurements". |
982 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. | 1245 #define FB_DSP_TASK 5 // Freq. Burst reading task in Idle mode. |
983 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. | 1246 #define SB_DSP_TASK 6 // Sync. Burst reading task in Idle mode. |
984 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. | 1247 #define TCH_FB_DSP_TASK 8 // Freq. Burst reading task in Dedicated mode. |
985 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. | 1248 #define TCH_SB_DSP_TASK 9 // Sync. Burst reading task in Dedicated mode. |
1249 #if ((REL99 == 1) && (FF_BHO == 1)) | |
1250 #define FBSB_DSP_TASK 16 // Freq.+Sync. Burst reading task in Blind Handover. | |
1251 #endif | |
986 #define IDLE1 1 | 1252 #define IDLE1 1 |
987 | 1253 |
988 // Debug tasks | 1254 // Debug tasks |
989 #define CHECKSUM_DSP_TASK 33 | 1255 #define CHECKSUM_DSP_TASK 33 |
990 #define TST_NDB 35 // Checksum DSP->MCU | 1256 #define TST_NDB 35 // Checksum DSP->MCU |
995 // Identifier for measurement, FB / SB search tasks. | 1261 // Identifier for measurement, FB / SB search tasks. |
996 // Values 1,2,3 reserved for "number of measurements". | 1262 // Values 1,2,3 reserved for "number of measurements". |
997 #define TCH_LOOP_A 31 | 1263 #define TCH_LOOP_A 31 |
998 #define TCH_LOOP_B 32 | 1264 #define TCH_LOOP_B 32 |
999 | 1265 |
1000 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) | 1266 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
1001 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) | 1267 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x08DB - 0x800))) |
1002 #else | 1268 #else |
1003 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) | 1269 #define SC_CHKSUM_VER (DB_W_PAGE_0 + (2 * (0x09A0 - 0x800))) |
1004 #endif | 1270 #endif |
1005 | 1271 |
1027 // below values are defined in the file l1_time.h | 1293 // below values are defined in the file l1_time.h |
1028 //#define D_NSUBB_IDLE 296L | 1294 //#define D_NSUBB_IDLE 296L |
1029 //#define D_NSUBB_DEDIC 30L | 1295 //#define D_NSUBB_DEDIC 30L |
1030 #define D_FB_THR_DET_IACQ 0x3333L | 1296 #define D_FB_THR_DET_IACQ 0x3333L |
1031 #define D_FB_THR_DET_TRACK 0x28f6L | 1297 #define D_FB_THR_DET_TRACK 0x28f6L |
1298 | |
1299 #if (RF_FAM == 60) | |
1300 // UPPCosto without dc offset compensation (DSP algo) | |
1301 #define D_DC_OFF_THRES 0x0000L | |
1302 #else | |
1032 #define D_DC_OFF_THRES 0x7fffL | 1303 #define D_DC_OFF_THRES 0x7fffL |
1304 #endif | |
1305 | |
1033 #define D_DUMMY_THRES 17408L | 1306 #define D_DUMMY_THRES 17408L |
1034 #define D_DEM_POND_GEWL 26624L | 1307 #define D_DEM_POND_GEWL 26624L |
1035 #define D_DEM_POND_RED 20152L | 1308 #define D_DEM_POND_RED 20152L |
1036 #define D_HOLE 0L | 1309 #define D_HOLE 0L |
1037 #define D_TRANSFER_RATE 0x6666L | 1310 #define D_TRANSFER_RATE 0x6666L |
1048 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) | 1321 #define D_SD_MIN_THR_TCHFS 15L //(24L *C_POND_RED) |
1049 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) | 1322 #define D_MA_MIN_THR_TCHFS 738L //(1200L *C_POND_RED) |
1050 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) | 1323 #define D_MD_MAX_THR_TCHFS 1700L //(2000L *C_POND_RED) |
1051 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) | 1324 #define D_MD1_MAX_THR_TCHFS 99L //(160L *C_POND_RED) |
1052 | 1325 |
1053 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) | 1326 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38)|| (DSP == 39) |
1054 // Frequency burst definitions | 1327 // Frequency burst definitions |
1055 #define D_FB_MARGIN_BEG 24 | 1328 #define D_FB_MARGIN_BEG 24 |
1056 #define D_FB_MARGIN_END 22 | 1329 #define D_FB_MARGIN_END 22 |
1057 | 1330 |
1058 // V42bis definitions | 1331 // V42bis definitions |
1060 #define D_V42B_SWITCH_MIN 64L | 1333 #define D_V42B_SWITCH_MIN 64L |
1061 #define D_V42B_SWITCH_MAX 250L | 1334 #define D_V42B_SWITCH_MAX 250L |
1062 #define D_V42B_RESET_DELAY 10L | 1335 #define D_V42B_RESET_DELAY 10L |
1063 | 1336 |
1064 // Latencies definitions | 1337 // Latencies definitions |
1065 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) | 1338 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
1066 // C.f. BUG1404 | 1339 // C.f. BUG1404 |
1067 #define D_LAT_MCU_BRIDGE 0x000FL | 1340 #define D_LAT_MCU_BRIDGE 0x000FL |
1068 #else | 1341 #else |
1069 #define D_LAT_MCU_BRIDGE 0x0009L | 1342 #define D_LAT_MCU_BRIDGE 0x0009L |
1070 #endif | 1343 #endif |
1077 // Background Task in GSM mode: Initialization. | 1350 // Background Task in GSM mode: Initialization. |
1078 #define D_GSM_BGD_MGT 0L | 1351 #define D_GSM_BGD_MGT 0L |
1079 | 1352 |
1080 #if (CHIPSET == 4) | 1353 #if (CHIPSET == 4) |
1081 #define D_MISC_CONFIG 0L | 1354 #define D_MISC_CONFIG 0L |
1082 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) | 1355 #elif (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12) || (CHIPSET == 15) |
1356 // This variable is basically used for Samson. If SAMSON should be zero. | |
1357 // A variable for making DSP not go to IDLE3 when DMA is on | |
1083 #define D_MISC_CONFIG 1L | 1358 #define D_MISC_CONFIG 1L |
1084 #else | 1359 #else |
1085 #define D_MISC_CONFIG 0L | 1360 #define D_MISC_CONFIG 0L |
1086 #endif | 1361 #endif |
1087 | 1362 |
1137 #define D_M1_THRES 5 | 1412 #define D_M1_THRES 5 |
1138 #define D_MAX_OVSP_DL 8 | 1413 #define D_MAX_OVSP_DL 8 |
1139 | 1414 |
1140 // d_ra_act: bit field definition | 1415 // d_ra_act: bit field definition |
1141 #define B_F48BLK 5 | 1416 #define B_F48BLK 5 |
1417 #if REL99 | |
1418 #if FF_EMR | |
1419 #define B_F48BLK_DL 6 | |
1420 #endif | |
1421 #endif | |
1422 | |
1142 | 1423 |
1143 // Mask for b_itc information (d_ra_conf) | 1424 // Mask for b_itc information (d_ra_conf) |
1144 #define CE_MASK 0x04 | 1425 #define CE_MASK 0x04 |
1145 | 1426 |
1146 #define D_FACCH_THR 0 | 1427 #define D_FACCH_THR 0 |
1174 #define D_TOA 0 // Time Of Arrival. | 1455 #define D_TOA 0 // Time Of Arrival. |
1175 #define D_PM 1 // Power Measurement. | 1456 #define D_PM 1 // Power Measurement. |
1176 #define D_ANGLE 2 // Angle (AFC correction) | 1457 #define D_ANGLE 2 // Angle (AFC correction) |
1177 #define D_SNR 3 // Signal / Noise Ratio. | 1458 #define D_SNR 3 // Signal / Noise Ratio. |
1178 | 1459 |
1460 #if REL99 | |
1461 #if FF_EMR | |
1462 #define D_CV_BEP 2 | |
1463 #define D_MEAN_BEP_MSW 0 | |
1464 #define D_MEAN_BEP_LSW 1 | |
1465 #endif | |
1466 #endif //L1_R99 | |
1467 | |
1179 // Bit name/position definitions. | 1468 // Bit name/position definitions. |
1469 #define B_JOINT 4 // Chase combining flag | |
1180 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) | 1470 #define B_FIRE0 5 // Fire result bit 0. (00 -> NO ERROR) (01 -> ERROR CORRECTED) |
1181 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) | 1471 #define B_FIRE1 6 // Fire result bit 1. (10 -> ERROR) (11 -> unused) |
1182 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). | 1472 #define B_SCH_CRC 8 // CRC result for SB decoding. (1 for ERROR). |
1183 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). | 1473 #define B_BLUD 15 // Uplink,Downlink data block Present. (1 for PRESENT). |
1184 #define B_AF 14 // Activity bit: 1 if data block is valid. | 1474 #define B_AF 14 // Activity bit: 1 if data block is valid. |
1185 #define B_BFI 2 // Bad Frame Indicator | 1475 #define B_BFI 2 // Bad Frame Indicator |
1186 #define B_UFI 0 // UNRELIABLE FRAME Indicator | 1476 #define B_UFI 0 // UNRELIABLE FRAME Indicator |
1187 #define B_ECRC 9 // Enhanced full rate CRC bit | 1477 #define B_ECRC 9 // Enhanced full rate CRC bit |
1188 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine | 1478 #define B_EMPTY_BLOCK 10 // for voice memo purpose, this bit is used to determine |
1479 | |
1480 #if REL99 | |
1481 #if FF_EMR | |
1482 #define MEAN_BEP_FORMAT 5 // mean_bep is received in F1.31 format from DSP and should be | |
1483 // reported in F6.26 format to L2. | |
1484 #define CV_BEP_FORMAT 5 // cv_bep is received in F3.13 format from DSP and should be | |
1485 // reported in F8.8 format to L2. | |
1486 #define B_SID1 4 // SID1 bit. | |
1487 #define B_M1 0 // M1 bit. | |
1488 #define B_CE 8 // Connection element | |
1489 #define B_FCS_OK 3 // Frame check sequence bit | |
1490 #define WORD_SHIFT 16 // Shift word | |
1491 #endif | |
1492 #endif //L1_R99 | |
1493 | |
1189 | 1494 |
1190 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) | 1495 #if (DEBUG_DEDIC_TCH_BLOCK_STAT == 1) |
1191 #define FACCH_GOOD 10 | 1496 #define FACCH_GOOD 10 |
1192 #define FACCH_BAD 11 | 1497 #define FACCH_BAD 11 |
1193 #endif | 1498 #endif |
1213 #define AMR_INHIBIT 8 | 1518 #define AMR_INHIBIT 8 |
1214 | 1519 |
1215 // List of possible RX types in RATSCCH block | 1520 // List of possible RX types in RATSCCH block |
1216 #define C_RATSCCH_GOOD 5 | 1521 #define C_RATSCCH_GOOD 5 |
1217 | 1522 |
1523 #if REL99 | |
1524 #if FF_EMR | |
1525 #define RATSCCH_GOOD 5 | |
1526 #define RATSCCH_BAD 6 | |
1527 #endif | |
1528 #endif //L1_R99 | |
1529 | |
1530 | |
1531 | |
1218 // List of the possible AMR channel rate | 1532 // List of the possible AMR channel rate |
1219 #define AMR_CHANNEL_4_75 0 | 1533 #define AMR_CHANNEL_4_75 0 |
1220 #define AMR_CHANNEL_5_15 1 | 1534 #define AMR_CHANNEL_5_15 1 |
1221 #define AMR_CHANNEL_5_9 2 | 1535 #define AMR_CHANNEL_5_9 2 |
1222 #define AMR_CHANNEL_6_7 3 | 1536 #define AMR_CHANNEL_6_7 3 |
1223 #define AMR_CHANNEL_7_4 4 | 1537 #define AMR_CHANNEL_7_4 4 |
1224 #define AMR_CHANNEL_7_95 5 | 1538 #define AMR_CHANNEL_7_95 5 |
1225 #define AMR_CHANNEL_10_2 6 | 1539 #define AMR_CHANNEL_10_2 6 |
1226 #define AMR_CHANNEL_12_2 7 | 1540 #define AMR_CHANNEL_12_2 7 |
1541 | |
1227 | 1542 |
1228 // Types of RATSCCH blocks | 1543 // Types of RATSCCH blocks |
1229 #define C_RATSCCH_UNKNOWN 0 | 1544 #define C_RATSCCH_UNKNOWN 0 |
1230 #define C_RATSCCH_CMI_PHASE_REQ 1 | 1545 #define C_RATSCCH_CMI_PHASE_REQ 1 |
1231 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 | 1546 #define C_RATSCCH_AMR_CONFIG_REQ_MAIN 2 |
1264 #define B_TCH_LOOP 12 | 1579 #define B_TCH_LOOP 12 |
1265 #define B_SUBCHANNEL 15 | 1580 #define B_SUBCHANNEL 15 |
1266 | 1581 |
1267 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers. | 1582 // "d_ctrl_abb" bits positions for conditionnal loading of abb registers. |
1268 #define B_RAMP 0 | 1583 #define B_RAMP 0 |
1269 #if ((ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3)) | 1584 #if ((ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3)) |
1270 #define B_BULRAMPDEL 3 // Note: this name is changed | 1585 #define B_BULRAMPDEL 3 // Note: this name is changed |
1271 #define B_BULRAMPDEL2 2 // Note: this name is changed | 1586 #define B_BULRAMPDEL2 2 // Note: this name is changed |
1272 #define B_BULRAMPDEL_BIS 9 | 1587 #define B_BULRAMPDEL_BIS 9 |
1273 #define B_BULRAMPDEL2_BIS 10 | 1588 #define B_BULRAMPDEL2_BIS 10 |
1274 #endif | 1589 #endif |
1590 #if ((RF_FAM == 61) && ((DSP == 38) || (DSP == 39))) | |
1591 #define B_BULRAMPDEL 3 // Note: this name is changed | |
1592 #define B_BULRAMPDEL2 2 // Note: this name is changed | |
1593 #define B_BULRAMPDEL_BIS 9 | |
1594 #define B_BULRAMPDEL2_BIS 10 | |
1595 #endif | |
1275 #define B_AFC 4 | 1596 #define B_AFC 4 |
1276 | 1597 |
1277 // "d_ctrl_system" bits positions. | 1598 // "d_ctrl_system" bits positions. |
1278 #define B_TSQ 0 | 1599 #define B_TSQ 0 |
1279 #define B_BCCH_FREQ_IND 3 | 1600 #define B_BCCH_FREQ_IND 3 |
1280 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. | 1601 #define B_TASK_ABORT 15 // Abort RF tasks for DSP. |
1281 | 1602 #define B_SWH_APPLY_WHITENING 4 // SWH control(enable, disable) |
1603 | |
1604 #if (NEW_SNR_THRESHOLD == 1) && (L1_SAIC == 0) | |
1605 #error "SNR threshold valid only for SAIC build" | |
1606 #endif | |
1607 | |
1608 //SAIC related | |
1609 #define B_SWH 1 /* SWH bit position */ | |
1610 #define B_NEW_POND 2 /* NEW_POND bit position*/ | |
1611 #define B_SWH_DOUBLE_INTERPOLATION 3 /* Single or Double Interpolation*/ | |
1612 #define B_SWH_INTERPOLATE 4 /* interpolate or not*/ | |
1613 #define B_TOA_ALMNT 5 /* New TOA alignment from DSP for non saic mode*/ | |
1614 #define B_SNR_ALMNT 6 /* New SNR threshold set to 1024 for AFC and TOA*/ | |
1615 | |
1616 // DB Area | |
1617 #define B_SAIC_DB 0 | |
1618 #define B_NEW_POND_DB 1 | |
1619 #define B_SWH_DB 4 | |
1620 #define B_SWH_CHANTAP 12 | |
1621 #define SAIC_ENABLE_DB ((0x01 << B_SAIC_DB) | (0x01 << B_NEW_POND_DB)) | |
1622 | |
1623 #if (NEW_SNR_THRESHOLD == 1) | |
1624 #if (ONE_THIRD_INTRPOL ==1 ) | |
1625 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) | |
1626 #else /* ONE_THIRD_INTRPOL == 0*/ | |
1627 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1 << B_SWH_INTERPOLATE) |(1<< B_TOA_ALMNT) | (1 << B_SNR_ALMNT) | |
1628 #endif /* ONE_THIRD_INTRPOL*/ | |
1629 #else /* NEW_SNR_THRESHOLD == 0 */ | |
1630 #if (ONE_THIRD_INTRPOL ==1 ) | |
1631 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)| (1<< B_SWH_DOUBLE_INTERPOLATION)) | (1 << B_SWH_INTERPOLATE) /* added for CQ-95275 & 93303 */ | |
1632 #else | |
1633 #define SAIC_INITIAL_VALUE ((1<< B_SWH)|(1<< B_NEW_POND)) | (1 << B_SWH_INTERPOLATE) | |
1634 #endif//ONE_THIRD_INTRPOL | |
1635 #endif /*NEW_SNR_THRESHOLD*/ | |
1636 #if (FF_L1_FAST_DECODING == 1) | |
1637 #define B_FAST_DECODING_FLAG (5) | |
1638 #define C_FAST_DECODING_CRC_FIRE1 (0x02) | |
1639 | |
1640 /* Fast decoding states */ | |
1641 #define C_FAST_DECODING_NONE 0 | |
1642 #define C_FAST_DECODING_AWAITED 1 | |
1643 #define C_FAST_DECODING_PROCESSING 2 | |
1644 #define C_FAST_DECODING_COMPLETE 3 | |
1645 #define C_FAST_DECODING_FORBIDDEN 4 | |
1646 | |
1647 #endif /* FF_L1_FAST_DECODING */ | |
1648 | |
1649 #if (FF_L1_FAST_DECODING == 1) | |
1650 #define C_BA_PM_MEAS (4) | |
1651 #else | |
1652 #define C_BA_PM_MEAS (2) | |
1653 #endif /* FF_L1_FAST_DECODING */ | |
1654 | |
1655 #if FF_L1_IT_DSP_USF | |
1656 // d_dsp_hint_flag word definition | |
1657 #define B_USF_HINT_ISSUED 0 | |
1658 #define B_NON_USF_HINT_ISSUED 1 | |
1659 #endif | |
1660 #if FF_L1_IT_DSP_DTX | |
1661 // d_fast_dtx_hint word definition- now d_fast_dtx_hint is not used- same as- d_dsp_hint_flag | |
1662 #define B_DTX_HINT_ISSUED 0 | |
1663 #define B_DTX_STATE 1 | |
1664 | |
1665 // d_tch_mode_ext word definition | |
1666 #define B_FAST_DTX_ENABLED 0 | |
1667 #define B_NON_USF_HINT_ISSUED 1 | |
1668 #endif | |
1282 // **************************************************************** | 1669 // **************************************************************** |
1283 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS | 1670 // POLESTAR EVABOARD 3 REGISTERS & ADRESSES DEFINITIONS |
1284 // **************************************************************** | 1671 // **************************************************************** |
1285 | 1672 |
1286 | 1673 |
1287 // DSP ADRESSES | 1674 // DSP ADRESSES |
1288 //-------------------- | 1675 //-------------------- |
1289 | 1676 |
1290 #define DB_SIZE (4*20L) // 4 pages of 20 words... | 1677 #define DB_SIZE (4*20L) // 4 pages of 20 words... |
1291 | 1678 |
1292 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) | 1679 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39) |
1680 #define MCU_API_BASE_ADDRESS 0xFFD00000L | |
1681 #define DSP_API_BASE_ADDRESS 0x800 | |
1293 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long | 1682 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1294 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long | 1683 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1295 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long | 1684 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1296 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long | 1685 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1297 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words | 1686 #define NDB_ADR 0xFFD001A8L // NDB start address : 268 words |
1299 | 1688 |
1300 #if (DSP_DEBUG_TRACE_ENABLE == 1) | 1689 #if (DSP_DEBUG_TRACE_ENABLE == 1) |
1301 #define DB2_R_PAGE_0 0xFFD00184L | 1690 #define DB2_R_PAGE_0 0xFFD00184L |
1302 #define DB2_R_PAGE_1 0xFFD00188L | 1691 #define DB2_R_PAGE_1 0xFFD00188L |
1303 #endif | 1692 #endif |
1693 | |
1694 /* DSP CPU load measurement */ | |
1695 #define DSP_CPU_LOAD_MCU_API_BASE_ADDRESS 0xFFD01DE0L | |
1696 #define DSP_CPU_LOAD_DB_W_PAGE_0 0xFFD01DE0L // DB page 0 write : 4 words long | |
1697 #define DSP_CPU_LOAD_DB_W_PAGE_1 0xFFD01DE8L // DB page 1 write : 4 words long | |
1698 #define DSP_CPU_LOAD_MCU_W_CTRL 0xFFD01DF0L // DSP CPU load feature control | |
1699 #define DSP_CPU_LOAD_MCU_W_TDMA_FN 0xFFD01DF2L // MCU TDMA frame number | |
1700 | |
1304 #else | 1701 #else |
1702 #define MCU_API_BASE_ADDRESS 0xFFD00000L | |
1703 #define DSP_API_BASE_ADDRESS 0x800 | |
1305 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long | 1704 #define DB_W_PAGE_0 0xFFD00000L // DB page 0 write : 20 words long |
1306 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long | 1705 #define DB_W_PAGE_1 0xFFD00028L // DB page 1 write : 20 words long |
1307 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long | 1706 #define DB_R_PAGE_0 0xFFD00050L // DB page 0 read : 20 words long |
1308 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long | 1707 #define DB_R_PAGE_1 0xFFD00078L // DB page 1 read : 20 words long |
1309 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words | 1708 #define NDB_ADR 0xFFD000a0L // NDB start address : 268 words |
1310 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words | 1709 #define PARAM_ADR 0xFFD002b8L // PARAM start address : 57 words |
1710 #endif | |
1711 | |
1712 #if (DSP == 38) || (DSP == 39) | |
1713 // a DB common is used by the GSM and GPRS for the common feature | |
1714 #define DB_COMMON_W_PAGE_0 0xFFD00760L // DB common page 0 | |
1715 #define DB_COMMON_W_PAGE_1 0xFFD00780L // DB common page 1 | |
1311 #endif | 1716 #endif |
1312 | 1717 |
1313 // **************************************************************** | 1718 // **************************************************************** |
1314 // ADC reading definitions | 1719 // ADC reading definitions |
1315 // **************************************************************** | 1720 // **************************************************************** |
1373 #define ICMI_MASK 0x0001 | 1778 #define ICMI_MASK 0x0001 |
1374 #define ACS_MASK 0x00FF | 1779 #define ACS_MASK 0x00FF |
1375 #define THR_MASK 0x003F | 1780 #define THR_MASK 0x003F |
1376 #define HYST_MASK 0x000F | 1781 #define HYST_MASK 0x000F |
1377 #define CMIP_MASK 0x0001 | 1782 #define CMIP_MASK 0x0001 |
1378 #endif | 1783 |
1379 | 1784 #endif |
1785 | |
1786 #if (L1_RF_KBD_FIX == 1) | |
1787 | |
1788 #define FRAME_DURATION 5000 | |
1789 #define CUST_DEBOUNCE_TIME 64 | |
1790 | |
1791 #endif | |
1792 | |
1793 #endif // L1_CONST_H |