FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/audio_cfile/l1audio_abb.c @ 607:262fcce10859
gsm-fw/L1/audio_cfile/*.c: s/ANLG_FAM/ANALOG/
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Fri, 29 Aug 2014 03:34:44 +0000 |
parents | c5286d24539e |
children | 46427440984a |
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606:c5286d24539e | 607:262fcce10859 |
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114 | 114 |
115 #include "abb.h" | 115 #include "abb.h" |
116 | 116 |
117 #include "l1audio_abb.h" | 117 #include "l1audio_abb.h" |
118 | 118 |
119 #if (ANLG_FAM == 11) | 119 #if (ANALOG == 11) |
120 #include "types.h" | 120 #include "types.h" |
121 #include "bspTwl3029_I2c.h" | 121 #include "bspTwl3029_I2c.h" |
122 #include "bspTwl3029_Aud_Map.h" | 122 #include "bspTwl3029_Aud_Map.h" |
123 #include "bspTwl3029_Audio.h" | 123 #include "bspTwl3029_Audio.h" |
124 #endif | 124 #endif |
130 | 130 |
131 #if ((CODE_VERSION == NOT_SIMULATION)&&(L1_AUDIO_MCU_ONOFF == 1)&&(OP_L1_STANDALONE == 1)&&(CHIPSET == 12)) | 131 #if ((CODE_VERSION == NOT_SIMULATION)&&(L1_AUDIO_MCU_ONOFF == 1)&&(OP_L1_STANDALONE == 1)&&(CHIPSET == 12)) |
132 #include "nucleus.h" | 132 #include "nucleus.h" |
133 #endif | 133 #endif |
134 | 134 |
135 #if (ANLG_FAM == 3) | 135 #if (ANALOG == 3) |
136 extern T_L1S_DSP_COM l1s_dsp_com; | 136 extern T_L1S_DSP_COM l1s_dsp_com; |
137 extern void l1_audio_lim_partial_update(); | 137 extern void l1_audio_lim_partial_update(); |
138 | 138 |
139 | 139 |
140 #define MAX_PGA_UL 24 | 140 #define MAX_PGA_UL 24 |
212 * Configuration of VBCTRL1 register | 212 * Configuration of VBCTRL1 register |
213 * | 213 * |
214 */ | 214 */ |
215 void ABB_Audio_Config (UWORD16 data) | 215 void ABB_Audio_Config (UWORD16 data) |
216 { | 216 { |
217 #if (ANLG_FAM == 1) | 217 #if (ANALOG == 1) |
218 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl = ABB_L1_WRITE (VBCTRL, data); | 218 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl = ABB_L1_WRITE (VBCTRL, data); |
219 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3) ) | 219 #elif ((ANALOG == 2) || (ANALOG == 3) ) |
220 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl1 = ABB_L1_WRITE (VBCTRL1, data); | 220 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl1 = ABB_L1_WRITE (VBCTRL1, data); |
221 #endif | 221 #endif |
222 } | 222 } |
223 | 223 |
224 | 224 |
228 * Configuration of VBCTRL2 register | 228 * Configuration of VBCTRL2 register |
229 * | 229 * |
230 */ | 230 */ |
231 void ABB_Audio_Config_2 (UWORD16 data) | 231 void ABB_Audio_Config_2 (UWORD16 data) |
232 { | 232 { |
233 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) | 233 #if ((ANALOG == 2) || (ANALOG == 3)) |
234 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl2 = ABB_L1_WRITE (VBCTRL2, data); | 234 l1s_dsp_com.dsp_ndb_ptr->d_vbctrl2 = ABB_L1_WRITE (VBCTRL2, data); |
235 #endif | 235 #endif |
236 } | 236 } |
237 | 237 |
238 | 238 |
242 * Configuration of VAUDCTRL register | 242 * Configuration of VAUDCTRL register |
243 * | 243 * |
244 */ | 244 */ |
245 void ABB_Audio_Control (UWORD16 data) | 245 void ABB_Audio_Control (UWORD16 data) |
246 { | 246 { |
247 #if (ANLG_FAM == 3) | 247 #if (ANALOG == 3) |
248 l1s_dsp_com.dsp_ndb_ptr->d_vaud_cfg = ABB_L1_WRITE (VAUDCTRL, data); | 248 l1s_dsp_com.dsp_ndb_ptr->d_vaud_cfg = ABB_L1_WRITE (VAUDCTRL, data); |
249 #endif | 249 #endif |
250 } | 250 } |
251 | 251 |
252 | 252 |
256 * Configuration of VAUOCTRL register | 256 * Configuration of VAUOCTRL register |
257 * | 257 * |
258 */ | 258 */ |
259 void ABB_Audio_On_Off (UWORD16 data) | 259 void ABB_Audio_On_Off (UWORD16 data) |
260 { | 260 { |
261 #if (ANLG_FAM == 3) | 261 #if (ANALOG == 3) |
262 l1s_dsp_com.dsp_ndb_ptr->d_vauo_onoff = ABB_L1_WRITE (VAUOCTRL, data); | 262 l1s_dsp_com.dsp_ndb_ptr->d_vauo_onoff = ABB_L1_WRITE (VAUOCTRL, data); |
263 #endif | 263 #endif |
264 } | 264 } |
265 | 265 |
266 | 266 |
270 * Configuration of VAUSCTRL register | 270 * Configuration of VAUSCTRL register |
271 * | 271 * |
272 */ | 272 */ |
273 void ABB_Audio_Volume (UWORD16 data) | 273 void ABB_Audio_Volume (UWORD16 data) |
274 { | 274 { |
275 #if (ANLG_FAM == 3) | 275 #if (ANALOG == 3) |
276 l1s_dsp_com.dsp_ndb_ptr->d_vaus_vol = ABB_L1_WRITE (VAUSCTRL, data); | 276 l1s_dsp_com.dsp_ndb_ptr->d_vaus_vol = ABB_L1_WRITE (VAUSCTRL, data); |
277 #endif | 277 #endif |
278 } | 278 } |
279 | 279 |
280 | 280 |
284 * Configuration of VAUDPLL register | 284 * Configuration of VAUDPLL register |
285 * | 285 * |
286 */ | 286 */ |
287 void ABB_Audio_PLL (UWORD16 data) | 287 void ABB_Audio_PLL (UWORD16 data) |
288 { | 288 { |
289 #if (ANLG_FAM == 3) | 289 #if (ANALOG == 3) |
290 l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll = ABB_L1_WRITE (VAUDPLL, data); | 290 l1s_dsp_com.dsp_ndb_ptr->d_vaud_pll = ABB_L1_WRITE (VAUDPLL, data); |
291 #endif | 291 #endif |
292 } | 292 } |
293 | 293 |
294 | 294 |
298 * Configuration of VBPOP register | 298 * Configuration of VBPOP register |
299 * | 299 * |
300 */ | 300 */ |
301 void ABB_Audio_VBPop (UWORD16 data) | 301 void ABB_Audio_VBPop (UWORD16 data) |
302 { | 302 { |
303 #if (ANLG_FAM == 3) | 303 #if (ANALOG == 3) |
304 l1s_dsp_com.dsp_ndb_ptr->d_vbpop = ABB_L1_WRITE (VBPOP, data); | 304 l1s_dsp_com.dsp_ndb_ptr->d_vbpop = ABB_L1_WRITE (VBPOP, data); |
305 #endif | 305 #endif |
306 } | 306 } |
307 | 307 |
308 | 308 |
312 * Configuration of the delay initialization for POP noise reduction | 312 * Configuration of the delay initialization for POP noise reduction |
313 * | 313 * |
314 */ | 314 */ |
315 void ABB_Audio_Delay_Init (UWORD8 delay) | 315 void ABB_Audio_Delay_Init (UWORD8 delay) |
316 { | 316 { |
317 #if (ANLG_FAM == 3) | 317 #if (ANALOG == 3) |
318 l1s_dsp_com.dsp_ndb_ptr->d_vau_delay_init = delay; | 318 l1s_dsp_com.dsp_ndb_ptr->d_vau_delay_init = delay; |
319 #endif | 319 #endif |
320 } | 320 } |
321 | 321 |
322 | 322 |
516 UWORD16 volume_index; | 516 UWORD16 volume_index; |
517 UWORD16 pga_index; | 517 UWORD16 pga_index; |
518 | 518 |
519 // Read last programmed volume | 519 // Read last programmed volume |
520 //Sundi: change for Triton | 520 //Sundi: change for Triton |
521 #if (ANLG_FAM == 1) || (ANLG_FAM == 2) || (ANLG_FAM == 3) | 521 #if (ANALOG == 1) || (ANALOG == 2) || (ANALOG == 3) |
522 volume_index = (API)((l1s_dsp_com.dsp_ndb_ptr->d_vbdctrl >> 10) & 0x7); | 522 volume_index = (API)((l1s_dsp_com.dsp_ndb_ptr->d_vbdctrl >> 10) & 0x7); |
523 pga_index = (API)((l1s_dsp_com.dsp_ndb_ptr->d_vbdctrl >> 6) & 0xF); | 523 pga_index = (API)((l1s_dsp_com.dsp_ndb_ptr->d_vbdctrl >> 6) & 0xF); |
524 #endif | 524 #endif |
525 | 525 |
526 // Convert volume into gain (dB) | 526 // Convert volume into gain (dB) |
527 return((ABB_DL_volume_read_gain[volume_index] * ABB_DL_PGA_read_gain[pga_index]) >> 15); | 527 return((ABB_DL_volume_read_gain[volume_index] * ABB_DL_PGA_read_gain[pga_index]) >> 15); |
528 } | 528 } |
529 #endif // ANLG_FAM == 3 | 529 #endif // ANALOG == 3 |
530 | 530 |
531 #if (ANLG_FAM == 11) | 531 #if (ANALOG == 11) |
532 // Downlink volume gain read in unsigned Q15 (in VBDCTRL) | 532 // Downlink volume gain read in unsigned Q15 (in VBDCTRL) |
533 const WORD16 L1_audio_abb_DL_volume_read_gain[] = | 533 const WORD16 L1_audio_abb_DL_volume_read_gain[] = |
534 { | 534 { |
535 (WORD16)0x2000 , // 0: -12 dB //omaps00090550 | 535 (WORD16)0x2000 , // 0: -12 dB //omaps00090550 |
536 (WORD16)0x0000 , // 1: Mute //omaps00090550 | 536 (WORD16)0x0000 , // 1: Mute //omaps00090550 |
583 | 583 |
584 void ABB_Audio_On_Off (UWORD16 data) | 584 void ABB_Audio_On_Off (UWORD16 data) |
585 { | 585 { |
586 | 586 |
587 } | 587 } |
588 #endif // ANLG_FAM == 11 | 588 #endif // ANALOG == 11 |
589 | 589 |
590 #endif // CODE_VERSION != SIMULATION | 590 #endif // CODE_VERSION != SIMULATION |
591 | 591 |
592 // Triton Audio ON/OFF Changes | 592 // Triton Audio ON/OFF Changes |
593 #if (CODE_VERSION == SIMULATION)&&(L1_AUDIO_MCU_ONOFF == 1) | 593 #if (CODE_VERSION == SIMULATION)&&(L1_AUDIO_MCU_ONOFF == 1) |