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comparison nuc-fw/bsp/armio.c @ 93:45911ad957fd

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nuc-fw: beginning to integrate TI's BSP code
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 31 Aug 2013 23:43:23 +0000
parents
children 325bbadc0c9c
comparison
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92:f459043fae0c 93:45911ad957fd
1 /*
2 * ARMIO.C
3 *
4 *
5 * Control diagnostic bits
6 *
7 * Reference : GCS207
8 *
9 */
10
11
12 #include "../include/config.h"
13 #include "../include/sys_types.h"
14
15 #include "mem.h"
16 #include "iq.h"
17 #include "armio.h"
18
19 #if 0
20 /* FreeCalypso: abb.h hasn't been integrated yet */
21 #include "abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!!
22 #endif
23
24 #if (CHIPSET != 12)
25 /*
26 * AI_EnableBit
27 *
28 * Enable ARMIO input/output bit (see CLKM module specification)
29 */
30 void AI_EnableBit(int bit)
31 {
32 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit);
33 }
34
35 /*
36 * AI_DisableBit
37 *
38 * Disable ARMIO input/output bit (see CLKM module specification)
39 */
40 void AI_DisableBit(int bit)
41 {
42 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit);
43 }
44
45 #endif /* CHIPSET != 12 */
46
47 /*
48 * AI_SetBit
49 *
50 * Switch-on one bit
51 */
52 void AI_SetBit(int bit)
53 {
54 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit);
55 }
56
57 /*
58 * AI_ResetBit
59 *
60 * Switch-off one bit
61 */
62 void AI_ResetBit(int bit)
63 {
64 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit);
65 }
66
67 /*
68 * AI_ConfigBitAsOutput
69 *
70 * Set this bit as an output
71 */
72 void AI_ConfigBitAsOutput(int bit)
73 {
74 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit);
75 }
76
77 /*
78 * AI_ConfigBitAsInput
79 *
80 * Set this bit as an input
81 */
82 void AI_ConfigBitAsInput(int bit)
83 {
84 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit);
85 }
86
87
88 /*
89 * AI_ReadBit
90 *
91 * Read value in register
92 */
93 SYS_BOOL AI_ReadBit(int bit)
94 {
95 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit))
96 return (1);
97 else
98 return (0);
99 }
100
101 /*
102 * AI_Power
103 *
104 * Switch-on or off the board
105 *
106 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power)
107 * 0 to power-off
108 *
109 */
110 // #if (!OP_L1_STANDALONE)
111 #if 0
112 void AI_Power(SYS_UWORD8 power)
113 {
114 if (power == 0)
115 {
116 ABB_Power_Off();
117 }
118 }
119 #endif
120
121 /*
122 * AI_ResetIoConfig
123 *
124 * Reset all default IO configurations
125 *
126 */
127 void AI_ResetIoConfig(void)
128 {
129 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs
130 #if (CHIPSET != 12)
131 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config
132 #endif /* CHIPSET != 12 */
133 }
134
135
136 /*
137 * AI_ClockEnable
138 *
139 * Enable ARMIO clock module
140 *
141 */
142 void AI_ClockEnable(void)
143 {
144 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5
145 }
146
147 /*
148 * The target-specific AI_InitIOConfig() function will need to go here.
149 */
150
151 /*
152 * AI_SelectIOForIT
153 *
154 * Select which IO will be used to generate an interrupt.
155 * 'Edge' specifies if interrup must be detected on falling or rising edge.
156 *
157 * Warning: parameters are not checked.
158 */
159
160 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge)
161 {
162 #if (CHIPSET == 12)
163 /*
164 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection
165 */
166 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin;
167
168 /*
169 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection
170 */
171 GPIO_INTERRUPT_MASK_REG = 1 << Pin;
172 #else
173 /*
174 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode.
175 */
176
177 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1;
178 #endif
179 }
180
181 #if (CHIPSET != 12)
182 /*
183 * AI_CheckITSource
184 *
185 * Check if the interrupt specified by 'Source' is active or not.
186 *
187 * Output: 0: IT is not active
188 * 1: IT is active
189 *
190 * Warning: parameters are not checked.
191 *
192 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt
193 * must be checked first because the GPIO status bit is reset when
194 * the register is read.
195 */
196
197 int AI_CheckITSource (SYS_UWORD16 Source)
198 {
199 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0);
200 }
201
202 /*
203 * AI_UnmaskIT
204 *
205 * Unmask the IT specified by 'Source' (keyboard or GPIO).
206 *
207 * Warning: parameters are not checked.
208 */
209
210 void AI_UnmaskIT (SYS_UWORD16 Source)
211 {
212 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source;
213 }
214
215 /*
216 * AI_MaskIT
217 *
218 * Mask the IT specified by 'Source' (keyboard or GPIO).
219 *
220 * Warning: parameters are not checked.
221 */
222
223 void AI_MaskIT (SYS_UWORD16 Source)
224 {
225 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source;
226 }
227 #endif /* CHIPSET != 12 */
228
229 #if (CHIPSET == 12)
230
231 void AI_MaskIT(SYS_UWORD16 d_io_number) {
232 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number);
233 } /* f_gpio_mask_it() */
234
235 void AI_UnmaskIT(SYS_UWORD16 d_io_number) {
236 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number);
237 } /* f_gpio_unmask_it() */
238
239 #endif