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nuc-fw: beginning to integrate TI's BSP code
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 31 Aug 2013 23:43:23 +0000
parents
children 4179acab05f7
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92:f459043fae0c 93:45911ad957fd
1 /******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : niq32.c
12
13 Description : Nucleus IQ initializations
14
15 Project : Drivers
16
17 Author : proussel@ti.com Patrick Roussel.
18
19 Version number : 1.12
20
21 Date and time : 02/19/01 14:01:50
22
23 Previous delta : 12/19/00 14:24:51
24
25 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/mod/emu_p/EMU_P_FRED_ADC/drivers1/common/SCCS/s.niq32.c
26
27 Sccs Id (SID) : '@(#) niq32.c 1.12 02/19/01 14:01:50 '
28 *******************************************************************************/
29
30 #include "l1_sw.cfg"
31
32 #if(!OP_L1_STANDALONE)
33 #include "chipset.cfg"
34 #include "debug.cfg"
35 #include "board.cfg"
36 #include "rv_defined_swe.h"
37 #include "rtc_config.h"
38 #endif
39
40 #include "sys_types.h"
41 #include "serialswitch.h"
42
43 #include "mem.h"
44 #include "inth.h"
45 #include "sim.h"
46 #include "abb_inth.h" // for External Interrupt
47
48 #define IQ_H
49 #include "iq.h"
50 #include "ulpd.h"
51
52 #if (defined RVM_DAR_SWE) && (defined _GSM)
53 extern void dar_watchdog_reset(void);
54 #endif
55
56 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 43) || (BOARD == 45))
57 #include "armio.h"
58 #include "uartfax.h"
59 #endif
60
61 /* External declaration */
62 extern void GAUGING_Handler(void);
63 extern void TMT_Timer_Interrupt(void);
64 extern void kpd_key_handler(void);
65 extern void TP_FrameIntHandler(void);
66
67 #if (!OP_L1_STANDALONE)
68 #if (defined RVM_MPM_SWE)
69 extern void MPM_InterruptHandler(void);
70 #endif
71
72 #if (TI_PROFILER == 1)
73 extern void ti_profiler_tdma_action(void);
74 #endif
75
76 extern void RTC_GaugingHandler(void);
77 extern void RTC_ItTimerHandle(void);
78 extern void RTC_ItAlarmHandle(void);
79 #endif
80
81
82
83 /* Global variables */
84 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */
85 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */
86 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */
87 unsigned IQ_DummyCount; /* Used to check if dummy IT */
88 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/
89 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */
90
91 /* add this two variables for imported 188 functions, Jeffrey, 02/26/04 */
92 typedef struct GPIO_HISR_INFO
93 {
94 NU_HISR hisr;
95 char hisr_stack[1024];
96 } T_GPIO_HISR_INFOS;
97
98 static T_GPIO_HISR_INFOS gpio_hisr_infos = {0};
99 int g_interrupt = 0;
100
101 extern void Hall_OC_IntHandler( void ) ;
102
103
104 /*--------------------------------------------------------------*/
105 /* irqHandlers */
106 /*--------------------------------------------------------------*/
107 /* Parameters :none */
108 /* Return : none */
109 /* Functionality : Table of interrupt handlers */
110 /* These MUST be 32-bit entries */
111 /*--------------------------------------------------------------*/
112
113 SYS_FUNC irqHandlers[IQ_NUM_INT] =
114 {
115 IQ_TimerHandler, /* Watchdog timer */
116 IQ_TimerHandler1, /* timer 1 */
117 IQ_TimerHandler2, /* timer 2 */
118 IQ_Dummy, /* AIRQ 3 */
119 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */
120 IQ_Dummy, /* AIRQ 5 */
121 #if (OP_L1_STANDALONE)
122 IQ_Dummy,
123 #else
124 SIM_IntHandler, /* AIRQ 6 */
125 #endif
126 #if ((CHIPSET == 2) || (CHIPSET == 3))
127 SER_uart_handler, /* AIRQ 7 */
128 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
129 SER_uart_modem_handler, /* AIRQ 7 */
130 #endif
131 #if (CHIPSET == 12)
132 IQ_KeypadHandler, /* AIRQ 8 */
133 #else
134 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
135 IQ_KeypadGPIOHandler, /* AIRQ 8 */
136 #else
137 IQ_KeypadHandler, /* AIRQ 8 */
138 #endif
139 #endif
140 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/
141 #if ((CHIPSET == 2) || (CHIPSET == 3))
142 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/
143 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
144 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */
145 #endif
146 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */
147 IQ_External, /* AIRQ 12 */
148 IQ_Dummy, /* AIRQ 13 */
149 IQ_Dummy, /* DMA interrupt */
150 #if (CHIPSET == 4)
151 IQ_Dummy, /* LEAD */
152 IQ_Dummy, /* SIM card-detect fast interrupt */
153 IQ_Dummy, /* External fast interrupt */
154 SER_uart_irda_handler, /* UART IrDA interrupt */
155 IQ_GsmTim_Handler /* ULPD GSM timer */
156 #elif ((CHIPSET == 5) || (CHIPSET == 6))
157 IQ_Dummy, /* LEAD */
158 IQ_Dummy, /* SIM card-detect fast interrupt */
159 IQ_Dummy, /* External fast interrupt */
160 SER_uart_irda_handler, /* UART IrDA interrupt */
161 IQ_GsmTim_Handler, /* ULPD GSM timer */
162 IQ_Dummy, /* Not mapped interrupt */
163 IQ_Dummy, /* Not mapped interrupt */
164 IQ_Dummy, /* Not mapped interrupt */
165 IQ_Dummy, /* Not mapped interrupt */
166 IQ_Dummy /* GEA interrupt */
167 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
168 IQ_Dummy, /* LEAD */
169 IQ_Dummy, /* SIM card-detect fast interrupt */
170 IQ_Dummy, /* External fast interrupt */
171 SER_uart_irda_handler, /* UART IrDA interrupt */
172 IQ_GsmTim_Handler, /* ULPD GSM timer */
173 IQ_Dummy /* GEA interrupt */
174 #elif (CHIPSET == 9)
175 IQ_Dummy, /* LEAD */
176 IQ_Dummy, /* SIM card-detect fast interrupt */
177 IQ_Dummy, /* External fast interrupt */
178 SER_uart_irda_handler, /* UART IrDA interrupt */
179 IQ_GsmTim_Handler, /* ULPD GSM timer */
180 IQ_Dummy, /* Not mapped interrupt */
181 IQ_Dummy, /* Not mapped interrupt */
182 IQ_Dummy, /* Not mapped interrupt */
183 IQ_Dummy, /* Not mapped interrupt */
184 IQ_Dummy /* Reserved */
185 #elif (CHIPSET == 12)
186 IQ_Dummy, /* IRQ15 - LEAD */
187 IQ_Dummy, /* IRQ16 - GPIO */
188 IQ_Dummy, /* IRQ17 - External fast interrupt */
189 SER_uart_irda_handler, /* IRQ18 - UART IrDA interrupt */
190 IQ_GsmTim_Handler, /* IRQ19 - ULPD GSM timer */
191 IQ_Dummy, /* IRQ20 - GEA interrupt */
192 IQ_Dummy, /* IRQ21 - External general Purpose interrupt IRQ1 */
193 IQ_Dummy, /* IRQ22 - External general Purpose interrupt IRQ2 */
194 IQ_Dummy, /* IRQ23 - USIM card insertion/extraction */
195 IQ_Dummy, /* IRQ24 - USIM */
196 IQ_Dummy, /* IRQ25 - LCD */
197 IQ_Dummy, /* IRQ26 - USB */
198 IQ_Dummy, /* IRQ27 - MMC/SD/Memory Stick */
199 SER_uart_modem2_handler,/* IRQ28 - UART_MODEM2 */
200 IQ_Dummy, /* IRQ29 - 2nd level interrupt handler */
201 IQ_Dummy, /* IRQ30 - I2C or uWIRE */
202 IQ_Dummy /* IRQ31 - NAND FLASH */
203 #else
204 IQ_Dummy /* LEAD */
205 #endif
206 };
207
208 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
209 /*--------------------------------------------------------------*/
210 /* fiqHandlers */
211 /*--------------------------------------------------------------*/
212 /* Parameters :none */
213 /* Return :none */
214 /* Functionality : Table of interrupt handlers */
215 /* These MUST be 32-bit entries */
216 /*--------------------------------------------------------------*/
217
218 SYS_FUNC fiqHandlers[IQ_NUM_INT] =
219 {
220 IQ_Dummy, /* Watchdog timer */
221 IQ_Dummy, /* timer 1 */
222 IQ_Dummy, /* timer 2 */
223 IQ_Dummy, /* AIRQ 3 */
224 IQ_Dummy, /* TPU Frame It AIRQ 4 */
225 IQ_Dummy, /* AIRQ 5 */
226 IQ_Dummy, /* AIRQ 6 */
227 IQ_Dummy, /* AIRQ 7 */
228 IQ_Dummy, /* AIRQ 8 */
229 IQ_Dummy, /* AIRQ 9 RTC Timer */
230 IQ_Dummy, /* AIRQ 10 RTC ALARM */
231 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */
232 IQ_Dummy, /* AIRQ 12 */
233 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */
234 IQ_Dummy, /* DMA interrupt */
235 IQ_Dummy, /* LEAD */
236 #if (CHIPSET == 12)
237 IQ_Dummy, /* IRQ16 - GPIO */
238 #else
239 #if (OP_L1_STANDALONE)
240 IQ_Dummy,
241 #else
242 /* glowing, 2004-06-08, replace SIM with Hall according to 188 */
243 Hall_OC_IntHandler, /* glowing,2003-12-18, Hall open-close fast interrupt, it replace SIM_CD_IntHandler */
244 //SIM_CD_IntHandler, /* SIM card-detect fast interrupt */
245 #endif
246 #endif
247 IQ_Dummy, /* External fast interrupt */
248 IQ_Dummy, /* UART_IRDA interrupt */
249 #if (CHIPSET == 4)
250 IQ_Dummy /* ULPD GSM timer */
251 #elif ((CHIPSET == 5) || (CHIPSET == 6))
252 IQ_Dummy, /* ULPD GSM timer */
253 IQ_Dummy, /* Not mapped interrupt */
254 IQ_Dummy, /* Not mapped interrupt */
255 IQ_Dummy, /* Not mapped interrupt */
256 IQ_Dummy, /* Not mapped interrupt */
257 IQ_Dummy /* GEA interrupt */
258 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
259 IQ_Dummy, /* ULPD GSM timer */
260 IQ_Dummy /* GEA timer */
261 #elif (CHIPSET == 9)
262 IQ_Dummy, /* ULPD GSM timer */
263 IQ_Dummy, /* Not mapped interrupt */
264 IQ_Dummy, /* Not mapped interrupt */
265 IQ_Dummy, /* Not mapped interrupt */
266 IQ_Dummy, /* Not mapped interrupt */
267 IQ_Dummy /* Reserved */
268 #elif (CHIPSET == 12)
269 IQ_Dummy, /* IRQ19 - ULPD GSM timer */
270 IQ_Dummy, /* IRQ20 - GEA interrupt */
271 IQ_Dummy, /* IRQ21 - External general Purpose interrupt IRQ1 */
272 IQ_Dummy, /* IRQ22 - External general Purpose interrupt IRQ2 */
273 IQ_Dummy, /* IRQ23 - USIM card insertion/extraction */
274 IQ_Dummy, /* IRQ24 - USIM */
275 IQ_Dummy, /* IRQ25 - LCD */
276 IQ_Dummy, /* IRQ26 - USB */
277 IQ_Dummy, /* IRQ27 - MMC/SD/Memory Stick */
278 IQ_Dummy, /* IRQ28 - UART_MODEM2 */
279 IQ_Dummy, /* IRQ29 - 2nd level interrupt handler */
280 IQ_Dummy, /* IRQ30 - I2C or uWIRE */
281 IQ_Dummy /* IRQ31 - NAND FLASH */
282 #endif
283 };
284 #endif
285
286 /*--------------------------------------------------------------*/
287 /* IQ_Gauging_Handler */
288 /*--------------------------------------------------------------*/
289 /* Parameters :none */
290 /* Return : none */
291 /* Functionality : Handle unused interrupts */
292 /*--------------------------------------------------------------*/
293 void IQ_Gauging_Handler(void)
294 {
295 GAUGING_Handler();
296 #if (!OP_L1_STANDALONE)
297 RTC_GaugingHandler();
298 #endif
299 }
300
301
302 /*--------------------------------------------------------------*/
303 /* IQ_External */
304 /*--------------------------------------------------------------*/
305 /* Parameters : none */
306 /* Return : none */
307 /* Functionality : Handle External IRQ mapped on ABB. */
308 /*--------------------------------------------------------------*/
309 void IQ_External(void)
310 {
311 // Mask external interrupt (12)
312 IQ_Mask(IQ_EXT);
313
314 // The external IRQ is mapped on the ABB interrupt.
315 // The associated HISR ABB_Hisr is activated on reception on the external IRQ.
316 if(Activate_ABB_HISR())
317 {
318 IQ_Unmask(IQ_EXT);
319 }
320 }
321
322 /*--------------------------------------------------------------*/
323 /* IQ_Dummy */
324 /*--------------------------------------------------------------*/
325 /* Parameters :none */
326 /* Return : none */
327 /* Functionality : Handle unused interrupts */
328 /*--------------------------------------------------------------*/
329 void IQ_Dummy(void)
330 {
331 IQ_DummyCount++;
332 }
333
334 /*--------------------------------------------------------------*/
335 /* IQ_RTCHandler */
336 /*--------------------------------------------------------------*/
337 /* Parameters :none */
338 /* Return : none */
339 /* Functionality : Handle RTC Time interrupts */
340 /*--------------------------------------------------------------*/
341
342 void IQ_Rtc_Handler(void)
343 {
344 #if (!OP_L1_STANDALONE)
345 RTC_ItTimerHandle();
346 #endif
347 }
348
349 /*--------------------------------------------------------------*/
350 /* IQ_RtcA_GsmTim_Handler */
351 /*--------------------------------------------------------------*/
352 /* Parameters :none */
353 /* Return : none */
354 /* Functionality : Handle RTC ALARM or GAUGING interrupts */
355 /*--------------------------------------------------------------*/
356
357 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
358 void IQ_RtcA_Handler(void)
359 {
360 #if (!OP_L1_STANDALONE)
361 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
362 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
363 RTC_ItAlarmHandle();
364 #endif
365 }
366
367 void IQ_GsmTim_Handler(void)
368 {
369
370 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
371 {
372 // it is GSM Timer it.....
373 IQ_GsmTimerCount++;
374 }
375 }
376 #else
377 void IQ_RtcA_GsmTim_Handler(void)
378 {
379 #if (!OP_L1_STANDALONE)
380 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
381 {
382 // it is GSM Timer it.....
383 IQ_GsmTimerCount++;
384 }
385 else
386 {
387 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
388 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
389 RTC_ItAlarmHandle();
390 }
391 #endif
392 }
393 #endif
394
395 /*--------------------------------------------------------------*/
396 /* IQ_TimerHandler */
397 /*--------------------------------------------------------------*/
398 /* Parameters :none */
399 /* Return : none */
400 /* Functionality : Handle Timer interrupts */
401 /*--------------------------------------------------------------*/
402 void IQ_TimerHandler(void)
403 {
404 IQ_TimerCount++;
405 TMT_Timer_Interrupt();
406 #if (defined RVM_DAR_SWE) && (defined _GSM)
407 dar_watchdog_reset();
408 #endif
409 }
410
411 /*--------------------------------------------------------------*/
412 /* IQ_FramerHandler */
413 /*--------------------------------------------------------------*/
414 /* Parameters :none */
415 /* Return : none */
416 /* Functionality : Handle Timer interrupts */
417 /*--------------------------------------------------------------*/
418 void IQ_FrameHandler(void)
419 {
420 IQ_FrameCount++;
421 TMT_Timer_Interrupt();
422 TP_FrameIntHandler();
423 #if (!OP_L1_STANDALONE)
424 #if (TI_PROFILER == 1)
425 // TDMA treatment for profiling buffer
426 ti_profiler_tdma_action();
427 #endif
428 #endif
429 }
430
431 /*--------------------------------------------------------------*/
432 /* IQ_TimerHandler1 */
433 /*--------------------------------------------------------------*/
434 /* Parameters :none */
435 /* Return : none */
436 /* Functionality : Handle Timer 1 interrupts */
437 /*--------------------------------------------------------------*/
438 void IQ_TimerHandler1(void)
439 {
440 IQ_TimerCount1++;
441 }
442
443 /*--------------------------------------------------------------*/
444 /* IQ_TimerHandler2 */
445 /*--------------------------------------------------------------*/
446 /* Parameters :none */
447 /* Return : none */
448 /* Functionality : Handle Timer 2 interrupts */
449 /*--------------------------------------------------------------*/
450 void IQ_TimerHandler2(void)
451 {
452 IQ_TimerCount2++;
453 }
454
455 /*--------------------------------------------------------------*/
456 /* IQ_IRQ_isr */
457 /*--------------------------------------------------------------*/
458 /* Parameters :none */
459 /* Return : none */
460 /* Functionality : HHandle IRQ interrupts */
461 /*--------------------------------------------------------------*/
462 void IQ_IRQ_isr(void)
463 {
464 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
465 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */
466 }
467
468 /*--------------------------------------------------------------*/
469 /* IQ_FIQ_isr */
470 /*--------------------------------------------------------------*/
471 /* Parameters :none */
472 /* Return : none */
473 /* Functionality : Handle FIQ interrupts */
474 /*--------------------------------------------------------------*/
475 void IQ_FIQ_isr(void)
476 {
477 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
478 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
479 #endif
480 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */
481 }
482
483 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
484
485 /*--------------------------------------------------------------*/
486 /* IQ_KeypadGPIOHandler */
487 /*--------------------------------------------------------------*/
488 /* Parameters : none */
489 /* Return : none */
490 /* Functionality : Handle keypad and GPIO interrupts */
491 /*--------------------------------------------------------------*/
492 void IQ_KeypadGPIOHandler(void)
493 {
494 #if (!OP_L1_STANDALONE)
495 /*
496 * GPIO interrupt must be checked before the keypad interrupt. The GPIO
497 * status bit is reset when the register is read.
498 */
499
500 g_interrupt = 80;
501 if (AI_CheckITSource (ARMIO_GPIO_INT)) {
502 #if 0
503 #ifdef RVM_MPM_SWE
504 /* check if the SWE has been started */
505 MPM_InterruptHandler ();
506 #else
507 UAF_DTRInterruptHandler ();
508 #endif
509 #endif
510 /* Jeffrey, 02/26/04, add this line from 188 */
511 gpio_handler();
512 }
513
514 if (AI_CheckITSource (ARMIO_KEYPDAD_INT))
515 kpd_key_handler ();
516 #endif
517 }
518
519 /**
520 * function: gpio_handler hall
521 */
522 void gpio_handler(void)
523 {
524 /* 2003/11/01 Robert.Chen for melody interrupt from GPIO1*/
525 /* modify from */
526
527 /*
528 AI_MaskIT(2);
529 */
530
531 /* to */
532 AI_MaskIT(2);
533 /* end Robert.Chen */
534
535 /* Activate HISR to process the key event */
536 NU_Activate_HISR(&gpio_hisr_infos.hisr);
537 }
538
539 /* 2003/11/01 Robert.Chen Melody HISR entry */
540 void MI_Melody_Hisr(void)
541 {
542 MaDevDrv_IntHandler();
543 AI_UnmaskIT(0x02);
544 }
545
546 /**
547 * function: kpd_initialize_keypad_hardware
548 */
549 void Gpio_hisr_initialize(void)
550 {
551 int i;
552
553 /* 2003/11/01 Robert.Chen, modify for Melody HISR */
554 /* modify from */
555 #if 0
556 /* HISR creation */
557 NU_Create_HISR(&gpio_hisr_infos.hisr,
558 "GPIO_HISR",
559 gpio_hisr_entry,
560 2,
561 gpio_hisr_infos.hisr_stack,
562 sizeof(gpio_hisr_infos.hisr_stack));
563
564 AI_UnmaskIT(0x02);
565
566 i = HallOnOff();
567
568 if(i){
569 AI_SelectIOForIT (2, 0);//ARMIO_FALLING_EDGE
570 }
571 else{
572
573 AI_SelectIOForIT (2, 1);//ARMIO_RISING_EDGE
574 }
575 #endif
576 /* to */
577 NU_Create_HISR(&gpio_hisr_infos.hisr,
578 "GPIO_HISR",
579 MI_Melody_Hisr,
580 2,
581 gpio_hisr_infos.hisr_stack,
582 sizeof(gpio_hisr_infos.hisr_stack));
583
584 AI_EnableBit(5); /* MCSI_TXD as GPIO9 */
585 AI_ConfigBitAsInput(9); /* GPIO9 as input pin for YMU765 ~IRQ */
586 AI_SelectIOForIT (9, 0); /* GPIO9 as input, falling edge triggered */
587 AI_UnmaskIT(0x02); /* enable GPIO IRQ */
588
589 /* end modify, Robert.Chen */
590 }
591 /* end of imported functins, Jeffrey, 02/26/04 */
592 /* ---------------------------------------------*/
593
594 #elif ((BOARD == 43) || (BOARD == 45))
595
596 /*--------------------------------------------------------------*/
597 /* IQ_KeypadHandler */
598 /*--------------------------------------------------------------*/
599 /* Parameters :none */
600 /* Return : none */
601 /* Functionality : Handle keypad interrupts */
602 /*--------------------------------------------------------------*/
603 void IQ_KeypadHandler(void)
604 {
605 #if (!OP_L1_STANDALONE)
606 kpd_key_handler ();
607 #endif
608 }
609
610 #endif