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nuc-fw: beginning to integrate TI's BSP code
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Sat, 31 Aug 2013 23:43:23 +0000
parents
children 4179acab05f7
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92:f459043fae0c 93:45911ad957fd
1 /*
2 * SIM.H
3 *
4 * Pole Star SIM
5 *
6 * Target : ARM
7 *
8 * Copyright (c) Texas Instruments 1995-1997
9 *
10 */
11
12 /*
13 * Device addresses - GCS000 (Gemini / Polestar)
14 * HER207 (Hercules)
15 */
16
17 #include "../include/config.h"
18 #include "../include/sys_types.h"
19 #include "../nucleus/nucleus.h"
20
21 /* Flags activation section */
22 /* #define SIM_RETRY by default : NOT ACTIVE */
23 /* #define SIM_DEBUG_TRACE by default : NOT ACTIVE */
24
25
26 #define SIM_CMD (MEM_SIM + 0x00)
27 #define SIM_STAT (MEM_SIM + 0x02)
28 #define SIM_CONF1 (MEM_SIM + 0x04)
29 #define SIM_CONF2 (MEM_SIM + 0x06)
30 #define SIM_IT (MEM_SIM + 0x08)
31 #define SIM_DRX (MEM_SIM + 0x0A)
32 #define SIM_DTX (MEM_SIM + 0x0C)
33 #define SIM_MASK (MEM_SIM + 0x0E)
34
35
36
37 /*
38 * Bit definitions
39 */
40 // control regidter
41 #define SIM_CMD_CRST 0x0001
42 #define SIM_CMD_SWRST 0x0002
43 #define SIM_CMD_STOP 0x0004
44 #define SIM_CMD_START 0x0008
45 #define SIM_CMD_CLKEN 0x0010
46
47 // status register
48 #define SIM_STAT_CD 0x0001 // card present
49 #define SIM_STAT_TXPAR 0x0002 // transmit parity status
50 #define SIM_STAT_FFULL 0x0004 // fifo full
51 #define SIM_STAT_FEMPTY 0x0008 // fifo empty
52
53 // configuration register
54 #define SIM_CONF1_CHKPAR 0x0001 // enable receipt check parity
55 #define SIM_CONF1_CONV 0x0002 // coding convention
56 #define SIM_CONF1_TXRX 0x0004 // SIO line direction
57 #define SIM_CONF1_SCLKEN 0x0008 // enable SIM clock
58 #define SIM_CONF1_RSVD 0x0010 // reserved
59 #define SIM_CONF1_SCLKDIV 0x0020 // SIM clock frquency
60 #define SIM_CONF1_SCLKLEV 0x0040 // SIM clock idle level
61 #define SIM_CONF1_ETU 0x0080 // ETU period
62 #define SIM_CONF1_BYPASS 0x0100 // bypass hardware timers
63 #define SIM_CONF1_SVCCLEV 0x0200
64 #define SIM_CONF1_SRSTLEV 0x0400
65 #define SIM_CONF1_SIOLOW 0x8000 //force SIO to low level
66
67 // interrupt status register
68 #define SIM_IT_NATR 0x0001 // No answer to reset
69 #define SIM_IT_WT 0x0002
70 #define SIM_IT_ITOV 0x0004
71 #define SIM_IT_ITTX 0x0008 // Transmit
72 #define SIM_IT_ITRX 0x0010 // Receipt
73
74 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
75 #define SIM_IT_CD 0x0001 // Card insertion/extraction
76 #else
77 #define SIM_IT_CD 0x0020 // Card insertion/extraction
78 #endif
79
80 // interrupt mask register
81 #define SIM_MASK_NATR 0x0001 // No answer to reset
82 #define SIM_MASK_WT 0x0002
83 #define SIM_MASK_OV 0x0004
84 #define SIM_MASK_TX 0x0008 // Transmit
85 #define SIM_MASK_RX 0x0010 // Receipt
86 #define SIM_MASK_CD 0x0020 // Card insertion/extraction
87
88 // receveid byte register
89 #define SIM_DRX_STATRXPAR 0x0100 // received byte parity status
90
91 // SIM return code OK
92 #define SIM_OK 0
93
94 // SIM return error codes
95 #define SIM_ERR_NOCARD 1
96 #define SIM_ERR_NOINT 2
97 #define SIM_ERR_NATR 3
98 #define SIM_ERR_READ 4
99 #define SIM_ERR_XMIT 5
100 #define SIM_ERR_OVF 6
101 #define SIM_ERR_LEN 7
102 #define SIM_ERR_CARDREJECT 8
103 #define SIM_ERR_WAIT 9
104 #define SIM_ERR_ABNORMAL_CASE1 10
105 #define SIM_ERR_ABNORMAL_CASE2 11
106 #define SIM_ERR_BUFF_OVERFL 12
107
108 // begin of JYT modifications
109 #define SIM_ERR_HARDWARE_FAIL 13
110 // end of JYT modifications
111 #define SIM_ERR_RETRY_FAILURE 14
112
113 #define SIM_SLEEP_NONE 0 // No SIM available
114 #define SIM_SLEEP_DESACT 1 // The Driver is NOT currently in sleep mode (clock is off)
115 #define SIM_SLEEP_ACT 2 // The Driver is currently in sleep mode (clock is on)
116 #define SIM_SLEEP_NOT_ALLOWED 3 // The Driver cannot stop the clock :
117 // The card don't want or the interface is not able
118 // to do it.
119 #define SIM_SLEEP_WAITING_TIME 500 //represent 2.3s of period before entering in sleep mode
120
121 #define SIM_CLK_STOP_MASK 0x0D // Clock Stop mask defined by ETSI 11.11
122 #define SIM_CLK_STOP_NOT_ALLWD 0x00 // see ETSI 11.11 : Clock Stop never allowed
123 #define SIM_CLK_STOP_ALLWD 0x01 // see ETSI 11.11 : No prefered level
124 #define SIM_CLK_STOP_HIGH 0x04 // see ETSI 11.11 : High level only
125 #define SIM_CLK_STOP_LOW 0x08 // see ETSI 11.11 : Low level only
126
127 #if(ANALOG == 1)
128 //OMEGA specific definitions
129 #define MODE5V_OMEGA 0x06 // used in SIM_SwitchVolt
130 #define MODE_INIT_OMEGA_3V 0x05 // used in SIM_StartVolt
131 #define MODE_INIT_OMEGA_5V 0x07 // unused !!!!
132 #define MODE3V_OMEGA 0x01 // unused !!!!
133 #define MODE_DIS_SIMLDOEN 0xDF // used in SIM_PowerOff
134 #define MODE_DIS_SIMEN 0xFD // used in SIM_PowerOff
135 #define MODE_ENA_SIMLDOEN 0x20 // used in SIM_ManualStart
136 #define MODE_ENA_SIMEN 0x02 // used in SIM_ManualStart
137 #elif(ANALOG == 2)
138 //IOTA specific definitions
139 #define MODE1_8V_IOTA 0x00
140 #define MODE_INIT_IOTA_3V 0x03
141 #define MODE_INIT_IOTA_1_8V 0x02
142 #define MODE3V_IOTA 0x01
143 #define MODE_DIS_SIMLDOEN 0xFC // SIMSEL + Regulator RSIMEN
144 #define MODE_DIS_SIMEN 0xF7
145 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
146 #define MODE_ENA_SIMEN 0x08
147 #elif(ANALOG == 3)
148 //SYREN specific definitions
149 #define MODE1_8V_SYREN 0x00
150 #define MODE_INIT_SYREN_3V 0x03
151 #define MODE_INIT_SYREN_1_8V 0x02
152 #define MODE3V_SYREN 0x01
153 #define MODE_DIS_SIMLDOEN 0x1FC // SIMSEL + Regulator RSIMEN
154 #define MODE_DIS_SIMEN 0x1F7
155 #define MODE_ENA_SIMLDOEN 0x03 // SIMSEL + Regulator RSIMEN
156 #define MODE_ENA_SIMEN 0x08
157 #endif
158
159 // define type of interface if not defined
160 // 5V only ME SIM_TYPE = 0
161 // 3V technology ME SIM_TYPE = 1
162 // 3V only ME SIM_TYPE = 2
163 // 1.8V technology ME SIM_TYPE = 3 // JYT, 29/01/02, from new specs IOTA
164 // 1.8V Only ME SIM_TYPE = 4 // JYT, 29/01/02, from new specs IOTA
165
166 #define SIM_TYPE_5V 0
167 #define SIM_TYPE_3_5V 1
168 #define SIM_TYPE_3V 2
169 #define SIM_TYPE_1_8_3V 3
170 #define SIM_TYPE_1_8V 4
171
172 //default configuration
173 #ifndef SIM_TYPE
174 #if((ANALOG == 2) || (ANALOG == 3))
175 // Until now (20/03/2003), it is impossible to test IOTA or SYREN with 1.8V Sim Card,
176 // so SIM drv is configured in 3V only with IOTA.and SYREN
177 // When 1.8V Sim Card will be delivered and tested on IOTA and SYREN, then Sim driver will pass
178 // to : #define SIM_TYPE SIM_TYPE_1_8_3V
179 #define SIM_TYPE SIM_TYPE_3V
180 #else
181 #define SIM_TYPE SIM_TYPE_3_5V
182 #endif
183 #endif
184
185 // begin of modifications of JYT
186
187 #if((ANALOG == 2) || (ANALOG == 3))
188 #define SIM_MASK_INFO_VOLT 0x70
189 #else
190 #define SIM_MASK_INFO_VOLT 0x10
191 #endif
192
193 #define SIM_1_8V 0x30
194 #define SIM_3V 0x10
195 #define SIM_5V 0x00
196
197 // end of modifications of JYT
198
199 // Max size of Answer to Reset (GSM11.11 5.7.1)
200 #define MAX_ATR_SIZE 33
201
202 // GSM Instruction Class (GSM 11.11 SIM spec)
203 #define GSM_CLASS 0xA0
204
205 // SIM Instruction Codes
206 #define SIM_SELECT 0xA4
207 #define SIM_STATUS 0xF2
208 #define SIM_READ_BINARY 0xB0
209 #define SIM_UPDATE_BINARY 0xD6
210 #define SIM_READ_RECORD 0xB2
211 #define SIM_UPDATE_RECORD 0xDC
212 #define SIM_SEEK 0xA2
213 #define SIM_INCREASE 0x32
214 #define SIM_VERIFY_CHV 0x20
215 #define SIM_CHANGE_CHV 0x24
216 #define SIM_DISABLE_CHV 0x26
217 #define SIM_ENABLE_CHV 0x28
218 #define SIM_UNBLOCK_CHV 0x2C
219 #define SIM_INVALIDATE 0x04
220 #define SIM_REHABILITATE 0x44
221 #define SIM_RUN_GSM_ALGO 0x88
222 #define SIM_GET_RESPONSE 0xC0
223 #define SIM_TERMINAL_PROFILE 0x10
224 #define SIM_FETCH 0x12
225 #define SIM_TERMINAL_RESPONSE 0x14
226 #define SIM_ENVELOPE 0xC2
227
228
229
230 // SIM file identifiers
231 #define MF 0x3F00
232 #define EF_ICCID 0x2FE2
233 #define DF_GSM 0x7F20
234 #define DF_DCS1800 0x7F21
235 #define EF_LP 0x6F05
236 #define EF_IMSI 0x6F07
237 #define EF_KC 0x6F20
238 #define EF_PLMNSEL 0x6F30
239 #define EF_HPLMN 0x6F31
240 #define EF_ACMAX 0x6F37
241 #define EF_SST 0x6F38
242 #define EF_ACM 0x6F39
243 #define EF_PUCT 0x6F41
244 #define EF_CBMI 0x6F45
245 #define EF_BCCH 0x6F74
246 #define EF_ACC 0x6F78
247 #define EF_FPLMN 0x6F7B
248 #define EF_LOCI 0x6F7E
249 #define EF_AD 0x6FAD
250 #define EF_PHASE 0x6FAE
251 #define DF_TELECOM 0x7F10
252 #define EF_ADN 0x6F3A
253 #define EF_FDN 0x6F3B
254 #define EF_SMS 0x6F3C
255 #define EF_CCP 0x6F3D
256 #define EF_MSISDN 0x6F40
257 #define EF_SMSP 0x6F42
258 #define EF_SMSS 0x6F43
259 #define EF_LND 0x6F44
260 #define EF_EXT1 0x6F4A
261 #define EF_EXT2 0x6F4B
262 #define EF_ECC 0x6FB7
263
264
265 #define MASK_INS 0xFE
266 #define MASK_CMD 0x11
267 #define MASK_RST 0x10
268
269
270 // Buffer sizes
271 #define RSIMBUFSIZE 256
272 #define RSIZESW1SW2 2
273 #define XSIMBUFSIZE 256
274
275 // Structures
276 typedef struct
277 {
278 volatile unsigned short cmd;
279 volatile unsigned short stat;
280 volatile unsigned short conf1;
281 volatile unsigned short conf2;
282 volatile unsigned short it;
283 volatile unsigned short rx;
284 volatile unsigned short tx;
285 volatile unsigned short maskit;
286 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
287 volatile unsigned short it_cd;
288 #endif
289 } SIM_CONTROLLER;
290
291
292 typedef struct
293 {
294 SIM_CONTROLLER *c;
295 SYS_UWORD8 *xIn; // xmit input pointer
296 SYS_UWORD8 *xOut; // xmit output pointer
297 unsigned errorSIM; // code return in case of error detectd
298 unsigned short conf1; // image of the configuration register - avoids read/mod/write cycles
299 volatile unsigned short txParityErr;
300 unsigned short rxParityErr; // if 0 no parity error on receipt, 1 if...
301 SYS_UWORD8 Freq_Algo; //use to determine which sim clk freq to choose for running GSM algo
302 SYS_UWORD8 PTS_Try; //use to calculate how many PTS try were already done
303 SYS_UWORD8 FileC; //value of File Characteristic
304 SYS_UWORD16 etu9600;
305 SYS_UWORD16 etu400;
306 SYS_UWORD16 startclock; //744 clock cycle translated in ETU
307 SYS_UWORD16 stopclock; //1860 clock cycle translated in ETU
308 SYS_UWORD8 moderx; //inform that we are in receive mode
309 // 0 : mode of normal reception without procedure
310 // 1 : mode of wait for acknowledge during reception of char
311 // 2 : mode of reception of data by bloc
312 // 3 : mode of reception of data char by char (proc char)
313 // 4 : mode of reception of data char by char (data)
314 // 5 : mode of reception of procedure char SW1/SW2
315 // 6 : mode of wait for acknowledge char after transmission of char
316 SYS_UWORD16 expected_data; //number of expected char in receive mode proc char
317 SYS_UWORD8 ack; //acknowledge char
318 SYS_UWORD8 null_received; //indicates if a NULL char was received
319 SYS_UWORD8 hw_mask; //mask used because of pole112 hw prb
320
321 SYS_UWORD8 rbuf[RSIMBUFSIZE];
322 SYS_UWORD8 rx_index; // receive index on rbuf buffer
323
324 SYS_UWORD8 xbuf[XSIMBUFSIZE];
325 SYS_UWORD8 rSW12[RSIZESW1SW2]; //buffer to store SW1 and SW2
326 SYS_UWORD8 SWcount; //static counter
327
328 void (*InsertFunc)(void);
329 void (*RemoveFunc)(void);
330 }
331 SIM_PORT;
332
333 typedef struct
334 {
335 SYS_UWORD8 Inverse;
336 SYS_UWORD8 AtrSize;
337 SYS_UWORD8 AtrData[MAX_ATR_SIZE];
338 } SIM_CARD;
339
340
341 /*
342 * Prototypes
343 */
344 void SIM_IntHandler(void);
345 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
346 void SIM_CD_IntHandler(void);
347 #endif
348 void SIM_WriteBuffer(SIM_PORT *p, SYS_UWORD16 offset, SYS_UWORD16 n);
349 SYS_UWORD16 SIM_Command(SIM_PORT *p, SYS_UWORD16 n, SYS_UWORD8 *rP, SYS_UWORD8 *lP);
350 SYS_UWORD16 SIM_Dummy(void);
351 void SIM_InitLog(void);
352
353 void SIM_Init(void (Insert(void)), void (Remove(void)));
354 void SIM_Initialize(void);
355 SYS_UWORD16 SIM_Register(void (Insert(void)), void (Remove(void)));
356 SYS_UWORD16 SIM_Reset(SIM_CARD *c);
357
358 SYS_UWORD16 SIM_Select(SYS_UWORD16 id, SYS_UWORD8 *dat, SYS_UWORD8 *size);
359 SYS_UWORD16 SIM_Status(SYS_UWORD8 *dat, SYS_UWORD8 *size);
360 SYS_UWORD16 SIM_ReadBinary(SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD8 len, SYS_UWORD8 *size);
361 SYS_UWORD16 SIM_UpdateBinary(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD16 offset, SYS_UWORD8 len, SYS_UWORD8 *size);
362 SYS_UWORD16 SIM_ReadRecord(SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD8 len, SYS_UWORD8 *size);
363 SYS_UWORD16 SIM_UpdateRecord(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 recNum, SYS_UWORD8 len, SYS_UWORD8 *size);
364 SYS_UWORD16 SIM_Seek(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 mode, SYS_UWORD8 len, SYS_UWORD8 *size);
365 SYS_UWORD16 SIM_Increase(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 *size);
366
367 // Authentication
368 SYS_UWORD16 SIM_VerifyCHV(SYS_UWORD8 *result, SYS_UWORD8 *chv, SYS_UWORD8 chvType, SYS_UWORD8 *size);
369 SYS_UWORD16 SIM_ChangeCHV(SYS_UWORD8 *result,SYS_UWORD8 *oldChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD8 *size);
370 SYS_UWORD16 SIM_DisableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 *size);
371 SYS_UWORD16 SIM_EnableCHV(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 *size);
372 SYS_UWORD16 SIM_UnblockCHV(SYS_UWORD8 *result, SYS_UWORD8 *unblockChv, SYS_UWORD8 *newChv, SYS_UWORD8 chvType, SYS_UWORD8 *size);
373
374 SYS_UWORD16 SIM_Invalidate(SYS_UWORD8 *rP, SYS_UWORD8 *size);
375 SYS_UWORD16 SIM_Rehabilitate(SYS_UWORD8 *rP, SYS_UWORD8 *size);
376 SYS_UWORD16 SIM_RunGSMAlgo(SYS_UWORD8 *result, SYS_UWORD8 *rand, SYS_UWORD8 *size);
377 SYS_UWORD16 SIM_GetResponse(SYS_UWORD8 *dat, SYS_UWORD8 len, SYS_UWORD8 *size);
378
379 SYS_UWORD16 SIM_TxParityErrors();
380
381 SYS_UWORD16 SIM_TerminalProfile(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 len, SYS_UWORD8 *rcvSize);
382 SYS_UWORD16 SIM_Fetch(SYS_UWORD8 *result, SYS_UWORD8 len, SYS_UWORD8 *rcvSize);
383 SYS_UWORD16 SIM_TerminalResponse(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 len, SYS_UWORD8 *rcvSize);
384 SYS_UWORD16 SIM_Envelope(SYS_UWORD8 *result, SYS_UWORD8 *dat, SYS_UWORD8 len, SYS_UWORD8 *rcvSize);
385
386
387 SYS_UWORD16 SIM_WaitReception(SIM_PORT *p);
388 void SIM_PowerOff(void);
389 void SIM_Interpret_FileCharacteristics(SIM_PORT *p);
390 SYS_UWORD16 SIM_PTSprocedure(SIM_CARD *cP, SIM_PORT *p);
391 void SIM_WARMReset (SIM_PORT *p);
392 void SIM_SleepMode_In(SYS_UWORD32 param);
393 void SIM_SleepMode_Out(SIM_PORT *p);
394 SYS_UWORD8 SIM_GetFileCharacteristics(SIM_PORT *p);
395 SYS_UWORD16 SIM_ATRdynamictreatement (SIM_PORT *p, SIM_CARD *c);
396 SYS_UWORD16 SIM_Waitforchars (SIM_PORT *p, SYS_UWORD16 max_wait);
397 void SIM_Calcetu (SIM_PORT *p);
398 SYS_UWORD8 SIM_Translate_atr_char (SYS_UWORD8 input, SIM_CARD *cP);
399
400
401 SYS_UWORD8 SIM_StartVolt (void);
402 SYS_UWORD8 SIM_SwitchVolt (void);
403
404 SYS_UWORD16 SIM_ManualStart (SIM_PORT *p);
405 SYS_UWORD8 SIM_Memcpy(SYS_UWORD8 *Buff_target, SYS_UWORD8 Buff_source[], SYS_UWORD8 len);
406 SYS_BOOL SIM_SleepStatus(void);
407
408 /*
409 * Global variables
410 */
411 #ifdef SIM_C
412 #define SI_GLOBAL
413 #else
414 #define SI_GLOBAL extern
415 #endif
416
417
418 SI_GLOBAL SIM_PORT Sim[1];
419 SI_GLOBAL NU_TIMER SIM_timer;
420 SI_GLOBAL STATUS status_os_sim;
421 SI_GLOBAL SYS_UWORD8 SIM_sleep_status;
422