FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/bsp/abb+spi/abb_core_inth.c @ 148:63750f70796d
gsm-fw/bsp/abb+spi: initial import from the Leonardo TCS211 version
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sat, 16 Nov 2013 19:03:37 +0000 |
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children | eba29cb0526c |
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147:4ac657b95f52 | 148:63750f70796d |
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1 /**********************************************************************************/ | |
2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */ | |
3 /* */ | |
4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */ | |
5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This */ | |
6 /* product is protected under copyright law and trade secret law as an */ | |
7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All */ | |
8 /* rights reserved. */ | |
9 /* */ | |
10 /* */ | |
11 /* Filename : abb_core_inth.c */ | |
12 /* */ | |
13 /* Description : Functions to manage the ABB device interrupt. */ | |
14 /* The Serial Port Interface is used to connect the TI */ | |
15 /* Analog BaseBand (ABB). */ | |
16 /* It is assumed that the ABB is connected as the SPI */ | |
17 /* device 0, and ABB interrupt is mapped as external IT. */ | |
18 /* */ | |
19 /* Author : Pascal PUEL */ | |
20 /* */ | |
21 /* Version number : 1.2 */ | |
22 /* */ | |
23 /* Date and time : 07/02/03 */ | |
24 /* */ | |
25 /* Previous delta : Creation */ | |
26 /* */ | |
27 /**********************************************************************************/ | |
28 /* */ | |
29 /* 17/12/03 */ | |
30 /* The original abb_inth.c has been splitted between the actual abb_inth.c */ | |
31 /* located in drv_apps directory and abb_inth_core.c located in drv_core */ | |
32 /* directory. */ | |
33 /* */ | |
34 /**********************************************************************************/ | |
35 | |
36 #include "l1sw.cfg" | |
37 #include "chipset.cfg" | |
38 #include "swconfig.cfg" | |
39 #include "sys.cfg" | |
40 | |
41 #include "l1_macro.h" | |
42 #include "l1_confg.h" | |
43 #include <string.h> | |
44 #include "abb/abb_core_inth.h" | |
45 #include "nucleus.h" | |
46 | |
47 #if (OP_L1_STANDALONE == 0) | |
48 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE | |
49 #endif | |
50 | |
51 #if (OP_L1_STANDALONE == 1) | |
52 #include "l1_types.h" | |
53 #endif | |
54 | |
55 #if (CHIPSET == 12) | |
56 #include "sys_inth.h" | |
57 #else | |
58 #include "inth/iq.h" | |
59 #endif | |
60 | |
61 #include "cust_os.h" | |
62 #include "l1_signa.h" | |
63 #include "abb/abb.h" | |
64 | |
65 #if(OP_L1_STANDALONE == 0) | |
66 #include "rvm/rvm_use_id_list.h" // for SPI_USE_ID | |
67 #include "spi/spi_env.h" | |
68 #include "spi/spi_process.h" // for ABB_EXT_IRQ_EVT | |
69 #include "power/power.h" | |
70 #endif /* (OP_L1_STANDALONE == 0) */ | |
71 | |
72 | |
73 | |
74 // Size of the HISR stack associated to the ABB interrupt | |
75 #define ABB_HISR_STACK_SIZE (512) | |
76 | |
77 static NU_HISR ABB_Hisr; | |
78 static char ABB_HisrStack[ABB_HISR_STACK_SIZE]; | |
79 | |
80 | |
81 | |
82 /*-----------------------------------------------------------------------*/ | |
83 /* Create_ABB_HISR() */ | |
84 /* */ | |
85 /* This function is called from Layer1 during initialization process */ | |
86 /* to create the HISR associated to the ABB External Interrupt. */ | |
87 /* */ | |
88 /*-----------------------------------------------------------------------*/ | |
89 void Create_ABB_HISR(void) | |
90 { | |
91 // Fill the entire stack with the pattern 0xFE | |
92 memset (ABB_HisrStack, 0xFE, sizeof(ABB_HisrStack)); | |
93 | |
94 // Create the HISR which is called when an ABB interrupt is received. | |
95 NU_Create_HISR(&ABB_Hisr, "EXT_HISR", EXT_HisrEntry, 2, ABB_HisrStack, sizeof(ABB_HisrStack)); // lowest prty | |
96 } | |
97 | |
98 | |
99 | |
100 | |
101 /*-----------------------------------------------------------------------*/ | |
102 /* Activate_ABB_HISR() */ | |
103 /* */ | |
104 /* This function is called from the interrupt handler to activate */ | |
105 /* the HISR associated to the ABB External Interrupt. */ | |
106 /* */ | |
107 /*-----------------------------------------------------------------------*/ | |
108 SYS_BOOL Activate_ABB_HISR(void) | |
109 { | |
110 if(NU_SUCCESS != NU_Activate_HISR(&ABB_Hisr)) | |
111 { | |
112 return 1; | |
113 } | |
114 return 0; | |
115 } | |
116 | |
117 | |
118 | |
119 /*-----------------------------------------------------------------------*/ | |
120 /* EXT_HisrEntry() */ | |
121 /* */ | |
122 /* This function is called when an ABB interrupt (external interrupt) */ | |
123 /* is received. */ | |
124 /* In a "L1_STANDALONE" environment, this IT is related to ADC. */ | |
125 /* In a complete system, this IT can have several causes. In that case, */ | |
126 /* it sends a message to the SPI task, to handle the IT in calling a */ | |
127 /* callback function. */ | |
128 /* */ | |
129 /*-----------------------------------------------------------------------*/ | |
130 void EXT_HisrEntry(void) | |
131 { | |
132 #if (OP_L1_STANDALONE == 1) | |
133 // New code in order to test the ADC with the L1 standalone | |
134 UWORD16 data ; | |
135 xSignalHeaderRec *adc_msg; | |
136 | |
137 // Call to the low-level driver function to read the interrupt status register. | |
138 data = ABB_Read_Register_on_page(PAGE1, ITSTATREG); | |
139 | |
140 if(data & ADCEND_IT_STS) // end of ADC | |
141 { | |
142 adc_msg = os_alloc_sig(sizeof(T_CST_ADC_RESULT)); | |
143 if(adc_msg != NU_NULL) | |
144 { | |
145 adc_msg->SignalCode = CST_ADC_RESULT; | |
146 ABB_Read_ADC(&((T_CST_ADC_RESULT *)(adc_msg->SigP))->adc_result[0]); | |
147 os_send_sig(adc_msg, RRM1_QUEUE); | |
148 } | |
149 } | |
150 | |
151 #if (CHIPSET == 12) | |
152 // Unmask ABB ext interrupt | |
153 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
154 #else | |
155 // Unmask external (ABB) interrupt | |
156 IQ_Unmask(IQ_EXT); | |
157 #endif | |
158 #endif | |
159 | |
160 #if (OP_L1_STANDALONE == 0) | |
161 T_RV_HDR *msgPtr; | |
162 | |
163 if(SPI_GBL_INFO_PTR != NULL) | |
164 { | |
165 if(SPI_GBL_INFO_PTR->SpiTaskReady != FALSE) | |
166 { | |
167 if(rvf_get_buf (SPI_GBL_INFO_PTR->prim_id, sizeof (T_RV_HDR),(void **) &msgPtr) == RVF_RED) | |
168 { | |
169 rvf_send_trace ("SPI ERROR: ABB IQ External not possible. Reason: Not enough memory", | |
170 66, | |
171 NULL_PARAM, | |
172 RV_TRACE_LEVEL_ERROR, | |
173 SPI_USE_ID); | |
174 | |
175 /* Unmask External interrupt */ | |
176 #if (CHIPSET == 12) | |
177 // Unmask ABB ext interrupt | |
178 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
179 #else | |
180 // Unmask external (ABB) interrupt | |
181 IQ_Unmask(IQ_EXT); | |
182 #endif | |
183 } | |
184 else // enough memory => normal processing : a message is sent to the SPI task. | |
185 { | |
186 msgPtr->msg_id = ABB_EXT_IRQ_EVT; | |
187 msgPtr->dest_addr_id = SPI_GBL_INFO_PTR->addr_id; | |
188 msgPtr->callback_func = (CALLBACK_FUNC) spi_abb_read_int_reg_callback; | |
189 | |
190 rvf_send_msg (SPI_GBL_INFO_PTR->addr_id, msgPtr); | |
191 } | |
192 } | |
193 else // SpiTaskReady is false | |
194 { | |
195 rvf_send_trace("ABB IQ External not possible. Reason: SPI Task not ready",56, NULL_PARAM, | |
196 RV_TRACE_LEVEL_ERROR, SPI_USE_ID); | |
197 | |
198 /* Unmask External interrupt */ | |
199 #if (CHIPSET == 12) | |
200 // Unmask ABB ext interrupt | |
201 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
202 #else | |
203 // Unmask external (ABB) interrupt | |
204 IQ_Unmask(IQ_EXT); | |
205 #endif | |
206 } | |
207 } | |
208 else // SPI_GBL_INFO_PTR = NULL | |
209 { | |
210 rvf_send_trace("ABB IQ External ERROR. Reason: SPI task not started",51, NULL_PARAM, | |
211 RV_TRACE_LEVEL_ERROR, SPI_USE_ID); | |
212 | |
213 /* Unmask External interrupt */ | |
214 #if (CHIPSET == 12) | |
215 // Unmask ABB ext interrupt | |
216 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); | |
217 #else | |
218 // Unmask external (ABB) interrupt | |
219 IQ_Unmask(IQ_EXT); | |
220 #endif | |
221 } | |
222 #endif | |
223 } |