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comparison gsm-fw/L1/tpudrv/tpudrv61.c @ 576:660e83f13cab

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gsm-fw/L1/tpudrv: tpudrv.c and tpudrv61.[ch] imported from LoCosto source
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Mon, 11 Aug 2014 04:45:42 +0000
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575:1d7a12925b8e 576:660e83f13cab
1 /****************** Revision Controle System Header ***********************
2 * GSM Layer 1 software
3 * Copyright (c) Texas Instruments 1998
4 *
5 * Filename tpudrv61.c
6 * Version 1.0
7 * Date May 27th, 2005
8 *
9 ****************** Revision Controle System Header ***********************/
10
11 #define TPUDRV61_C
12
13 #include "rf.cfg"
14 #include "drp_api.h"
15
16 #include "l1_macro.h"
17 #include "l1_confg.h"
18 #include "l1_const.h"
19 #include "l1_types.h"
20 #if TESTMODE
21 #include "l1tm_defty.h"
22 #endif
23 #if (AUDIO_TASK == 1)
24 #include "l1audio_const.h"
25 #include "l1audio_cust.h"
26 #include "l1audio_defty.h"
27 #endif
28 #if (L1_GTT == 1)
29 #include "l1gtt_const.h"
30 #include "l1gtt_defty.h"
31 #endif
32 #if (L1_MP3 == 1)
33 #include "l1mp3_defty.h"
34 #endif
35 #if (L1_MIDI == 1)
36 #include "l1midi_defty.h"
37 #endif
38
39 #if (L1_AAC == 1)
40 #include "l1aac_defty.h"
41 #endif
42
43 #include "l1_defty.h"
44 #include "l1_time.h"
45 #include "l1_ctl.h"
46 #include "tpudrv.h"
47 #include "tpudrv61.h"
48 #include "l1_rf61.h"
49
50 #include "mem.h"
51
52 #include "armio.h"
53 #include "clkm.h"
54
55 #if (L1_RF_KBD_FIX == 1)
56 #include "l1_varex.h"
57 #endif
58
59 extern const UWORD8 drp_ref_sw[] ;
60 extern T_DRP_REGS_STR *drp_regs;
61 extern T_DRP_SRM_API* drp_srm_api;
62
63
64 // Global variables
65 extern T_L1_CONFIG l1_config;
66 extern UWORD16 AGC_TABLE[];
67 extern UWORD16 *TP_Ptr;
68 #if (L1_FF_MULTIBAND == 1)
69 extern const WORD8 rf_subband2band[RF_NB_SUBBANDS];
70 #endif
71
72 static WORD8 rf_index; // index into rf_path[]
73
74 #if( L1_TPU_DEV == 1)
75 WORD16 rf_rx_tpu_timings[NB_TPU_TIMINGS] =
76 {
77 // - RX up:
78 // The times below are offsets to when the 1st bit is at antenna
79 // Burst data comes here
80 (PROVISION_TIME - 203 - DLT_4B - rdt ), // TRF_R1 Set RX Synth channel
81 //l1dmacro_adc_read_rx() called here requires ~ 16 tpuinst
82 (PROVISION_TIME - 197 - DLT_4B - rdt ), // TRF_R2 Select the AGC & LNA gains
83 (PROVISION_TIME - 190 - DLT_4B - rdt ) , // TRF_R3 RX_ON
84 (PROVISION_TIME - 39 - DLT_1 - rdt ), // TRF_R4 Set RF switch for RX in selected band
85 (PROVISION_TIME - 19 - DLT_1), // TRF_R5 Enable RX_START
86 ( -20 - DLT_4B ), // TRF_R6 Disable RX Start and RF switch
87 // TRF_R6 not use, warning timing TRF_R6 > TRF_R7
88 ( 2 - DLT_4B), // TRF_R7 Power down RF (idle script)
89 #if (L1_MADC_ON == 1)
90 (PROVISION_TIME - 170 - DLT_4B - rdt ), // for doing MADC
91 #else
92 0,
93 #endif
94 0,
95 0,
96 0, 0,0,0,0,0,0,0,0,0,
97 0, 0,0,0,0,0,0,0,0,0,
98 0,0
99 };
100
101 WORD16 rf_tx_tpu_timings[NB_TPU_TIMINGS] =
102 {
103 // - TX up:
104 // The times below are offsets to when TXSTART goes high
105 //burst data comes here
106 ( - 255 - DLT_4B - tdt ), // TRF_T1 Set TX synth
107 ( - 235 - DLT_4B - tdt ), // TRF_T2 Power ON TX
108 ( - 225 - DLT_1 ), // TRF_T3
109 ( - 100 - DLT_1 ), // TRF_T4
110 ( - 30 - DLT_1 ), // TRF_T5
111 ( 0 - DLT_1 ), // TRF_T6
112 ( 8 - DLT_1 ), // TRF_T7
113 ( 16 - DLT_1 ), // TRF_T8
114 // - TX timings ---
115 // - TX down:
116 // The times below are offsets to when TXSTART goes down
117 ( - 40 - DLT_1 ), // TRF_T9 ADC read
118 ( 0 - DLT_1 ), // TRF_T10 Disable APC
119 ( 16 - DLT_1 ) , // TRF_T11 Disable PA
120 ( 20 - DLT_1 ) , // TRF_T12 Disable TXSTART
121 ( 30 - DLT_4B ) , // TRF_T13 Power off Locosto
122 0,
123 0,
124 0,
125 0,
126 0,0,0,
127 0, 0,0,0,0,0,0,0,0,0,
128 0,0
129 };
130
131 //Flexi ABB DELAYS
132 WORD16 rf_flexi_abb_delays[NB_ABB_DELAYS] = {
133 //Note: 0th element is not mapped to anything should be always 0
134 0, 20, (45L), 12, 0 , 0 , 0 , 12, 5, 6,
135 1L, (63L + 4L), (DL_DELAY_RF + UL_DELAY_2RF + (GUARD_BITS*4) + UL_DELAY_1RF + UL_ABB_DELAY), 2L, 20L, 10L, 20, 6, 0, 0,
136 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
137 0, 0
138 };
139
140 #endif //TPU_DEVEL
141
142 // Internal function prototypes
143 void l1dmacro_rx_down (WORD32 t);
144
145 #if (L1_FF_MULTIBAND == 0)
146 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq);
147 WORD32 rf_init(WORD32 t);
148
149 // External function prototypes
150 UWORD8 Cust_is_band_high(UWORD16 radio_freq);
151 #endif
152
153
154 extern T_RF_BAND rf_band[];
155 extern T_RF rf;
156
157 /**************************************************************************/
158 /**************************************************************************/
159 /* DEFINITION OF MACROS FOR CHIPS SERIAL PROGRAMMATION */
160 /**************************************************************************/
161 /**************************************************************************/
162
163 /*------------------------------------------*/
164 /* Is arfcn in the DCS band (512-885) ? */
165 /*------------------------------------------*/
166 #define IS_HIGH_BAND(arfcn) (((arfcn >= 512) && (arfcn <= 885)) ? 1 : 0)
167
168
169 /*------------------------------------------*/
170 /* Send a value to LoCosto */
171 /*------------------------------------------*/
172 #define MOVE_REG_TSP_TO_RF(data, addr)\
173 {\
174 *TP_Ptr++ = TPU_MOVE(OCP_DATA_MSB, ((data)>>8) & 0x00FF); \
175 *TP_Ptr++ = TPU_MOVE(OCP_DATA_LSB, (data) & 0x00FF); \
176 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_MSB, ((addr)>>8) & 0x00FF); \
177 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_LSB, (addr) & 0x00FF); \
178 *TP_Ptr++ = TPU_MOVE(OCP_ADDRESS_START, 0x0001); \
179 }
180
181 /* RFTime environment */
182 #if defined (HOST_TEST)
183 #include "hostmacros.h"
184 #endif
185
186 /*------------------------------------------*/
187 /* Trace arfcn for conversion debug */
188 /*------------------------------------------*/
189 #ifdef ARFCN_DEBUG
190 // ----Debug information : record all arfcn programmed into synthesizer!
191 #define MAX_ARFCN_TRACE 4096 // enough for 5 sessions of 124+374
192 SYS_UWORD16 arfcn_trace[MAX_ARFCN_TRACE];
193 static UWORD32 arfcn_trace_index = 0;
194
195 void trace_arfcn(SYS_UWORD16 arfcn)
196 {
197 arfcn_trace[arfcn_trace_index++] = arfcn;
198
199 // Wrap to beginning
200 if (arfcn_trace_index == MAX_ARFCN_TRACE)
201 arfcn_trace_index = 0;
202 }
203 #endif
204
205
206 /**************************************************************************/
207 /**************************************************************************/
208 /* DEFINITION OF HARWARE DEPENDANT CONSTANTS */
209 /**************************************************************************/
210 /**************************************************************************/
211
212 /**************************************************************************/
213 /**************************************************************************/
214 /* INTERNAL FUNCTIONS OF TPUDRV14.C */
215 /* EFFECTIVE DOWNLOADING THROUGH TSP */
216 /**************************************************************************/
217 /**************************************************************************/
218 // rx & tx
219 typedef struct tx_rx_s
220 {
221 UWORD16 farfcn0;
222 WORD8 ou;
223 }
224 T_TX_RX;
225
226 struct synth_s {
227 // common
228 UWORD16 arfcn0;
229 UWORD16 limit;
230 T_TX_RX tx_rx[2];
231 };
232
233 struct rf_path_s {
234 UWORD8 rx_up;
235 UWORD8 rx_down;
236 UWORD8 tx_up;
237 UWORD8 tx_down;
238 struct synth_s *synth;
239 };
240
241 const struct synth_s synth_900[] =
242 {
243 { 0, 124, {{ 890, 1}, { 935, 2}}},// gsm 0 - 124
244 {974, 1023, {{ 880, 1}, { 925, 2}}},// egsm 975 - 1023
245 };
246
247 const struct synth_s synth_1800[] =
248 {
249 {511, 885, {{1710, 1}, {1805, 1}}}, // dcs 512 - 885
250 };
251
252 const struct synth_s synth_1900[] =
253 {
254 {511, 810, {{1850, 1}, {1930, 1}}}, // pcs 512 - 810;
255 };
256
257 const struct synth_s synth_850[] =
258 {
259 {127, 192, {{ 824, 2}, { 869, 2}}}, // gsm850 128 - 251 //low
260 {127, 251, {{ 824, 1}, { 869, 2}}}, // gsm850 128 - 251 //high
261 };
262
263 #if RF_BAND_SYSTEM_INDEX == RF_QUADBAND
264 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
265 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
266 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
267 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
268 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
269 };
270 #endif
271
272 #if RF_BAND_SYSTEM_INDEX == RF_EU_TRIBAND
273 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
274 { RU_850, RD_850, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
275 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
276 { RU_1900, RD_1900, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
277 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
278 };
279 #endif
280
281 #if RF_BAND_SYSTEM_INDEX == RF_US_DUALBAND
282 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
283 { RU_900, RD_900, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
284 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
285 { RU_1800, RD_1800, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
286 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
287 };
288 #endif
289
290 #if RF_BAND_SYSTEM_INDEX == RF_PCS1900_900_DUALBAND
291 struct rf_path_s rf_path[] = { //same index used as for band_config[] - 1
292 { RU_850, RD_850, TU_900, TD_900, (struct synth_s *)synth_900 }, //EGSM
293 { RU_1800, RD_1800, TU_1800, TD_1800, (struct synth_s *)synth_1800}, //DCS
294 { RU_1800, RD_1800, TU_1900, TD_1900, (struct synth_s *)synth_1900}, //PCS
295 { RU_850, RD_850, TU_850, TD_850, (struct synth_s *)synth_850 }, //GSM850
296 };
297 #endif
298
299
300 UWORD32 calc_rf_freq(UWORD16 arfcn, UWORD8 downlink)
301 {
302 UWORD32 farfcn;
303 struct synth_s *s;
304
305 s = rf_path[rf_index].synth;
306 while(s->limit < arfcn)
307 s++;
308
309 // Convert the ARFCN to the channel frequency (times 5 to avoid the decimal value)
310 farfcn = 5*s->tx_rx[downlink].farfcn0 + (arfcn - s->arfcn0);
311
312 // LoCosto DLO carrier frequency is programmed in 100kHz increments.
313 // Therefore RF_FREQ = (channel frequency * 10) = (farfcn * 2)
314 return ( 2*farfcn );
315 }
316
317 #if (L1_FF_MULTIBAND == 0)
318 /*------------------------------------------*/
319 /* Convert_l1_radio_freq */
320 /*------------------------------------------*/
321 /* conversion of l1 radio_freq to */
322 /* real channel number */
323 /*------------------------------------------*/
324 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
325 {
326 switch(l1_config.std.id)
327 {
328 case GSM:
329 case DCS1800:
330 case PCS1900:
331 case GSM850:
332 return (radio_freq);
333 //omaps00090550 break;
334
335 case DUAL:
336 {
337 if (radio_freq < l1_config.std.first_radio_freq_band2)
338 // GSM band...
339 return(radio_freq);
340 else
341 // DCS band...
342 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
343 }
344 //omaps00090550 break;
345
346 case DUALEXT:
347 {
348 if (radio_freq < l1_config.std.first_radio_freq_band2)
349 // E-GSM band...
350 {
351 if(radio_freq <= 124)
352 // GSM part...
353 return(radio_freq);
354 if(radio_freq < 174)
355 // Extended part...
356 return (radio_freq - 125 + 975);
357 else
358 // Extended part, special case of ARFCN=0
359 return(0);
360 }
361 else
362 {
363 // DCS band...
364 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
365 }
366 }
367 // break;
368
369 case GSM_E:
370 {
371 if(radio_freq <= 124)
372 // GSM part...
373 return(radio_freq);
374 else
375 if(radio_freq < 174)
376 // Extended part...
377 return (radio_freq - 125 + 975);
378 else
379 // Extended part, special case of ARFCN=0
380 return(0);
381 }
382 //omaps00090550 break;
383
384 case DUAL_US:
385 {
386 if (radio_freq < l1_config.std.first_radio_freq_band2)
387 {
388 return(radio_freq - l1_config.std.first_radio_freq + 128);
389 }
390 else
391 {
392 // PCS band...
393 return (radio_freq - l1_config.std.first_radio_freq_band2 + 512);
394 }
395 }
396 // break;
397
398 default: // should never occur.
399 return(radio_freq);
400 } // end of switch
401 }
402 #else
403 static const UWORD8 rf_band_idx_to_locosto_idx[] =
404 {
405 #if (GSM900_SUPPORTED == 1)
406 0,
407 #endif
408 #if (GSM850_SUPPORTED == 1)
409 3,
410 #endif
411 #if (DCS1800_SUPPORTED == 1)
412 1,
413 #endif
414 #if (PCS1900_SUPPORTED == 1)
415 2
416 #endif
417 };
418
419 SYS_UWORD16 Convert_l1_radio_freq(SYS_UWORD16 radio_freq)
420 {
421 UWORD8 band_index;
422 return(rf_convert_l1freq_to_arfcn_rfband(rf_convert_rffreq_to_l1freq(radio_freq),
423 &band_index));
424 }
425
426 #endif
427
428 /*------------------------------------------*/
429 /* rf_init */
430 /*------------------------------------------*/
431 /* Initialization routine for PLL */
432 /* Effective downloading through TSP */
433 /*------------------------------------------*/
434 WORD32 rf_init(WORD32 t)
435 {
436 //UWORD16 temp=(UWORD16)( ((UWORD32)(&drp_srm_api->control.retiming))&0xFFFF) ;
437 // enable control of retiming
438 MOVE_REG_TSP_TO_RF(RETIM_DISABLE, ((UWORD16)( ((UWORD32)(&drp_srm_api->control.retiming))&0xFFFF)));
439
440 // Power ON the regulators by sending REG_ON script
441 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL)))));
442
443 return(t);
444 }
445
446
447
448
449 #if (L1_FF_MULTIBAND == 0)
450 UWORD8 arfcn_to_rf_index(SYS_UWORD16 arfcn)
451 {
452 UWORD8 index;
453 extern const T_STD_CONFIG std_config[];
454 index = std_config[l1_config.std.id].band[0];
455
456 if ((std_config[l1_config.std.id].band[1] != BAND_NONE) && IS_HIGH_BAND(arfcn))
457 index = std_config[l1_config.std.id].band[1];
458
459 return (index - 1);
460 }
461 #endif
462
463 /*------------------------------------------*/
464 /* rf_program */
465 /*------------------------------------------*/
466 /* Programs the RF synthesizer */
467 /* called each frame */
468 /* downloads NA counter value */
469 /* t = start time in the current frame */
470 /*------------------------------------------*/ //change 2 UWORD8
471 UWORD32 rf_program(UWORD32 t, SYS_UWORD16 radio_freq, UWORD32 rx)
472 {
473 UWORD32 rfdiv;
474 SYS_UWORD16 arfcn;
475
476 #ifdef ARFCN_DEBUG
477 trace_arfcn(arfcn);
478 #endif
479
480 #if (L1_FF_MULTIBAND == 0)
481 arfcn = Convert_l1_radio_freq(radio_freq);
482
483 rf_index = arfcn_to_rf_index(arfcn);
484
485 if (rf_index == 4)
486 {
487 rf_index = 0;
488 }
489
490
491 #else
492 {
493 UWORD8 rf_band_index;
494 // rf_index = rf_band_idx_to_locosto_idx[rf_convert_l1freq_to_rf_band_idx(radio_freq)];
495 arfcn=rf_convert_rffreq_to_l1freq_rfband(radio_freq, &rf_band_index);
496 rf_index = rf_band_idx_to_locosto_idx[rf_subband2band[rf_band_index]];
497 arfcn=rf_convert_l1freq_to_arfcn_rfband(arfcn, &rf_band_index);
498 }
499 #endif
500 rfdiv = calc_rf_freq(arfcn, rx);
501
502 MOVE_REG_TSP_TO_RF(rfdiv,((UWORD16)( ((UWORD32)(&drp_regs->RF_FREQL))&0xFFFF)));
503
504 return(t);
505 }
506
507 /*------------------------------------------*/
508 /* rf_init_light */
509 /*------------------------------------------*/
510 /* Initialization routine for PLL */
511 /* Effective downloading through TSP */
512 /*------------------------------------------*/
513 WORD32 rf_init_light(WORD32 t)
514 {
515 // initialization for change of multi-band configuration dependent on STD
516 return(t);
517 }
518
519
520 /**************************************************************************/
521 /**************************************************************************/
522 /* EXTERNAL FUNCTIONS CALLED BY LAYER1 */
523 /* COMMON TO L1 and TOOLKIT */
524 /**************************************************************************/
525 /**************************************************************************/
526
527 void l1dmacro_afc (SYS_UWORD16 afc_value, UWORD8 win_id)
528 {
529 MOVE_REG_TSP_TO_RF(afc_value, ((UWORD16)( ((UWORD32)(&drp_srm_api->inout.afc.input.mem_xtal))&0xFFFF)));
530
531 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_AFC), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
532 }
533
534
535 #define L1_NEW_ROC_ENABLE_FLAG (1)
536
537
538 #if (L1_NEW_ROC_ENABLE_FLAG == 1)
539
540 /*------------------------------------------*/
541 /* cust_get_if_dco_ctl_algo */
542 /*------------------------------------------*/
543 /* Defines which IF and DCO */
544 /* algorythms are used */
545 /* */
546 /* */
547 /*------------------------------------------*/
548 /* NOTE: In the below code
549 * At high power levels, IF_100KHZ_DSP-> DRP->LIF_100KHZ and DSP->DCO_IF_100KHZ/DCO_IF_0_100KHZ
550 * low power levels IF_120KHZ_DSP-> DRP->LIF_120KHZ + HPF filter and DSP->DCO_NONE/DCO_IF_0KHZ */
551
552 void cust_get_if_dco_ctl_algo(UWORD16 *dco_algo_ctl, UWORD8 *if_ctrl,
553 UWORD8 input_level_flag, UWORD8 input_level, UWORD16 radio_freq,
554 UWORD8 if_threshold)
555 {
556 #if (L1_FF_MULTIBAND == 0)
557 SYS_UWORD16 arfcn;
558 #else
559 UWORD16 rffreq;
560 #endif
561
562 if ((!input_level_flag) || (input_level < if_threshold))
563 {
564 *if_ctrl = IF_100KHZ_DSP;
565 *dco_algo_ctl = DCO_IF_100KHZ;
566 }
567 else
568 {
569 *if_ctrl = IF_120KHZ_DSP;
570 *dco_algo_ctl = DCO_NONE;
571 }
572 #if (L1_FF_MULTIBAND == 0)
573 arfcn = Convert_l1_radio_freq(radio_freq);
574
575 switch(l1_config.std.id)
576 {
577 case GSM:
578 case GSM_E:
579 {
580 if ((arfcn == 5) || (arfcn == 70))
581 {
582 if (*if_ctrl == IF_100KHZ_DSP)
583 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
584 else
585 *dco_algo_ctl = DCO_IF_0KHZ;
586 }
587 break;
588 }
589 case DCS1800:
590 {
591 if ((arfcn == 521) || (arfcn == 586) || (arfcn == 651) || (arfcn == 716) ||(arfcn == 781) || (arfcn == 846))
592 {
593 if (*if_ctrl == IF_100KHZ_DSP)
594 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
595 else
596 *dco_algo_ctl = DCO_IF_0KHZ;
597 }
598 break;
599 }
600 case PCS1900:
601 {
602 if ((arfcn == 546) || (arfcn == 611) ||(arfcn == 676) || (arfcn == 741) ||(arfcn == 806) )
603 {
604 if (*if_ctrl == IF_100KHZ_DSP)
605 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
606 else
607 *dco_algo_ctl = DCO_IF_0KHZ;
608 }
609 break;
610 }
611 case GSM850:
612 {
613 if ((arfcn == 137) || (arfcn == 202))
614 {
615 if (*if_ctrl == IF_100KHZ_DSP)
616 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
617 else
618 *dco_algo_ctl = DCO_IF_0KHZ;
619 }
620 break;
621 }
622 case DUAL:
623 case DUALEXT:
624 {
625 if (radio_freq < l1_config.std.first_radio_freq_band2)
626 {
627 // GSM band...
628 if ((arfcn == 5) ||(arfcn == 70))
629 {
630 if (*if_ctrl == IF_100KHZ_DSP)
631 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
632 else
633 *dco_algo_ctl = DCO_IF_0KHZ;
634 }
635 }
636 else
637 // DCS band...
638 {
639 if ((arfcn == 521) || (arfcn == 586) || (arfcn == 651) || (arfcn == 716) ||(arfcn == 781) || (arfcn == 846))
640 {
641 if (*if_ctrl == IF_100KHZ_DSP)
642 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
643 else
644 *dco_algo_ctl = DCO_IF_0KHZ;
645 }
646 }
647 break;
648 }
649 case DUAL_US:
650 {
651 if (radio_freq < l1_config.std.first_radio_freq_band2)
652 {
653 // GSM 850
654 if ((arfcn == 137) || (arfcn == 202))
655 {
656 if (*if_ctrl == IF_100KHZ_DSP)
657 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
658 else
659 *dco_algo_ctl = DCO_IF_0KHZ;
660 }
661 }
662 else
663 {
664 // PCS band...
665 if ((arfcn == 546) || (arfcn == 611) ||(arfcn == 676) || (arfcn == 741) ||(arfcn == 806) )
666 {
667 if (*if_ctrl == IF_100KHZ_DSP)
668 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
669 else
670 *dco_algo_ctl = DCO_IF_0KHZ;
671 }
672 }
673 break;
674 }
675 default:
676 break;// should never occur.
677 } // end of switch
678 #else //#if (L1_FF_MULTIBAND == 0)
679 //rffreq = rf_convert_l1freq_to_rffreq(radio_freq);
680 rffreq=radio_freq; // The argument passed to this function is the radio_freq and not l1_freq
681 if(
682 #if (GSM850_SUPPORTED == 1)
683 (137 == rffreq)||(202 == rffreq) ||
684 #endif
685 #if (GSM900_SUPPORTED == 1)
686 (5 == rffreq)||(70 == rffreq) ||
687 #endif
688 #if (DCS1800_SUPPORTED == 1)
689 (521 == rffreq)||(586 == rffreq) ||(651 == rffreq)||(716 == rffreq) ||(781 == rffreq)||(846 == rffreq) ||
690 #endif
691 #if (PCS1900_SUPPORTED == 1)
692 (546+512 == rffreq) ||(611+512 == rffreq)||(676+512 == rffreq) ||(741+512 == rffreq)||(806+512 == rffreq) ||
693 #endif
694 0)
695 {
696 if (*if_ctrl == IF_100KHZ_DSP)
697 *dco_algo_ctl = DCO_IF_0KHZ_100KHZ;
698 else
699 *dco_algo_ctl = DCO_IF_0KHZ;
700 }
701 #endif // if (L1_FF_MULTIBAND == 0)
702 }
703 #else
704
705 /*------------------------------------------*/
706 /* cust_get_if_dco_ctl_algo */
707 /*------------------------------------------*/
708 /* Defines which IF and DCO */
709 /* algorythms are used */
710 /* */
711 /* */
712 /*------------------------------------------*/
713
714 /* NOTE: Below is the Old DCO algorithm in which ROC compensation was not enabled on DSP side
715 * To use this algorithm we need an appropriate DRP script which functions as below.
716 * IF_100KHZ_DSP-> DRP-ZIF and DSP-DCO_ZIF
717 * IF_120KHZ_DSP-> DRP_LIF_120KHZ + HPF filter and DSP-DCO_ZIF/DCO_NONE */
718 void cust_get_if_dco_ctl_algo(UWORD16 *dco_algo_ctl, UWORD8 *if_ctrl, UWORD8 input_level_flag, UWORD8 input_level, UWORD16 radio_freq, UWORD8 if_threshold)
719 {
720 #if (L1_FF_MULTIBAND == 0)
721 SYS_UWORD16 arfcn;
722 #else
723 UWORD16 rffreq;
724 #endif
725
726 if ((!input_level_flag) | (input_level < if_threshold))
727 {
728 *if_ctrl = IF_100KHZ_DSP;
729 *dco_algo_ctl = DCO_IF_0KHZ;
730 }
731 else{
732 *if_ctrl = IF_120KHZ_DSP;
733
734
735
736 //*dco_algo_ctl = DCO_IF_100KHZ;
737 *dco_algo_ctl = DCO_NONE;
738 #if (L1_FF_MULTIBAND == 0)
739
740 arfcn = Convert_l1_radio_freq(radio_freq);
741
742 switch(l1_config.std.id)
743 {
744 case GSM:
745 case GSM_E:
746 if ((arfcn == 5) |(arfcn == 70))
747
748 *dco_algo_ctl = DCO_IF_0KHZ;
749 break;
750
751 case DCS1800:
752 if ((arfcn == 521) | (arfcn == 586) | (arfcn == 651) | (arfcn == 716) |(arfcn == 781) | (arfcn == 846))
753
754 *dco_algo_ctl = DCO_IF_0KHZ;
755 break;
756
757 case PCS1900:
758 if ((arfcn == 546) | (arfcn == 611) |(arfcn == 676) | (arfcn == 741) |(arfcn == 806) )
759
760 *dco_algo_ctl = DCO_IF_0KHZ;
761 break;
762
763 case GSM850:
764 if ((arfcn == 137) | (arfcn == 202))
765
766 *dco_algo_ctl = DCO_IF_0KHZ;
767 break;
768
769 case DUAL:
770 case DUALEXT:
771 {
772 if (radio_freq < l1_config.std.first_radio_freq_band2)
773 {
774 // GSM band...
775 if ((arfcn == 5) |(arfcn == 70))
776
777 *dco_algo_ctl = DCO_IF_0KHZ;
778 }
779 else
780 // DCS band...
781 {
782 if ((arfcn == 521) | (arfcn == 586) | (arfcn == 651) | (arfcn == 716) |(arfcn == 781) | (arfcn == 846))
783
784 *dco_algo_ctl = DCO_IF_0KHZ;
785 }
786 }
787 break;
788
789 case DUAL_US:
790 {
791 if (radio_freq < l1_config.std.first_radio_freq_band2)
792 {
793 // GSM 850
794 if ((arfcn == 137) | (arfcn == 202))
795
796 *dco_algo_ctl = DCO_IF_0KHZ;
797 }
798 else
799 {
800 // PCS band...
801 if ((arfcn == 546) | (arfcn == 611) |(arfcn == 676) | (arfcn == 741) |(arfcn == 806) )
802
803 *dco_algo_ctl = DCO_IF_0KHZ;
804 }
805 }
806 break;
807
808 default:
809 break;// should never occur.
810 } // end of switch
811 #else
812 rffreq = rf_convert_l1freq_to_rffreq(radio_freq);
813 if(
814 #if (GSM850_SUPPORTED == 1)
815 (137 == rffreq)||(202 == rffreq) ||
816 #endif
817 #if (GSM900_SUPPORTED == 1)
818 (5 == rffreq)||(70 == rffreq) ||
819 #endif
820 #if (DCS1800_SUPPORTED == 1)
821 (521 == rffreq)||(586 == rffreq) ||(651 == rffreq)||(716 == rffreq) ||(781 == rffreq)||(846 == rffreq) ||
822 #endif
823 #if (PCS1900_SUPPORTED == 1)
824 (546+512 == rffreq) ||(611+512 == rffreq)||(676+512 == rffreq) ||(741+512 == rffreq)||(806+512 == rffreq) ||
825 #endif
826 0)
827 {
828 *dco_algo_ctl = DCO_IF_0KHZ;
829 }
830 #endif
831 }
832 }
833
834 #endif
835 /*------------------------------------------*/
836 /* agc */
837 /*------------------------------------------*/
838 /* Program a gain into IF amp */
839 /* agc_value : gain in dB */
840 /* */
841 /* additional parameter for LNA setting */
842 /*------------------------------------------*/
843
844 void l1dmacro_agc(SYS_UWORD16 radio_freq, WORD8 gain, UWORD8 lna_off, UWORD8 if_ctl)
845 {
846 signed int index;
847 WORD16 afe;
848 UWORD16 corner_freq = SCF_270KHZ ; //Corner frequency given in kHz
849 UWORD16 gain_comp = GAIN_COMP_ENABLE; //gain compensation scheme
850 UWORD16 if_setting;
851 UWORD16 lna_setting;
852
853 UWORD16 arfcn ;
854
855
856 index = gain;
857
858 // below is inserted to prevent wraparound of gain index in testmode
859 if (index >= AGC_TABLE_SIZE)
860 index = AGC_TABLE_SIZE-1;
861 if (index <= MIN_AGC_INDEX)
862 index = MIN_AGC_INDEX;
863
864 if(lna_off)
865 afe = AFE_LOW_GAIN;
866 else
867 afe = AFE_HIGH_GAIN;
868
869 if(if_ctl == IF_120KHZ_DSP)
870 if_setting = IF_120KHZ_DRP;
871 else
872 if_setting = IF_100KHZ_DRP;
873
874
875 #if (L1_FF_MULTIBAND == 0)
876 //LNA Changes
877 arfcn = Convert_l1_radio_freq(radio_freq);
878 //band_system_index = (UWORD16) convert_arfcn_to_band(arfcn);
879 lna_setting = (UWORD16) drp_generate_dbbif_setting_arfcn( (UWORD16) RF_BAND_SYSTEM_INDEX, arfcn);
880 //End LNA
881 #else
882 #if 0
883 rf_band_idx = rf_convert_l1freq_to_rf_band_idx(radio_freq);
884 switch(rf_band_idx)
885 {
886 #if(GSM850_SUPPORTED)
887 case RF_GSM850:
888 drp_band_index = 0;
889 break;
890 #endif
891 #if(DCS1800_SUPPORTED)
892 case RF_DCS1800:
893 drp_band_index = 2;
894 break;
895 #endif
896 #if(PCS1900_SUPPORTED)
897 case RF_PCS1900:
898 drp_band_index = 3;
899 break;
900 #endif
901 default:
902 drp_band_index = 1;
903 break;
904 }
905 #endif // if 0
906
907 lna_setting = (UWORD16) drp_generate_dbbif_setting_arfcn( (UWORD16) RF_BAND_SYSTEM_INDEX, radio_freq);
908 #endif
909 //if_setting = IF_100KHZ_DRP;
910 // r2: implement the register rx_in for setting the configuration of the RX path
911 *TP_Ptr++ = TPU_AT(TRF_R2);
912 MOVE_REG_TSP_TO_RF(( (lna_setting <<8) | (corner_freq<<7) | (afe<<6) | (AGC_TABLE[index]<<2) | (gain_comp<<1) | (if_setting)), ((UWORD16)( ((UWORD32)(&drp_srm_api->inout.rx.rxon_input))&0xFFFF)));
913
914 }
915
916 /*------------------------------------------*/
917 /* l1dmacro_rx_synth */
918 /*------------------------------------------*/
919 /* programs RF synth for recceive */
920 /*------------------------------------------*/
921 void l1dmacro_rx_synth(SYS_UWORD16 radio_freq)
922 {
923 UWORD32 t;
924
925 // Important: always use rx_synth_start_time for first TPU_AT
926 // Never remove below 2 lines!!!
927 t = l1_config.params.rx_synth_start_time;
928 *TP_Ptr++ = TPU_FAT (t);
929
930 t = rf_program(t, radio_freq, 1); // direction is set to 1 for Rx
931 }
932
933 /*------------------------------------------*/
934 /* l1dmacro_tx_synth */
935 /*------------------------------------------*/
936 /* programs RF synth for transmit */
937 /* programs OPLL for transmit */
938 /*------------------------------------------*/
939 void l1dmacro_tx_synth(SYS_UWORD16 radio_freq)
940 {
941 UWORD32 t;
942
943 // Important: always use tx_synth_start_time for first TPU_AT
944 // Never remove below 2 lines!!!
945 t = l1_config.params.tx_synth_start_time;
946 *TP_Ptr++ = TPU_FAT (t);
947
948 t = rf_program(t, radio_freq, 0); // direction set to 0 for Tx
949 }
950
951 /*------------------------------------------*/
952 /* l1dmacro_rx_up */
953 /*------------------------------------------*/
954 /* Open window for normal burst reception */
955 /*------------------------------------------*/
956 #if (L1_RF_KBD_FIX == 1)
957 #if (L1_MADC_ON == 0)
958 void l1dmacro_rx_up (UWORD8 csf_filter_choice, UWORD8 kbd_config
959 #if(NEW_SNR_THRESHOLD==1)
960 , UWORD8 saic_flag_rx_up
961 #endif
962 )
963 {
964 UWORD8 kbd_tspact_config =0;
965
966 if (kbd_config == KBD_DISABLED)
967 kbd_tspact_config = KBD_DIS_TSPACT;
968
969 // r3: power ON RX
970 *TP_Ptr++ = TPU_AT(TRF_R3);
971 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_RX_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL)))));
972
973 // r3_1: disable keyboard
974 *TP_Ptr++ = TPU_AT(TRF_R3_1);
975 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config);
976
977 // r4: enable TXM in Rx mode
978 *TP_Ptr++ = TPU_AT(TRF_R4);
979 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].rx_up);
980
981 // Program CSF filter appropriately
982 if(csf_filter_choice == L1_SAIC_HARDWARE_FILTER)
983 {
984 MOVE_REG_TSP_TO_RF(CSF_CWL_HARDWARE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
985 }
986 else
987 {
988 MOVE_REG_TSP_TO_RF(CSF_CWL_PROGRAMMABLE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
989 }
990
991 // r5: enable RX_START
992 #if (L1_SAIC != 0)//Because for 0/2 interpolation, SAIC needs 1 additional symbol compared to legacy modem.
993
994 #if (NEW_SNR_THRESHOLD==1)
995 if(saic_flag_rx_up==1)
996 {
997 #endif
998
999 #if (ONE_THIRD_INTRPOL == 1)
1000 *TP_Ptr++ = TPU_AT(TRF_R5-5);
1001 #else
1002 *TP_Ptr++ = TPU_AT(TRF_R5-4);
1003 #endif
1004
1005 #if (NEW_SNR_THRESHOLD==1)
1006 }
1007 else
1008 {
1009 *TP_Ptr++ = TPU_AT(TRF_R5);
1010 }
1011 #endif
1012
1013 #else
1014 *TP_Ptr++ = TPU_AT(TRF_R5);
1015 #endif
1016
1017 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | RX_START);
1018
1019 }
1020 #endif
1021
1022
1023 #if (L1_MADC_ON == 1)
1024 void l1dmacro_rx_up(UWORD8 adc_active, UWORD8 csf_filter_choice, UWORD8 kbd_config
1025 #if(NEW_SNR_THRESHOLD==1)
1026 , UWORD8 saic_flag_rx_up
1027 #endif
1028 )
1029 {
1030 UWORD8 kbd_tspact_config =0;
1031
1032 if (kbd_config == KBD_DISABLED)
1033 kbd_tspact_config = KBD_DIS_TSPACT;
1034
1035 // r3: power ON RX
1036 *TP_Ptr++ = TPU_AT(TRF_R3);
1037 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_RX_ON), (UWORD32)(&drp_regs->SCRIPT_STARTL));
1038
1039 if (adc_active == ACTIVE)
1040 {
1041 *TP_Ptr++ = TPU_AT(TRF_R8);
1042 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,START_ADC|TXM_SLEEP);
1043 *TP_Ptr++ = TPU_WAIT (2);
1044 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,TXM_SLEEP);
1045 }
1046
1047 // r3_1: disable keyboard
1048 *TP_Ptr++ = TPU_AT(TRF_R3_1);
1049 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config);
1050
1051 // r4: enable TXM in Rx mode
1052 *TP_Ptr++ = TPU_AT(TRF_R4);
1053 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].rx_up);
1054
1055 // Program CSF filter appropriately
1056 if(csf_filter_choice == L1_SAIC_HARDWARE_FILTER)
1057 {
1058 MOVE_REG_TSP_TO_RF(CSF_CWL_HARDWARE_FILTER_64TAP, (UWORD32)(&drp_regs->CSF_CWL));
1059 }
1060 else
1061 {
1062 MOVE_REG_TSP_TO_RF(CSF_CWL_PROGRAMMABLE_FILTER_64TAP, (UWORD32)(&drp_regs->CSF_CWL));
1063 }
1064 // r5: enable RX_START
1065 // Remember that between TRF_R5 and TRF_R4 there should be a buffer of around 4 qbits
1066 #if (L1_SAIC != 0)//Because for 0/2 interpolation, SAIC needs 1 additional symbol compared to legacy modem.
1067
1068 #if (NEW_SNR_THRESHOLD==1)
1069 if(saic_flag_rx_up==1)
1070 {
1071 #endif
1072
1073 #if (ONE_THIRD_INTRPOL == 1)
1074 *TP_Ptr++ = TPU_AT(TRF_R5-5);
1075 #else
1076 *TP_Ptr++ = TPU_AT(TRF_R5-4);
1077 #endif
1078
1079 #if (NEW_SNR_THRESHOLD==1)
1080 }
1081 else
1082 {
1083 *TP_Ptr++ = TPU_AT(TRF_R5);
1084 }
1085 #endif
1086
1087 #else
1088 *TP_Ptr++ = TPU_AT(TRF_R5);
1089 #endif
1090 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | RX_START);
1091
1092 }
1093 #endif
1094
1095 #endif /* (L1_RF_KBD_FIX == 1) */
1096
1097 #if (L1_RF_KBD_FIX == 0)
1098 #if (L1_MADC_ON == 0)
1099 void l1dmacro_rx_up (UWORD8 csf_filter_choice
1100 #if(NEW_SNR_THRESHOLD==1)
1101 , UWORD8 saic_flag_rx_up
1102 #endif
1103 )
1104 {
1105
1106 // r3: power ON RX
1107 *TP_Ptr++ = TPU_AT(TRF_R3);
1108 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_RX_ON), (UWORD16)(&drp_regs->SCRIPT_STARTL));
1109
1110 // r4: enable TXM in Rx mode
1111 *TP_Ptr++ = TPU_AT(TRF_R4);
1112 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].rx_up);
1113
1114 // Program CSF filter appropriately
1115 if(csf_filter_choice == L1_SAIC_HARDWARE_FILTER)
1116 {
1117 MOVE_REG_TSP_TO_RF(CSF_CWL_HARDWARE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
1118 }
1119 else
1120 {
1121 MOVE_REG_TSP_TO_RF(CSF_CWL_PROGRAMMABLE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
1122 }
1123
1124 // r5: enable RX_START
1125 #if (L1_SAIC != 0)//Because for 0/2 interpolation, SAIC needs 1 additional symbol compared to legacy modem.
1126
1127 #if (NEW_SNR_THRESHOLD==1)
1128 if(saic_flag_rx_up==1)
1129 {
1130 #endif
1131
1132 #if (ONE_THIRD_INTRPOL == 1)
1133 *TP_Ptr++ = TPU_AT(TRF_R5-5);
1134 #else
1135 *TP_Ptr++ = TPU_AT(TRF_R5-4);
1136 #endif
1137
1138 #if (NEW_SNR_THRESHOLD==1)
1139 }
1140 else
1141 {
1142 *TP_Ptr++ = TPU_AT(TRF_R5);
1143 }
1144 #endif
1145
1146 #else
1147 *TP_Ptr++ = TPU_AT(TRF_R5);
1148 #endif
1149 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, RX_START);
1150
1151 }
1152 #endif
1153
1154
1155 #if (L1_MADC_ON == 1)
1156 void l1dmacro_rx_up(UWORD8 adc_active, UWORD8 csf_filter_choice
1157 #if(NEW_SNR_THRESHOLD==1)
1158 , UWORD8 saic_flag_rx_up
1159 #endif
1160 )
1161 {
1162 // r3: power ON RX
1163 *TP_Ptr++ = TPU_AT(TRF_R3);
1164 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_RX_ON), (UWORD16)(&drp_regs->SCRIPT_STARTL));
1165
1166 if (adc_active == ACTIVE)
1167 {
1168 *TP_Ptr++ = TPU_AT(TRF_R8);
1169 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,START_ADC);
1170 *TP_Ptr++ = TPU_WAIT (2);
1171 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U,0);
1172 }
1173
1174
1175 // r4: enable TXM in Rx mode
1176 *TP_Ptr++ = TPU_AT(TRF_R4);
1177 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].rx_up);
1178
1179 // Program CSF filter appropriately
1180 if(csf_filter_choice == L1_SAIC_HARDWARE_FILTER)
1181 {
1182 MOVE_REG_TSP_TO_RF(CSF_CWL_HARDWARE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
1183 }
1184 else
1185 {
1186 MOVE_REG_TSP_TO_RF(CSF_CWL_PROGRAMMABLE_FILTER_64TAP, (UWORD16)(&drp_regs->CSF_CWL));
1187 }
1188
1189 // r5: enable RX_START
1190 #if (L1_SAIC != 0)//Because for 0/2 interpolation, SAIC needs 1 additional symbol compared to legacy modem.
1191
1192 #if (NEW_SNR_THRESHOLD==1)
1193 if(saic_flag_rx_up==1)
1194 {
1195 #endif
1196
1197 #if (ONE_THIRD_INTRPOL == 1)
1198 *TP_Ptr++ = TPU_AT(TRF_R5-5);
1199 #else
1200 *TP_Ptr++ = TPU_AT(TRF_R5-4);
1201 #endif
1202
1203 #if (NEW_SNR_THRESHOLD==1)
1204 }
1205 else
1206 {
1207 *TP_Ptr++ = TPU_AT(TRF_R5);
1208 }
1209 #endif
1210
1211 #else
1212 *TP_Ptr++ = TPU_AT(TRF_R5);
1213 #endif
1214 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, RX_START);
1215
1216 }
1217 #endif
1218 #endif /* (L1_RF_KBD_FIX == 0) */
1219
1220
1221 /*------------------------------------------*/
1222 /* l1pdmacro_rx_down */
1223 /*------------------------------------------*/
1224 /* Close window for normal burst reception */
1225 /*------------------------------------------*/
1226 void l1dmacro_rx_down (WORD32 t)
1227 {
1228
1229 //r6: Disable ROC script
1230 *TP_Ptr++ = TPU_FAT(t + TRF_R6);
1231 MOVE_REG_TSP_TO_RF((DRP_ROC), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1232
1233
1234
1235 //r7: Disable Rx_Start & Disable RF switch & send Idle script
1236 *TP_Ptr++ = TPU_FAT(t + TRF_R7);
1237 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].rx_down);
1238 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, 0);
1239 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE),((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1240
1241 }
1242
1243 /*------------------------------------------*/
1244 /* l1dmacro_tx_up */
1245 /*------------------------------------------*/
1246 /* Open transmission window for normal burst*/
1247 /*------------------------------------------*/
1248 #if (L1_RF_KBD_FIX == 1)
1249 void l1dmacro_tx_up (UWORD8 kbd_config)
1250 {
1251 UWORD8 kbd_tspact_config =0;
1252
1253 if (kbd_config == KBD_DISABLED)
1254 kbd_tspact_config = KBD_DIS_TSPACT;
1255
1256 // t2: Power ON TX
1257 *TP_Ptr++ = TPU_AT(TRF_T2);
1258 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_TX_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1259
1260 // t3: put the TXM in RX mode
1261 *TP_Ptr++ = TPU_AT(TRF_T3);
1262 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_down);
1263
1264 // t3_1: disable keyboard
1265 *TP_Ptr++ = TPU_AT(TRF_T3_1);
1266 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config);
1267
1268 // t4: enable the APC LDO
1269 *TP_Ptr++ = TPU_AT(TRF_T4);
1270 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN);
1271
1272 // t5: enable the APC module
1273 *TP_Ptr++ = TPU_AT(TRF_T5);
1274 //SG *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN);
1275
1276 // t6: enable TX start and enable of Vramp
1277 //SG*TP_Ptr++ = TPU_AT(TRF_T6);
1278 //SG *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN | TX_START | START_APC);
1279 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | TX_START );
1280
1281 *TP_Ptr++ = TPU_AT(TRF_T6);
1282 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN | TX_START );
1283
1284 *TP_Ptr++ = TPU_AT(TRF_T7);
1285 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN | TX_START | START_APC);
1286
1287 // t7: enable TX start and enable of Vramp - Internal mode
1288 //*TP_Ptr++ = TPU_AT(TRF_T7);
1289 //*TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START | START_APC );
1290
1291 // t7: enable TX start and enable of Vramp
1292 //*TP_Ptr++ = TPU_AT(TRF_T7+4);
1293 //*TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START );
1294
1295 // t8: enable the TXEN of the TXM
1296 *TP_Ptr++ = TPU_AT(TRF_T8);
1297 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_up);
1298
1299 }
1300
1301 #endif /*(L1_RF_KBD_FIX == 1)*/
1302
1303 #if (L1_RF_KBD_FIX == 0)
1304
1305 void l1dmacro_tx_up (void)
1306 {
1307
1308
1309
1310
1311
1312 // t2: Power ON TX
1313 *TP_Ptr++ = TPU_AT(TRF_T2);
1314 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_TX_ON),((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1315
1316 // t3: put the TXM in RX mode
1317 *TP_Ptr++ = TPU_AT(TRF_T3);
1318 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_down);
1319
1320
1321
1322
1323
1324 // t4: enable the APC LDO
1325 *TP_Ptr++ = TPU_AT(TRF_T4);
1326 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN);
1327
1328 // t5: enable the APC module
1329 *TP_Ptr++ = TPU_AT(TRF_T5);
1330 //SG *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN);
1331
1332 // t6: enable TX start and enable of Vramp
1333 //SG*TP_Ptr++ = TPU_AT(TRF_T6);
1334 //SG *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START | START_APC);
1335 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | TX_START );
1336
1337 *TP_Ptr++ = TPU_AT(TRF_T6);
1338 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START );
1339
1340 *TP_Ptr++ = TPU_AT(TRF_T7);
1341 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START | START_APC);
1342
1343 // t7: enable TX start and enable of Vramp - Internal mode
1344 //*TP_Ptr++ = TPU_AT(TRF_T7);
1345 //*TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START | START_APC );
1346
1347 // t7: enable TX start and enable of Vramp
1348 //*TP_Ptr++ = TPU_AT(TRF_T7+4);
1349 //*TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, LDO_EN | APC_EN | TX_START );
1350
1351 // t8: enable the TXEN of the TXM
1352 *TP_Ptr++ = TPU_AT(TRF_T8);
1353 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_up);
1354
1355 }
1356
1357 #endif /* (L1_RF_KBD_FIX == 0)*/
1358
1359 /*-------------------------------------------*/
1360 /* l1dmacro_tx_down */
1361 /*-------------------------------------------*/
1362 /* Close transmission window for normal burst*/
1363 /*-------------------------------------------*/
1364 #if (L1_RF_KBD_FIX == 1)
1365 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active, UWORD8 kbd_config)
1366 {
1367 UWORD8 kbd_tspact_config =0;
1368
1369 if (kbd_config == KBD_DISABLED)
1370 kbd_tspact_config = KBD_DIS_TSPACT;
1371
1372
1373 if (adc_active == ACTIVE) {
1374 // 36qbits = (10qbits for TPU programming) + (26qbits duration to convert the first ADC channel (= Battery))
1375 if ((t)<(TRF_T8+2-TRF_T9)) //Done to enable RACH Burst Support
1376 {
1377 l1dmacro_adc_read_tx (TRF_T8+10, rf_path[rf_index].tx_up);
1378 }
1379 else
1380 {
1381 l1dmacro_adc_read_tx (t + TRF_T9, rf_path[rf_index].tx_up);
1382 }
1383 }
1384
1385
1386
1387 // t10: disable APC
1388 *TP_Ptr++ = TPU_FAT (t + TRF_T10);
1389 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN | TX_START );
1390
1391 // t11: disable PA
1392 *TP_Ptr++ = TPU_FAT (t + TRF_T11);
1393 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_down);
1394 // disable Tx_Start
1395 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN );
1396
1397 // t12: power off Locosto: IDLE SCRIPT
1398 *TP_Ptr++ = TPU_FAT (t + TRF_T12);
1399 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1400
1401 // t13: Switch off APC
1402 *TP_Ptr++ = TPU_FAT (t + TRF_T13);
1403 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, 0);
1404
1405 }
1406 #endif /*(L1_RF_KBD_FIX == 1)*/
1407
1408
1409
1410 #if (L1_RF_KBD_FIX == 0)
1411 void l1dmacro_tx_down (WORD32 t, BOOL tx_flag, UWORD8 adc_active)
1412 {
1413
1414 if (adc_active == ACTIVE) {
1415 // 36qbits = (10qbits for TPU programming) + (26qbits duration to convert the first ADC channel (= Battery))
1416 l1dmacro_adc_read_tx (t + TRF_T9, rf_path[rf_index].tx_up);
1417 }
1418
1419 // t10: disable APC
1420 *TP_Ptr++ = TPU_FAT (t + TRF_T10);
1421 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN | TX_START );
1422
1423 // t11: disable PA
1424 *TP_Ptr++ = TPU_FAT (t + TRF_T11);
1425 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, rf_path[rf_index].tx_down);
1426 // disable Tx_Start
1427 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, kbd_tspact_config | LDO_EN | APC_EN );
1428
1429 // t12: power off Locosto: IDLE SCRIPT
1430 *TP_Ptr++ = TPU_FAT (t + TRF_T12);
1431 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE), (UWORD16)(&drp_regs->SCRIPT_STARTL));
1432
1433 // t13: Switch off APC
1434 *TP_Ptr++ = TPU_FAT (t + TRF_T13);
1435 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, 0);
1436
1437 }
1438
1439
1440 #endif/*(L1_RF_KBD_FIX == 0)*/
1441
1442 /*
1443 * l1dmacro_rx_nb
1444 *
1445 * Receive Normal burst
1446 */
1447 #if (L1_RF_KBD_FIX == 1)
1448 #if (L1_MADC_ON == 1)
1449 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq, UWORD8 adc_active, UWORD8 csf_filter_choice
1450 #if(NEW_SNR_THRESHOLD==1)
1451 , UWORD8 saic_flag_rx_up
1452 #endif
1453 )
1454 {
1455 l1dmacro_rx_up(adc_active, csf_filter_choice, L1_KBD_DIS_RX_NB
1456 #if(NEW_SNR_THRESHOLD==1)
1457 , saic_flag_rx_up
1458 #endif
1459 );
1460 l1dmacro_rx_down (STOP_RX_SNB);
1461 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_NB * (-TRF_R3_1 + STOP_RX_SNB - TRF_R7);
1462 }
1463 #else
1464 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq,UWORD8 csf_filter_choice
1465 #if(NEW_SNR_THRESHOLD==1)
1466 , UWORD8 saic_flag_rx_up
1467 #endif
1468 )
1469 {
1470 l1dmacro_rx_up(csf_filter_choice, L1_KBD_DIS_RX_NB
1471 #if(NEW_SNR_THRESHOLD==1)
1472 , saic_flag_rx_up
1473 #endif
1474 );
1475 l1dmacro_rx_down (STOP_RX_SNB);
1476 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_NB * (-TRF_R3_1 + STOP_RX_SNB - TRF_R7);
1477 }
1478 #endif
1479 #endif /*(L1_RF_KBD_FIX == 1)*/
1480
1481 #if (L1_RF_KBD_FIX == 0)
1482 #if (L1_MADC_ON == 1)
1483 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq, UWORD8 adc_active, UWORD8 csf_filter_choice
1484 #if(NEW_SNR_THRESHOLD==1)
1485 , UWORD8 saic_flag_rx_up
1486 #endif
1487 )
1488 {
1489 l1dmacro_rx_up(adc_active, csf_filter_choice
1490 #if(NEW_SNR_THRESHOLD==1)
1491 , saic_flag_rx_up
1492 #endif
1493 );
1494 l1dmacro_rx_down (STOP_RX_SNB);
1495
1496 }
1497 #else
1498 void l1dmacro_rx_nb (SYS_UWORD16 radio_freq,UWORD8 csf_filter_choice
1499 #if(NEW_SNR_THRESHOLD==1)
1500 , UWORD8 saic_flag_rx_up
1501 #endif
1502 )
1503 {
1504 l1dmacro_rx_up(csf_filter_choice
1505 #if(NEW_SNR_THRESHOLD==1)
1506 , saic_flag_rx_up
1507 #endif
1508 );
1509 l1dmacro_rx_down (STOP_RX_SNB);
1510
1511 }
1512 #endif
1513
1514 #endif/*(L1_RF_KBD_FIX == 0)*/
1515
1516
1517
1518 /*
1519 * l1dmacro_rx_sb
1520 * Receive Synchro burst
1521 */
1522 #if (L1_RF_KBD_FIX == 1)
1523 #if (L1_MADC_ON == 1)
1524 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1525 {
1526 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_SB
1527 #if(NEW_SNR_THRESHOLD==1)
1528 , SAIC_OFF
1529 #endif
1530 );
1531
1532 l1dmacro_rx_down (STOP_RX_SB);
1533 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_SB * (-TRF_R3_1 + STOP_RX_SB - TRF_R7);
1534 }
1535
1536 #else
1537 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
1538 {
1539 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_SB
1540 #if(NEW_SNR_THRESHOLD==1)
1541 , SAIC_OFF
1542 #endif
1543 );
1544 l1dmacro_rx_down (STOP_RX_SB);
1545 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_SB * (-TRF_R3_1 + STOP_RX_SB - TRF_R7);
1546 }
1547 #endif
1548
1549 #endif/*(L1_RF_KBD_FIX == 1)*/
1550
1551 #if(L1_RF_KBD_FIX == 0)
1552 #if (L1_MADC_ON == 1)
1553 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1554 {
1555 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
1556 #if(NEW_SNR_THRESHOLD==1)
1557 , SAIC_OFF
1558 #endif
1559 );
1560 l1dmacro_rx_down (STOP_RX_SB);
1561
1562 }
1563
1564 #else
1565 void l1dmacro_rx_sb (SYS_UWORD16 radio_freq)
1566 {
1567 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
1568 #if(NEW_SNR_THRESHOLD==1)
1569 , SAIC_OFF
1570 #endif
1571 );
1572 l1dmacro_rx_down (STOP_RX_SB);
1573
1574 }
1575 #endif
1576
1577 #endif/*(L1_RF_KBD_FIX == 0)*/
1578
1579 /*
1580 * l1dmacro_rx_ms
1581 *
1582 * Receive Power Measurement window
1583 */
1584 #if(L1_RF_KBD_FIX == 1)
1585 #if (L1_MADC_ON == 1)
1586 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1587 {
1588 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_MS
1589 #if(NEW_SNR_THRESHOLD==1)
1590 , SAIC_OFF
1591 #endif
1592 );
1593 l1dmacro_rx_down (STOP_RX_PW_1);
1594 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_MS * (-TRF_R3_1 + STOP_RX_PW_1 - TRF_R7);
1595 }
1596
1597 #else
1598 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
1599 {
1600 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_MS
1601 #if(NEW_SNR_THRESHOLD==1)
1602 , SAIC_OFF
1603 #endif
1604 );
1605 l1dmacro_rx_down (STOP_RX_PW_1);
1606 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_MS * (-TRF_R3_1 + STOP_RX_PW_1 - TRF_R7);
1607 }
1608 #endif
1609 #endif/*(L1_RF_KBD_FIX == 1)*/
1610
1611 #if(L1_RF_KBD_FIX == 0)
1612 #if (L1_MADC_ON == 1)
1613 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1614 {
1615 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
1616 #if(NEW_SNR_THRESHOLD==1)
1617 , SAIC_OFF
1618 #endif
1619 );
1620 l1dmacro_rx_down (STOP_RX_PW_1);
1621
1622 }
1623
1624 #else
1625 void l1dmacro_rx_ms (SYS_UWORD16 radio_freq)
1626 {
1627 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
1628 #if(NEW_SNR_THRESHOLD==1)
1629 , SAIC_OFF
1630 #endif
1631 );
1632 l1dmacro_rx_down (STOP_RX_PW_1);
1633
1634 }
1635 #endif
1636
1637 #endif/*(L1_RF_KBD_FIX == 0)*/
1638
1639 /*
1640 * l1dmacro_rx_fb
1641 *
1642 * Receive Frequency burst
1643 */
1644 #if(L1_RF_KBD_FIX == 1)
1645 #if (L1_MADC_ON == 1)
1646 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1647 #else
1648 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
1649 #endif
1650 {
1651 #if (L1_MADC_ON == 1)
1652 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
1653 #if(NEW_SNR_THRESHOLD==1)
1654 , SAIC_OFF
1655 #endif
1656 );
1657 #else
1658 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
1659 #if(NEW_SNR_THRESHOLD==1)
1660 , SAIC_OFF
1661 #endif
1662 );
1663 #endif
1664 l1s.total_kbd_on_time = 5000;
1665 *TP_Ptr++ = TPU_AT(0);
1666 *TP_Ptr++ = TPU_AT(0);
1667 *TP_Ptr++ = TPU_AT(0);
1668 *TP_Ptr++ = TPU_AT(0);
1669 *TP_Ptr++ = TPU_AT(0);
1670 *TP_Ptr++ = TPU_AT(0);
1671 *TP_Ptr++ = TPU_AT(0);
1672 *TP_Ptr++ = TPU_AT(0);
1673 *TP_Ptr++ = TPU_AT(0);
1674 *TP_Ptr++ = TPU_AT(0);
1675 *TP_Ptr++ = TPU_AT(0);
1676
1677 l1dmacro_rx_down (STOP_RX_FB);
1678 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB * (STOP_RX_FB - TRF_R7);
1679 }
1680 #endif/*(L1_RF_KBD_FIX == 1)*/
1681
1682 #if(L1_RF_KBD_FIX == 0)
1683 #if (L1_MADC_ON == 1)
1684 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1685 #else
1686 void l1dmacro_rx_fb (SYS_UWORD16 radio_freq)
1687 #endif
1688 {
1689 #if (L1_MADC_ON == 1)
1690 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
1691 #if(NEW_SNR_THRESHOLD==1)
1692 , SAIC_OFF
1693 #endif
1694 );
1695 #else
1696 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
1697 #if(NEW_SNR_THRESHOLD==1)
1698 , SAIC_OFF
1699 #endif
1700 );
1701 #endif
1702
1703 *TP_Ptr++ = TPU_AT(0);
1704 *TP_Ptr++ = TPU_AT(0);
1705 *TP_Ptr++ = TPU_AT(0);
1706 *TP_Ptr++ = TPU_AT(0);
1707 *TP_Ptr++ = TPU_AT(0);
1708 *TP_Ptr++ = TPU_AT(0);
1709 *TP_Ptr++ = TPU_AT(0);
1710 *TP_Ptr++ = TPU_AT(0);
1711 *TP_Ptr++ = TPU_AT(0);
1712 *TP_Ptr++ = TPU_AT(0);
1713 *TP_Ptr++ = TPU_AT(0);
1714
1715 l1dmacro_rx_down (STOP_RX_FB);
1716
1717 }
1718
1719 #endif/*(L1_RF_KBD_FIX == 0)*/
1720
1721 /*
1722 * l1dmacro_rx_fb26
1723 *
1724 * Receive Frequency burst for TCH.
1725 */
1726 #if(L1_RF_KBD_FIX == 1)
1727 #if (L1_MADC_ON == 1)
1728 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1729 {
1730 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB26
1731 #if(NEW_SNR_THRESHOLD==1)
1732 , SAIC_OFF
1733 #endif
1734 );
1735 l1s.total_kbd_on_time = 5000;
1736 *TP_Ptr++ = TPU_AT(0);
1737
1738 l1dmacro_rx_down (STOP_RX_FB26);
1739 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB26 * (STOP_RX_FB26 - TRF_R7);
1740 }
1741
1742 #else
1743 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
1744 {
1745 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB26
1746 #if(NEW_SNR_THRESHOLD==1)
1747 , SAIC_OFF
1748 #endif
1749 );
1750 l1s.total_kbd_on_time = 5000;
1751 *TP_Ptr++ = TPU_AT(0);
1752
1753 l1dmacro_rx_down (STOP_RX_FB26);
1754 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_RX_FB26 * (STOP_RX_FB26 - TRF_R7);
1755 }
1756 #endif
1757 #endif/*(L1_RF_KBD_FIX == 1)*/
1758
1759 #if(L1_RF_KBD_FIX == 0)
1760 #if (L1_MADC_ON == 1)
1761 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq,UWORD8 adc_active)
1762 {
1763 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER
1764 #if(NEW_SNR_THRESHOLD==1)
1765 , SAIC_OFF
1766 #endif
1767 );
1768
1769 *TP_Ptr++ = TPU_AT(0);
1770
1771 l1dmacro_rx_down (STOP_RX_FB26);
1772
1773 }
1774
1775 #else
1776 void l1dmacro_rx_fb26 (SYS_UWORD16 radio_freq)
1777 {
1778 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER
1779 #if(NEW_SNR_THRESHOLD==1)
1780 , SAIC_OFF
1781 #endif
1782 );
1783
1784 *TP_Ptr++ = TPU_AT(0);
1785
1786 l1dmacro_rx_down (STOP_RX_FB26);
1787
1788 }
1789 #endif
1790 #endif/*(L1_RF_KBD_FIX == 0)*/
1791
1792 /*
1793 * l1dmacro_tx_nb
1794 *
1795 * Transmit Normal burst
1796 */
1797 #if(L1_RF_KBD_FIX == 1)
1798
1799 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
1800 {
1801 l1dmacro_tx_up (L1_KBD_DIS_TX_NB);
1802 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active, L1_KBD_DIS_TX_NB);
1803 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_TX_NB * (-TRF_T3_1 + l1_config.params.tx_nb_duration + TRF_T12);
1804 }
1805
1806 #endif/*#if(L1_RF_KBD_FIX == 1)*/
1807
1808 #if(L1_RF_KBD_FIX == 0)
1809 void l1dmacro_tx_nb (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
1810 {
1811 l1dmacro_tx_up ();
1812 l1dmacro_tx_down (l1_config.params.tx_nb_duration, FALSE, adc_active);
1813
1814 }
1815
1816 #endif/*#if(L1_RF_KBD_FIX == 0)*/
1817
1818 /*
1819 * l1dmacro_tx_ra
1820 *
1821 * Transmit Random Access burst
1822 */
1823 #if(L1_RF_KBD_FIX == 1)
1824
1825 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
1826 {
1827 l1dmacro_tx_up (L1_KBD_DIS_TX_RA);
1828 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active, L1_KBD_DIS_TX_RA);
1829 l1s.total_kbd_on_time = l1s.total_kbd_on_time - L1_KBD_DIS_TX_RA * (-TRF_T3_1 + l1_config.params.tx_ra_duration + TRF_T12);
1830 }
1831 #endif /*#if(L1_RF_KBD_FIX == 1)*/
1832
1833 #if(L1_RF_KBD_FIX == 0)
1834 void l1dmacro_tx_ra (SYS_UWORD16 radio_freq, UWORD8 txpwr, UWORD8 adc_active)
1835 {
1836 l1dmacro_tx_up ();
1837 l1dmacro_tx_down (l1_config.params.tx_ra_duration, FALSE, adc_active);
1838
1839 }
1840 #endif/*#if(L1_RF_KBD_FIX == 0)*/
1841
1842 /*
1843 * l1dmacro_rx_cont
1844 *
1845 * Receive continuously
1846 */
1847 #if(L1_RF_KBD_FIX == 1)
1848 #if (L1_MADC_ON == 1)
1849 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
1850 UWORD8 adc_active, UWORD8 csf_filter_choice
1851 #if(NEW_SNR_THRESHOLD==1)
1852 , UWORD8 saic_flag_rx_up
1853 #endif
1854 )
1855 {
1856 l1dmacro_rx_up (adc_active, csf_filter_choice, KBD_DISABLED
1857 #if(NEW_SNR_THRESHOLD==1)
1858 , saic_flag_rx_up
1859 #endif
1860 );
1861 }
1862 #else
1863 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
1864 UWORD8 csf_filter_choice
1865 #if(NEW_SNR_THRESHOLD==1)
1866 , UWORD8 saic_flag_rx_up
1867 #endif
1868 )
1869 {
1870 l1dmacro_rx_up (csf_filter_choice,KBD_DISABLED
1871 #if(NEW_SNR_THRESHOLD==1)
1872 , saic_flag_rx_up
1873 #endif
1874 );
1875 }
1876 #endif
1877 #endif/*#if(L1_RF_KBD_FIX == 1)*/
1878
1879 #if(L1_RF_KBD_FIX == 0)
1880 #if (L1_MADC_ON == 1)
1881 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
1882 UWORD8 adc_active, UWORD8 csf_filter_choice
1883 #if(NEW_SNR_THRESHOLD==1)
1884 , UWORD8 saic_flag_rx_up
1885 #endif
1886 )
1887 {
1888 l1dmacro_rx_up (adc_active, csf_filter_choice
1889 #if(NEW_SNR_THRESHOLD==1)
1890 , saic_flag_rx_up
1891 #endif
1892 );
1893 }
1894 #else
1895 void l1dmacro_rx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr,
1896 UWORD8 csf_filter_choice
1897 #if(NEW_SNR_THRESHOLD==1)
1898 , UWORD8 saic_flag_rx_up
1899 #endif
1900 )
1901 {
1902 l1dmacro_rx_up (csf_filter_choice
1903 #if(NEW_SNR_THRESHOLD==1)
1904 , saic_flag_rx_up
1905 #endif
1906 );
1907 }
1908 #endif
1909
1910 #endif/*#if(L1_RF_KBD_FIX == 0)*/
1911
1912
1913 /*
1914 * l1dmacro_tx_cont
1915 *
1916 * Transmit continuously
1917 */
1918 #if(L1_RF_KBD_FIX == 1)
1919 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
1920 {
1921 l1dmacro_tx_up (KBD_DISABLED);
1922 }
1923 #endif/*#if(L1_RF_KBD_FIX == 1)*/
1924
1925 #if(L1_RF_KBD_FIX == 0)
1926 void l1dmacro_tx_cont (SYS_UWORD16 radio_freq, UWORD8 txpwr)
1927 {
1928 l1dmacro_tx_up ();
1929 }
1930 #endif/*#if(L1_RF_KBD_FIX == 0)*/
1931
1932 /*
1933 * l1d_macro_stop_cont
1934 *
1935 * Stop continuous Tx or Rx
1936 */
1937 #if(L1_RF_KBD_FIX == 1)
1938 void l1dmacro_stop_cont (void)
1939 {
1940 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
1941 l1dmacro_rx_down(STOP_RX_SNB);
1942 else
1943 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0, KBD_DISABLED);
1944 }
1945 #endif/*#if(L1_RF_KBD_FIX == 1)*/
1946
1947 #if(L1_RF_KBD_FIX == 0)
1948 void l1dmacro_stop_cont (void)
1949 {
1950 if (l1_config.tmode.rf_params.down_up == TMODE_DOWNLINK)
1951 l1dmacro_rx_down(STOP_RX_SNB);
1952 else
1953 l1dmacro_tx_down(l1_config.params.tx_nb_duration, FALSE, 0);
1954 }
1955
1956 #endif/* */
1957
1958
1959 /*------------------------------------------*/
1960 /* l1dmacro_reset_hw */
1961 /*------------------------------------------*/
1962 /* Reset and set OFFSET register */
1963 /*------------------------------------------*/
1964
1965 void l1dmacro_reset_hw(UWORD32 servingCellOffset)
1966 {
1967 TPU_Reset(1); // reset TPU only, no TSP reset
1968 TPU_Reset(0);
1969 TP_Ptr = (UWORD16 *) TPU_RAM;
1970
1971 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP);
1972 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_L, TXM_SLEEP);
1973 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_IDLE),((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1974
1975 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
1976
1977 }
1978
1979 // l1dmacro_RF_sleep
1980 // Program RF for BIG or DEEP sleep
1981
1982
1983 void l1dmacro_RF_sleep (void)
1984 {
1985 // sending REG_OFF script
1986 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_OFF), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
1987
1988 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP); //Shutdown FEM
1989
1990 *TP_Ptr++ = TPU_SLEEP;
1991 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
1992 TP_Enable(1);
1993 TPU_wait_idle();
1994
1995 }
1996
1997
1998 // l1dmacro_RF_wakeup
1999 //* wakeup RF from BIG or DEEP sleep
2000
2001 void l1dmacro_RF_wakeup (void)
2002 {
2003 // sending REG_ON script
2004 MOVE_REG_TSP_TO_RF(START_SCRIPT(DRP_REG_ON), ((UWORD16)( ((UWORD32)(&drp_regs->SCRIPT_STARTL))&0xFFFF)));
2005
2006 *TP_Ptr++ = TPU_SLEEP;
2007 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
2008 TP_Enable(1);
2009 TPU_wait_idle();
2010
2011
2012 }
2013
2014
2015 // l1dmacro_init_hw
2016 // Reset VEGA, then remove reset
2017 // Init RF/IF synthesizers
2018
2019 void l1dmacro_init_hw(void)
2020 {
2021 WORD32 t = 100; // start time for actions
2022
2023 TP_Reset(1); // reset TPU and TSP
2024
2025 // GSM 1.5 : TPU clock enable is in TPU
2026 //---------------------------------------
2027 TPU_ClkEnable(1); // TPU CLOCK ON
2028
2029 TP_Reset(0);
2030
2031
2032 TP_Ptr = (UWORD16 *) TPU_RAM;
2033
2034 // Set FEM to inactive state before turning ON the RF Board
2035 // At this point the RF regulators are still OFF. Thus the
2036 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
2037
2038
2039 // TPU_SLEEP
2040 l1dmacro_idle();
2041
2042 *TP_Ptr++ = TPU_AT(t);
2043 *TP_Ptr++ = TPU_SYNC(0);
2044
2045 //Check Initialisation or Reset for TPU2OCP
2046
2047
2048 *TP_Ptr++ = TPU_MOVE(REG_SPI_ACT_U, TXM_SLEEP);
2049
2050 t = 1000; // arbitrary start time
2051
2052 t = rf_init(t); // Initialize RF Board
2053
2054 *TP_Ptr++ = TPU_AT(t);
2055
2056 // TPU_SLEEP
2057 l1dmacro_idle();
2058
2059 return;
2060 }
2061
2062 /*------------------------------------------*/
2063 /* l1dmacro_init_hw_light */
2064 /*------------------------------------------*/
2065 /* Reset VEGA, then remove reset */
2066 /* Init RF/IF synthesizers */
2067 /*------------------------------------------*/
2068 void l1dmacro_init_hw_light(void)
2069 {
2070 UWORD32 t = 100; // start time for actions //
2071 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; //
2072 *TP_Ptr++ = TPU_AT(t); //
2073 t = 1000; // arbitrary start time //
2074
2075 t = rf_init_light(t); // Initialize RF Board //
2076
2077 *TP_Ptr++ = TPU_AT(t); //
2078 l1dmacro_idle(); //
2079
2080 return;
2081 }
2082
2083 //BHO added
2084 /*
2085 * l1dmacro_rx_fbsb
2086 *
2087 * Receive Frequency burst
2088 */
2089
2090 #if ((REL99 == 1) && (FF_BHO == 1))
2091 #if(L1_RF_KBD_FIX == 1)
2092 #if (L1_MADC_ON == 1)
2093 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
2094 #else
2095 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
2096 #endif
2097 {
2098 #if (L1_MADC_ON == 1)
2099 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB
2100 #if(NEW_SNR_THRESHOLD==1)
2101 , SAIC_OFF
2102 #endif
2103 );
2104 #else
2105 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER, L1_KBD_DIS_RX_FB);
2106 #endif
2107
2108
2109 // same as rx_fb
2110 *TP_Ptr++ = TPU_AT(0); // 1
2111 *TP_Ptr++ = TPU_AT(0); // 2
2112 *TP_Ptr++ = TPU_AT(0); // 3
2113 *TP_Ptr++ = TPU_AT(0); // 4
2114 *TP_Ptr++ = TPU_AT(0); // 5
2115 *TP_Ptr++ = TPU_AT(0); // 6
2116 *TP_Ptr++ = TPU_AT(0); // 7
2117 *TP_Ptr++ = TPU_AT(0); // 8
2118 *TP_Ptr++ = TPU_AT(0); // 9
2119 *TP_Ptr++ = TPU_AT(0); // 10
2120 *TP_Ptr++ = TPU_AT(0); // 11
2121
2122 // one more for SB
2123 *TP_Ptr++ = TPU_AT(0); // 12
2124
2125 l1dmacro_rx_down (STOP_RX_FBSB);
2126 }
2127 #endif/*(L1_RF_KBD_FIX == 1)*/
2128
2129 #if(L1_RF_KBD_FIX == 0)
2130 #if (L1_MADC_ON == 1)
2131 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq, UWORD8 adc_active)
2132 #else
2133 void l1dmacro_rx_fbsb (SYS_UWORD16 radio_freq)
2134 #endif
2135 {
2136 #if (L1_MADC_ON == 1)
2137 l1dmacro_rx_up(adc_active, L1_SAIC_HARDWARE_FILTER);
2138 #else
2139 l1dmacro_rx_up(L1_SAIC_HARDWARE_FILTER);
2140 #endif
2141
2142 // same as rx_fb
2143 *TP_Ptr++ = TPU_AT(0); // 1
2144 *TP_Ptr++ = TPU_AT(0); // 2
2145 *TP_Ptr++ = TPU_AT(0); // 3
2146 *TP_Ptr++ = TPU_AT(0); // 4
2147 *TP_Ptr++ = TPU_AT(0); // 5
2148 *TP_Ptr++ = TPU_AT(0); // 6
2149 *TP_Ptr++ = TPU_AT(0); // 7
2150 *TP_Ptr++ = TPU_AT(0); // 8
2151 *TP_Ptr++ = TPU_AT(0); // 9
2152 *TP_Ptr++ = TPU_AT(0); // 10
2153 *TP_Ptr++ = TPU_AT(0); // 11
2154
2155 // one more for SB
2156 *TP_Ptr++ = TPU_AT(0); // 12
2157
2158 l1dmacro_rx_down (STOP_RX_FBSB);
2159 }
2160 #endif/*(L1_RF_KBD_FIX == 0)*/
2161 #endif // #if ((REL99 == 1) && (FF_BHO == 1))
2162
2163 ////BHO