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comparison gsm-fw/sysglue/flashboot.S @ 631:7cf154cd3891

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gsm-fw/sysglue: prep for building flashable images
author Michael Spacefalcon <msokolov@ivan.Harhan.ORG>
date Mon, 01 Sep 2014 17:04:19 +0000
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children 1f54d2ba42c2
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630:4cd1dcc167e4 631:7cf154cd3891
1 /*
2 * This assembly module contains those bits which are specific to flashable
3 * image builds only. It puts bits of code into several different sections.
4 */
5
6 #include "../include/config.h"
7
8 .section flashboot.text,"ax",%progbits
9 .code 32
10 .org 0
11 #if FLASH_BOOT_VIA_BOOTROM
12 /* sane targets with Calypso boot ROM enabled by the PCB wiring */
13 /* provide the necessary magic words for the boot ROM */
14 .word 0
15 .word _Flash_boot_entry
16 #elif CONFIG_TARGET_C139
17 /*
18 * On this target we are going to put a special flash boot stage at 0x2000,
19 * and then the actual gsm-fw image at the flash erase block boundary
20 * at 0x10000. The following bits will be read by our intermediate
21 * flash boot stage.
22 */
23 .asciz "FreeCalypso"
24 .word _Flash_boot_entry
25 #elif CONFIG_TARGET_C155
26 /*
27 * On this target the hand-off point between the bootloader and the main
28 * fw image coincides with a flash erase block boundary, thus no need
29 * for an intermediate flash boot stage. The following bits will appear
30 * at 0x20000.
31 */
32 .asciz "FreeCalypso firmware for C155/156 target"
33 .org 0xE0
34 /* C155/156 bootloader jumps here */
35 b _Flash_boot_entry
36 #include "vectors.S"
37 #else
38 #error "Unsupported flash boot configuration"
39 #endif
40
41 .globl _Flash_boot_entry
42 _Flash_boot_entry:
43 /* first order of business: configure flash and XRAM access */
44 ldr r2, =0xFFFFFB00
45 #if CONFIG_TARGET_PIRELLI
46 mov r0, #0x00A4
47 strh r0, [r2, #0]
48 strh r0, [r2, #2]
49 strh r0, [r2, #6]
50 #else
51 mov r0, #0x00A3
52 strh r0, [r2, #0]
53 strh r0, [r2, #2]
54 #endif
55 /*
56 * Switch the CS4/ADD22 pin to the ADD22 function. We only need this
57 * setting on targets with 8 MiB flash (or XRAM) banks, but it doesn't
58 * hurt to do it on all targets (like TI's original code does),
59 * until and unless we encounter a target that uses the CS4 function.
60 */
61 ldr r1, =0xFFFEF006
62 mov r2, #0x0008
63 strh r2, [r1]
64 /* we now have full access to all flash and RAM on the device */
65 /* copy iram.text to where it's supposed to be */
66 ldr r8, =__iramtext_flash_addr
67 ldr r9, =__iramtext_ram_addr
68 ldr r10, =__iramtext_size
69 1: ldmia r8!, {r0-r7}
70 stmia r9!, {r0-r7}
71 subs r10, r10, #0x20
72 bhi 1b
73 /* likewise copy .data from flash to XRAM */
74 ldr r8, =__initdata_flash_addr
75 ldr r9, =__initdata_ram_addr
76 ldr r10, =__initdata_size
77 1: ldmia r8!, {r0-r7}
78 stmia r9!, {r0-r7}
79 subs r10, r10, #0x20
80 bhi 1b
81 /* boot path joins with fc-xram loadable builds */
82 b _FlashorXram_entry