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comparison gsm-fw/L1/tpudrv/tpudrv12.c @ 887:7f305eb3c530

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gsm-fw: tpudrv12.[ch] extended to support Pirelli DP-L10 target Pirelli ramImage compiles, not tested on hw yet compiled code unchanged in the gtamodem configuration (verified)
author Space Falcon <falcon@ivan.Harhan.ORG>
date Sun, 28 Jun 2015 08:15:10 +0000
parents d42078e35ac9
children a714522c925b
comparison
equal deleted inserted replaced
886:346a15ea8222 887:7f305eb3c530
12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable. 12 * tpudrv12.obj COFF object from the Leonardo semi-src deliverable.
13 * 13 *
14 * The present reconstruction has been made by copying tpudrv61.c and 14 * The present reconstruction has been made by copying tpudrv61.c and
15 * tweaking it to match the disassembly of the reference binary object 15 * tweaking it to match the disassembly of the reference binary object
16 * named above. 16 * named above.
17 *
18 * The ugly hacks to support Pirelli DP-L10 in addition to classic
19 * TI/Openmoko target devices are original to FreeCalypso.
17 */ 20 */
18 21
19 #define TPUDRV12_C 22 #define TPUDRV12_C
20 23
21 #include "config.h" 24 #include "config.h"
102 /*------------------------------------------*/ 105 /*------------------------------------------*/
103 #define TSP_TO_RF(rf_data)\ 106 #define TSP_TO_RF(rf_data)\
104 {\ 107 {\
105 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \ 108 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, ((rf_data) >> 8) & 0xFF); \
106 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \ 109 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_2, (rf_data) & 0xFF); \
107 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x4F); \ 110 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x0F); \
108 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \ 111 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); \
109 } 112 }
110 113
111 /*------------------------------------------*/ 114 /*------------------------------------------*/
112 /* Send a TSP command to ABB */ 115 /* Send a TSP command to ABB */
113 /*------------------------------------------*/ 116 /*------------------------------------------*/
114 #define TSP_TO_ABB(data)\ 117 #define TSP_TO_ABB(data)\
115 {\ 118 {\
116 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \ 119 *TP_Ptr++ = TPU_MOVE(TSP_TX_REG_1, (data) & 0xFF); \
117 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x06); \ 120 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_ABB | 0x06); \
118 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); \ 121 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR); \
119 } 122 }
120 123
121 /*------------------------------------------*/ 124 /*------------------------------------------*/
122 /* Trace arfcn for conversion debug */ 125 /* Trace arfcn for conversion debug */
123 /*------------------------------------------*/ 126 /*------------------------------------------*/
164 UWORD16 limit; 167 UWORD16 limit;
165 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */ 168 UWORD16 rf_chip_band; /* from tpudrv12.obj, not in tpudrv61.c */
166 T_TX_RX tx_rx[2]; 169 T_TX_RX tx_rx[2];
167 }; 170 };
168 171
172 #if CONFIG_TARGET_PIRELLI
173 typedef UWORD16 T_RXTX_UPDOWN;
174 #else
175 typedef UWORD8 T_RXTX_UPDOWN;
176 #endif
177
169 struct rf_path_s { 178 struct rf_path_s {
170 UWORD8 rx_up; 179 T_RXTX_UPDOWN rx_up;
171 UWORD8 rx_down; 180 T_RXTX_UPDOWN rx_down;
172 UWORD8 tx_up; 181 T_RXTX_UPDOWN tx_up;
173 UWORD8 tx_down; 182 T_RXTX_UPDOWN tx_down;
174 struct synth_s *synth; 183 struct synth_s *synth;
175 }; 184 };
176 185
177 const struct synth_s synth_900[] = 186 const struct synth_s synth_900[] =
178 { 187 {
329 { 338 {
330 *TP_Ptr++ = TPU_AT(t); 339 *TP_Ptr++ = TPU_AT(t);
331 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47); 340 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x47);
332 t += 5; 341 t += 5;
333 *TP_Ptr++ = TPU_AT(t); 342 *TP_Ptr++ = TPU_AT(t);
334 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x00); 343 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_OFF);
335 t += 8; 344 t += 8;
336 *TP_Ptr++ = TPU_AT(t); 345 *TP_Ptr++ = TPU_AT(t);
337 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); 346 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
338 t += 5; 347 t += 5;
339 *TP_Ptr++ = TPU_AT(t); 348 *TP_Ptr++ = TPU_AT(t);
340 TSP_TO_RF(0x0012); 349 TSP_TO_RF(0x0012);
341 t += 7; 350 t += 7;
342 *TP_Ptr++ = TPU_AT(t); 351 *TP_Ptr++ = TPU_AT(t);
513 *TP_Ptr++ = TPU_FAT(0x137E); 522 *TP_Ptr++ = TPU_FAT(0x137E);
514 TSP_TO_ABB(0x10); 523 TSP_TO_ABB(0x10);
515 *TP_Ptr++ = TPU_FAT(0x1383); 524 *TP_Ptr++ = TPU_FAT(0x1383);
516 TSP_TO_ABB(0x18); 525 TSP_TO_ABB(0x18);
517 *TP_Ptr++ = TPU_FAT(58); 526 *TP_Ptr++ = TPU_FAT(58);
518 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up | 0x01); 527 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_up | RF_SER_ON);
519 *TP_Ptr++ = TPU_FAT(62); 528 *TP_Ptr++ = TPU_FAT(62);
520 TSP_TO_ABB(0x14); 529 TSP_TO_ABB(0x14);
521 } 530 }
522 531
523 /*------------------------------------------*/ 532 /*------------------------------------------*/
530 /*------------------------------------------*/ 539 /*------------------------------------------*/
531 void l1dmacro_rx_down (WORD32 t) 540 void l1dmacro_rx_down (WORD32 t)
532 { 541 {
533 *TP_Ptr++ = TPU_FAT(t - 37); 542 *TP_Ptr++ = TPU_FAT(t - 37);
534 TSP_TO_RF(0x003A); 543 TSP_TO_RF(0x003A);
535 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01); 544 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_ON);
536 *TP_Ptr++ = TPU_FAT(t - 4); 545 *TP_Ptr++ = TPU_FAT(t - 4);
537 TSP_TO_ABB(0x00); 546 TSP_TO_ABB(0x00);
538 } 547 }
539 548
540 /*------------------------------------------*/ 549 /*------------------------------------------*/
569 *TP_Ptr++ = TPU_FAT(0x1352); 578 *TP_Ptr++ = TPU_FAT(0x1352);
570 TSP_TO_ABB(0x80); 579 TSP_TO_ABB(0x80);
571 *TP_Ptr++ = TPU_FAT(0x1384); 580 *TP_Ptr++ = TPU_FAT(0x1384);
572 TSP_TO_ABB(0xA0); 581 TSP_TO_ABB(0xA0);
573 *TP_Ptr++ = TPU_FAT(16); 582 *TP_Ptr++ = TPU_FAT(16);
574 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up | 0x01); 583 #if CONFIG_TARGET_PIRELLI
584 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, rf_path[rf_index].tx_up >> 8);
585 *TP_Ptr++ = TPU_FAT(21);
586 *TP_Ptr++ = TPU_MOVE(TSP_ACT, PA_ENABLE | RF_SER_ON);
587 #else
588 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_up | RF_SER_ON);
575 *TP_Ptr++ = TPU_FAT(21); 589 *TP_Ptr++ = TPU_FAT(21);
576 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F); 590 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x0F);
591 #endif
577 } 592 }
578 593
579 /*-------------------------------------------*/ 594 /*-------------------------------------------*/
580 /* l1dmacro_tx_down */ 595 /* l1dmacro_tx_down */
581 /*-------------------------------------------*/ 596 /*-------------------------------------------*/
590 l1dmacro_adc_read_tx(t - 44); 605 l1dmacro_adc_read_tx(t - 44);
591 *TP_Ptr++ = TPU_FAT(t - 4); 606 *TP_Ptr++ = TPU_FAT(t - 4);
592 TSP_TO_ABB(0x80); 607 TSP_TO_ABB(0x80);
593 *TP_Ptr++ = TPU_FAT(t + 22); 608 *TP_Ptr++ = TPU_FAT(t + 22);
594 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00); 609 *TP_Ptr++ = TPU_MOVE(TSP_ACTX, 0x00);
595 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down | 0x01); 610 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].tx_down | RF_SER_ON);
596 *TP_Ptr++ = TPU_FAT(t + 25); 611 *TP_Ptr++ = TPU_FAT(t + 25);
597 TSP_TO_RF(0x003A); 612 TSP_TO_RF(0x003A);
598 *TP_Ptr++ = TPU_FAT(t + 31); 613 *TP_Ptr++ = TPU_FAT(t + 31);
599 TSP_TO_ABB(0x00); 614 TSP_TO_ABB(0x00);
600 } 615 }
737 { 752 {
738 TPU_Reset(1); // reset TPU only, no TSP reset 753 TPU_Reset(1); // reset TPU only, no TSP reset
739 TPU_Reset(0); 754 TPU_Reset(0);
740 TP_Ptr = (UWORD16 *) TPU_RAM; 755 TP_Ptr = (UWORD16 *) TPU_RAM;
741 756
742 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); 757 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
743 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x17); 758 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON | FEM_OFF);
744 759
745 *TP_Ptr++ = TPU_OFFSET(servingCellOffset); 760 *TP_Ptr++ = TPU_OFFSET(servingCellOffset);
746 } 761 }
747 762
748 // l1dmacro_RF_sleep 763 // l1dmacro_RF_sleep
751 766
752 /* Rita version differs from LoCosto, reconstructing from disassembly */ 767 /* Rita version differs from LoCosto, reconstructing from disassembly */
753 void l1dmacro_RF_sleep (void) 768 void l1dmacro_RF_sleep (void)
754 { 769 {
755 TSP_TO_RF(0x0002); 770 TSP_TO_RF(0x0002);
756 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); 771 *TP_Ptr++ = TPU_MOVE(TSP_ACT, RF_SER_ON);
757 *TP_Ptr++ = TPU_WAIT(1); 772 *TP_Ptr++ = TPU_WAIT(1);
758 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21); 773 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x21);
759 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02); 774 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x02);
760 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41); 775 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
761 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); 776 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
762 *TP_Ptr++ = TPU_WAIT(100); 777 *TP_Ptr++ = TPU_WAIT(100);
763 /* code from tpudrv61.c follows, same for Rita and LoCosto */ 778 /* code from tpudrv61.c follows, same for Rita and LoCosto */
764 *TP_Ptr++ = TPU_SLEEP; 779 *TP_Ptr++ = TPU_SLEEP;
765 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; 780 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
766 TP_Enable(1); 781 TP_Enable(1);
781 void l1dmacro_RF_wakeup (void) 796 void l1dmacro_RF_wakeup (void)
782 { 797 {
783 TP_Ptr = (SYS_UWORD16 *) TPU_RAM; 798 TP_Ptr = (SYS_UWORD16 *) TPU_RAM;
784 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01); 799 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET1, 0x01);
785 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06); 800 *TP_Ptr++ = TPU_MOVE(TSP_SPI_SET2, 0x06);
786 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, 0x41); 801 *TP_Ptr++ = TPU_MOVE(TSP_CTRL1, TC1_DEVICE_RF | 0x01);
787 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, 0x02); 802 *TP_Ptr++ = TPU_MOVE(TSP_CTRL2, TC2_WR);
788 *TP_Ptr++ = TPU_WAIT(100); 803 *TP_Ptr++ = TPU_WAIT(100);
789 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01); 804 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_ON);
790 *TP_Ptr++ = TPU_WAIT(1); 805 *TP_Ptr++ = TPU_WAIT(1);
791 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down); 806 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_OFF);
792 *TP_Ptr++ = TPU_WAIT(8); 807 *TP_Ptr++ = TPU_WAIT(8);
793 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | 0x01); 808 *TP_Ptr++ = TPU_MOVE(TSP_ACT, rf_path[rf_index].rx_down | RF_SER_ON);
794 *TP_Ptr++ = TPU_WAIT(5); 809 *TP_Ptr++ = TPU_WAIT(5);
795 TSP_TO_RF(0x0012); 810 TSP_TO_RF(0x0012);
796 *TP_Ptr++ = TPU_FAT(0); 811 *TP_Ptr++ = TPU_FAT(0);
797 *TP_Ptr++ = TPU_FAT(0); 812 *TP_Ptr++ = TPU_FAT(0);
798 *TP_Ptr++ = TPU_FAT(0); 813 *TP_Ptr++ = TPU_FAT(0);
839 TP_Ptr = (UWORD16 *) TPU_RAM; 854 TP_Ptr = (UWORD16 *) TPU_RAM;
840 855
841 // Set FEM to inactive state before turning ON the RF Board 856 // Set FEM to inactive state before turning ON the RF Board
842 // At this point the RF regulators are still OFF. Thus the 857 // At this point the RF regulators are still OFF. Thus the
843 // FEM command is not inverted yet => Must use the FEM "SLEEP programming" 858 // FEM command is not inverted yet => Must use the FEM "SLEEP programming"
844 *TP_Ptr++ = TPU_MOVE(TSP_ACT, 0x01); 859 *TP_Ptr++ = TPU_MOVE(TSP_ACT, FEM_SLEEP | RF_SER_ON);
845 860
846 // TPU_SLEEP 861 // TPU_SLEEP
847 l1dmacro_idle(); 862 l1dmacro_idle();
848 863
849 *TP_Ptr++ = TPU_AT(t); 864 *TP_Ptr++ = TPU_AT(t);