FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/cdg/cdginc-locosto/p_cgrlc.h @ 654:95c433d8c274
gsm-fw/cdg: LoCosto version of cdginc regenerated
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Thu, 25 Sep 2014 09:46:42 +0000 |
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653:31d82d090499 | 654:95c433d8c274 |
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1 /* | |
2 +--------------------------------------------------------------------------+ | |
3 | PROJECT : PROTOCOL STACK | | |
4 | FILE : p_cgrlc.h | | |
5 | SOURCE : "sap\cgrlc.pdf" | | |
6 | LastModified : "2004-05-17" | | |
7 | IdAndVersion : "8010.119.008.04" | | |
8 | SrcFileTime : "Thu Nov 29 09:38:02 2007" | | |
9 | Generated by CCDGEN_2.5.5A on Thu Sep 25 09:18:53 2014 | | |
10 | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | | |
11 +--------------------------------------------------------------------------+ | |
12 */ | |
13 | |
14 /* PRAGMAS | |
15 * PREFIX : CGRLC | |
16 * COMPATIBILITY_DEFINES : NO | |
17 * ALWAYS_ENUM_IN_VAL_FILE: NO | |
18 * ENABLE_GROUP: NO | |
19 * CAPITALIZE_TYPENAME: NO | |
20 */ | |
21 | |
22 | |
23 #ifndef P_CGRLC_H | |
24 #define P_CGRLC_H | |
25 | |
26 | |
27 #define CDG_ENTER__P_CGRLC_H | |
28 | |
29 #define CDG_ENTER__FILENAME _P_CGRLC_H | |
30 #define CDG_ENTER__P_CGRLC_H__FILE_TYPE CDGINC | |
31 #define CDG_ENTER__P_CGRLC_H__LAST_MODIFIED _2004_05_17 | |
32 #define CDG_ENTER__P_CGRLC_H__ID_AND_VERSION _8010_119_008_04 | |
33 | |
34 #define CDG_ENTER__P_CGRLC_H__SRC_FILE_TIME _Thu_Nov_29_09_38_02_2007 | |
35 | |
36 #include "CDG_ENTER.h" | |
37 | |
38 #undef CDG_ENTER__P_CGRLC_H | |
39 | |
40 #undef CDG_ENTER__FILENAME | |
41 | |
42 | |
43 #include "p_cgrlc.val" | |
44 | |
45 #ifndef __T_CGRLC_fix_alloc_struct__ | |
46 #define __T_CGRLC_fix_alloc_struct__ | |
47 /* | |
48 * Fixed Allocation structure | |
49 * CCDGEN:WriteStruct_Count==1637 | |
50 */ | |
51 typedef struct | |
52 { | |
53 U8 bitmap_len; /*< 0: 1> Bitmap length */ | |
54 U8 bitmap_array[127]; /*< 1:127> Bitmap array */ | |
55 U32 end_fn; /*<128: 4> End of bitmap framenumber */ | |
56 U8 final_alloc; /*<132: 1> Final allocation */ | |
57 U8 _align0; /*<133: 1> alignment */ | |
58 U8 _align1; /*<134: 1> alignment */ | |
59 U8 _align2; /*<135: 1> alignment */ | |
60 } T_CGRLC_fix_alloc_struct; | |
61 #endif | |
62 | |
63 #ifndef __T_CGRLC_freq_param__ | |
64 #define __T_CGRLC_freq_param__ | |
65 /* | |
66 * Frequency Parameters | |
67 * CCDGEN:WriteStruct_Count==1638 | |
68 */ | |
69 typedef struct | |
70 { | |
71 U16 bcch_arfcn; /*< 0: 2> ARFCN of the BCCH */ | |
72 U8 pdch_hopping; /*< 2: 1> Hopping or no hopping is used on the assigned PDCH */ | |
73 U8 pdch_band; /*< 3: 1> PDCH band */ | |
74 } T_CGRLC_freq_param; | |
75 #endif | |
76 | |
77 #ifndef __T_CGRLC_pwr_ctrl_param__ | |
78 #define __T_CGRLC_pwr_ctrl_param__ | |
79 /* | |
80 * Power Control Parameters | |
81 * CCDGEN:WriteStruct_Count==1639 | |
82 */ | |
83 typedef struct | |
84 { | |
85 U8 alpha; /*< 0: 1> Alpha */ | |
86 U8 gamma_ch[CGRLC_MAX_TIMESLOTS]; /*< 1: 8> Gamma */ | |
87 U8 _align0; /*< 9: 1> alignment */ | |
88 U8 _align1; /*< 10: 1> alignment */ | |
89 U8 _align2; /*< 11: 1> alignment */ | |
90 } T_CGRLC_pwr_ctrl_param; | |
91 #endif | |
92 | |
93 #ifndef __T_CGRLC_c_value__ | |
94 #define __T_CGRLC_c_value__ | |
95 /* | |
96 * C-Value | |
97 * CCDGEN:WriteStruct_Count==1640 | |
98 */ | |
99 typedef struct | |
100 { | |
101 S32 c_lev; /*< 0: 4> C-value raw data level */ | |
102 U16 c_idx; /*< 4: 2> C-value raw data index */ | |
103 U16 c_acrcy; /*< 6: 2> C-value raw data accuracy */ | |
104 } T_CGRLC_c_value; | |
105 #endif | |
106 | |
107 #ifndef __T_CGRLC_pan_struct__ | |
108 #define __T_CGRLC_pan_struct__ | |
109 /* | |
110 * Pan Structure | |
111 * CCDGEN:WriteStruct_Count==1641 | |
112 */ | |
113 typedef struct | |
114 { | |
115 U8 inc; /*< 0: 1> Pan increment */ | |
116 U8 dec; /*< 1: 1> Pan decrement */ | |
117 U8 pmax; /*< 2: 1> Pan maximum */ | |
118 U8 _align0; /*< 3: 1> alignment */ | |
119 } T_CGRLC_pan_struct; | |
120 #endif | |
121 | |
122 #ifndef __T_CGRLC_glbl_pwr_ctrl_param__ | |
123 #define __T_CGRLC_glbl_pwr_ctrl_param__ | |
124 /* | |
125 * Global Power Control Parameters | |
126 * CCDGEN:WriteStruct_Count==1642 | |
127 */ | |
128 typedef struct | |
129 { | |
130 U8 alpha; /*< 0: 1> Alpha */ | |
131 U8 t_avg_t; /*< 1: 1> T_AVG_T */ | |
132 U8 pb; /*< 2: 1> Power reduction value */ | |
133 U8 pc_meas_chan; /*< 3: 1> PC_MEAS_CHAN */ | |
134 U8 pwr_max; /*< 4: 1> Maximum output power of the MS. */ | |
135 U8 _align0; /*< 5: 1> alignment */ | |
136 U8 _align1; /*< 6: 1> alignment */ | |
137 U8 _align2; /*< 7: 1> alignment */ | |
138 } T_CGRLC_glbl_pwr_ctrl_param; | |
139 #endif | |
140 | |
141 #ifndef __T_CGRLC_pwr_ctrl__ | |
142 #define __T_CGRLC_pwr_ctrl__ | |
143 /* | |
144 * Power Control Information | |
145 * CCDGEN:WriteStruct_Count==1643 | |
146 */ | |
147 typedef struct | |
148 { | |
149 U8 _align0; /*< 0: 1> alignment */ | |
150 U8 _align1; /*< 1: 1> alignment */ | |
151 U8 _align2; /*< 2: 1> alignment */ | |
152 U8 v_pwr_ctrl_param; /*< 3: 1> valid-flag */ | |
153 T_CGRLC_pwr_ctrl_param pwr_ctrl_param; /*< 4: 12> Power Control Parameters */ | |
154 U8 _align3; /*< 16: 1> alignment */ | |
155 U8 _align4; /*< 17: 1> alignment */ | |
156 U8 _align5; /*< 18: 1> alignment */ | |
157 U8 v_glbl_pwr_ctrl_param; /*< 19: 1> valid-flag */ | |
158 T_CGRLC_glbl_pwr_ctrl_param glbl_pwr_ctrl_param; /*< 20: 8> Global Power Control Parameters */ | |
159 U8 _align6; /*< 28: 1> alignment */ | |
160 U8 _align7; /*< 29: 1> alignment */ | |
161 U8 _align8; /*< 30: 1> alignment */ | |
162 U8 v_freq_param; /*< 31: 1> valid-flag */ | |
163 T_CGRLC_freq_param freq_param; /*< 32: 4> Frequency Parameters */ | |
164 U8 _align9; /*< 36: 1> alignment */ | |
165 U8 _align10; /*< 37: 1> alignment */ | |
166 U8 _align11; /*< 38: 1> alignment */ | |
167 U8 v_c_value; /*< 39: 1> valid-flag */ | |
168 T_CGRLC_c_value c_value; /*< 40: 8> C-Value */ | |
169 } T_CGRLC_pwr_ctrl; | |
170 #endif | |
171 | |
172 | |
173 /* | |
174 * End of substructure section, begin of primitive definition section | |
175 */ | |
176 | |
177 #ifndef __T_CGRLC_ENABLE_REQ__ | |
178 #define __T_CGRLC_ENABLE_REQ__ | |
179 /* | |
180 * | |
181 * CCDGEN:WriteStruct_Count==1644 | |
182 */ | |
183 typedef struct | |
184 { | |
185 U8 enable_cause; /*< 0: 1> Enable Cause */ | |
186 U8 _align0; /*< 1: 1> alignment */ | |
187 U8 _align1; /*< 2: 1> alignment */ | |
188 U8 _align2; /*< 3: 1> alignment */ | |
189 U32 ul_tlli; /*< 4: 4> Uplink TLLI value. */ | |
190 U32 dl_tlli; /*< 8: 4> Downlink TLLI value. */ | |
191 U8 _align3; /*< 12: 1> alignment */ | |
192 U8 _align4; /*< 13: 1> alignment */ | |
193 U8 _align5; /*< 14: 1> alignment */ | |
194 U8 v_pan_struct; /*< 15: 1> valid-flag */ | |
195 T_CGRLC_pan_struct pan_struct; /*< 16: 4> Pan Structure */ | |
196 U8 queue_mode; /*< 20: 1> Type of Queue Mode. */ | |
197 U8 burst_type; /*< 21: 1> Default burst type */ | |
198 U8 ab_type; /*< 22: 1> Default access burst type */ | |
199 U8 t3168_val; /*< 23: 1> T3168 Value */ | |
200 U8 cu_cause; /*< 24: 1> Cell update cause */ | |
201 U8 ac_class; /*< 25: 1> Access control class */ | |
202 U8 change_mark; /*< 26: 1> Change mark value */ | |
203 // ELEM-FF: REL99 | |
204 U8 nw_rel; /*< 27: 1> Network Release Flag */ | |
205 // ELEM-FF: REL99 | |
206 U8 pfi_support; /*< 28: 1> Basic Element */ | |
207 U8 _align6; /*< 29: 1> alignment */ | |
208 U8 _align7; /*< 30: 1> alignment */ | |
209 U8 _align8; /*< 31: 1> alignment */ | |
210 } T_CGRLC_ENABLE_REQ; | |
211 #endif | |
212 | |
213 #ifndef __T_CGRLC_DISABLE_REQ__ | |
214 #define __T_CGRLC_DISABLE_REQ__ | |
215 /* | |
216 * | |
217 * CCDGEN:WriteStruct_Count==1645 | |
218 */ | |
219 typedef struct | |
220 { | |
221 U8 disable_class; /*< 0: 1> Disable class. */ | |
222 U8 prim_status; /*< 1: 1> Primitive Queue Handler. */ | |
223 U8 _align0; /*< 2: 1> alignment */ | |
224 U8 _align1; /*< 3: 1> alignment */ | |
225 } T_CGRLC_DISABLE_REQ; | |
226 #endif | |
227 | |
228 #ifndef __T_CGRLC_UL_TBF_RES__ | |
229 #define __T_CGRLC_UL_TBF_RES__ | |
230 /* | |
231 * | |
232 * CCDGEN:WriteStruct_Count==1646 | |
233 */ | |
234 typedef struct | |
235 { | |
236 U32 starting_time; /*< 0: 4> TBF starting time. */ | |
237 U8 tbf_mode; /*< 4: 1> Type of TBF. */ | |
238 U8 prim_status; /*< 5: 1> Primitive Queue Handler. */ | |
239 U8 polling_bit; /*< 6: 1> Polling bit */ | |
240 U8 cs_mode; /*< 7: 1> Type of Coding Scheme. */ | |
241 U8 mac_mode; /*< 8: 1> Type of MAC mode. */ | |
242 U8 nts_max; /*< 9: 1> Number of Timeslots. */ | |
243 U8 tn_mask; /*< 10: 1> timeslot mask */ | |
244 U8 tfi; /*< 11: 1> TFI value. */ | |
245 U8 ti; /*< 12: 1> TLLI indicator. */ | |
246 U8 bs_cv_max; /*< 13: 1> Maximum Countdown value. */ | |
247 U8 tlli_cs_mode; /*< 14: 1> Type of Coding Scheme in Contention Resolution. */ | |
248 U8 r_bit; /*< 15: 1> R bit */ | |
249 T_CGRLC_fix_alloc_struct fix_alloc_struct; /*< 16:136> Fixed Allocation structure */ | |
250 U16 rlc_db_granted; /*<152: 2> RLCdata block granted */ | |
251 U8 _align0; /*<154: 1> alignment */ | |
252 U8 _align1; /*<155: 1> alignment */ | |
253 T_CGRLC_pwr_ctrl pwr_ctrl; /*<156: 48> Power Control Information */ | |
254 } T_CGRLC_UL_TBF_RES; | |
255 #endif | |
256 | |
257 #ifndef __T_CGRLC_DL_TBF_REQ__ | |
258 #define __T_CGRLC_DL_TBF_REQ__ | |
259 /* | |
260 * | |
261 * CCDGEN:WriteStruct_Count==1647 | |
262 */ | |
263 typedef struct | |
264 { | |
265 U32 starting_time; /*< 0: 4> TBF starting time. */ | |
266 U8 rlc_mode; /*< 4: 1> Type of RLC mode. */ | |
267 U8 cs_mode; /*< 5: 1> Type of Coding Scheme. */ | |
268 U8 mac_mode; /*< 6: 1> Type of MAC mode. */ | |
269 U8 nts_max; /*< 7: 1> Number of Timeslots. */ | |
270 U8 tn_mask; /*< 8: 1> timeslot mask */ | |
271 U8 tfi; /*< 9: 1> TFI value. */ | |
272 U8 t3192_val; /*< 10: 1> Value of T3192. */ | |
273 U8 ctrl_ack_bit; /*< 11: 1> Ctrl ack bit */ | |
274 U8 polling_bit; /*< 12: 1> Polling bit */ | |
275 U8 _align0; /*< 13: 1> alignment */ | |
276 U8 _align1; /*< 14: 1> alignment */ | |
277 U8 _align2; /*< 15: 1> alignment */ | |
278 T_CGRLC_pwr_ctrl pwr_ctrl; /*< 16: 48> Power Control Information */ | |
279 } T_CGRLC_DL_TBF_REQ; | |
280 #endif | |
281 | |
282 #ifndef __T_CGRLC_TBF_REL_REQ__ | |
283 #define __T_CGRLC_TBF_REL_REQ__ | |
284 /* | |
285 * | |
286 * CCDGEN:WriteStruct_Count==1648 | |
287 */ | |
288 typedef struct | |
289 { | |
290 U8 tbf_mode; /*< 0: 1> Type of TBF. */ | |
291 U8 tbf_rel_cause; /*< 1: 1> TBF Release Cause. */ | |
292 U8 _align0; /*< 2: 1> alignment */ | |
293 U8 _align1; /*< 3: 1> alignment */ | |
294 U32 rel_fn; /*< 4: 4> Release after Poll with fn. */ | |
295 } T_CGRLC_TBF_REL_REQ; | |
296 #endif | |
297 | |
298 #ifndef __T_CGRLC_TBF_REL_IND__ | |
299 #define __T_CGRLC_TBF_REL_IND__ | |
300 /* | |
301 * | |
302 * CCDGEN:WriteStruct_Count==1649 | |
303 */ | |
304 typedef struct | |
305 { | |
306 U8 tbf_mode; /*< 0: 1> Type of TBF. */ | |
307 U8 tbf_rel_cause; /*< 1: 1> TBF Release Cause. */ | |
308 U8 _align0; /*< 2: 1> alignment */ | |
309 U8 v_c_value; /*< 3: 1> valid-flag */ | |
310 T_CGRLC_c_value c_value; /*< 4: 8> C-Value */ | |
311 U8 dl_trans_id; /*< 12: 1> DL Assignmnet ID */ | |
312 U8 _align1; /*< 13: 1> alignment */ | |
313 U8 _align2; /*< 14: 1> alignment */ | |
314 U8 _align3; /*< 15: 1> alignment */ | |
315 } T_CGRLC_TBF_REL_IND; | |
316 #endif | |
317 | |
318 #ifndef __T_CGRLC_TBF_REL_RES__ | |
319 #define __T_CGRLC_TBF_REL_RES__ | |
320 /* | |
321 * | |
322 * CCDGEN:WriteStruct_Count==1650 | |
323 */ | |
324 typedef struct | |
325 { | |
326 U8 tbf_mode; /*< 0: 1> Type of TBF. */ | |
327 U8 _align0; /*< 1: 1> alignment */ | |
328 U8 _align1; /*< 2: 1> alignment */ | |
329 U8 _align2; /*< 3: 1> alignment */ | |
330 } T_CGRLC_TBF_REL_RES; | |
331 #endif | |
332 | |
333 #ifndef __T_CGRLC_UL_TBF_IND__ | |
334 #define __T_CGRLC_UL_TBF_IND__ | |
335 /* | |
336 * | |
337 * CCDGEN:WriteStruct_Count==1651 | |
338 */ | |
339 typedef struct | |
340 { | |
341 U8 access_type; /*< 0: 1> Access Type. */ | |
342 U8 ra_prio; /*< 1: 1> Radio priority */ | |
343 U8 nr_blocks; /*< 2: 1> Number of blocks */ | |
344 U8 llc_prim_type; /*< 3: 1> LLC Primitive type */ | |
345 U16 peak; /*< 4: 2> Peak value */ | |
346 U16 rlc_oct_cnt; /*< 6: 2> Number of bytes for TBF */ | |
347 // ELEM-FF: REL99 AND TI_PS_FF_TBF_EST_PACCH | |
348 U8 tbf_est_pacch; /*< 8: 1> TBF establishment on PACCH */ | |
349 U8 _align0; /*< 9: 1> alignment */ | |
350 U8 _align1; /*< 10: 1> alignment */ | |
351 U8 _align2; /*< 11: 1> alignment */ | |
352 } T_CGRLC_UL_TBF_IND; | |
353 #endif | |
354 | |
355 #ifndef __T_CGRLC_DATA_REQ__ | |
356 #define __T_CGRLC_DATA_REQ__ | |
357 /* | |
358 * | |
359 * CCDGEN:WriteStruct_Count==1652 | |
360 */ | |
361 typedef struct | |
362 { | |
363 U8 blk_owner; /*< 0: 1> Block owner. */ | |
364 U8 data_array[CGRLC_MAX_CTRL_MSG_SIZE]; /*< 1: 23> Data Array. */ | |
365 } T_CGRLC_DATA_REQ; | |
366 #endif | |
367 | |
368 #ifndef __T_CGRLC_DATA_IND__ | |
369 #define __T_CGRLC_DATA_IND__ | |
370 /* | |
371 * | |
372 * CCDGEN:WriteStruct_Count==1653 | |
373 */ | |
374 typedef struct | |
375 { | |
376 U32 fn; /*< 0: 4> Received frame number. */ | |
377 U8 tn; /*< 4: 1> Timeslot number */ | |
378 U8 data_array[CGRLC_MAX_CTRL_MSG_SIZE]; /*< 5: 23> Data Array. */ | |
379 } T_CGRLC_DATA_IND; | |
380 #endif | |
381 | |
382 #ifndef __T_CGRLC_POLL_REQ__ | |
383 #define __T_CGRLC_POLL_REQ__ | |
384 /* | |
385 * | |
386 * CCDGEN:WriteStruct_Count==1654 | |
387 */ | |
388 typedef struct | |
389 { | |
390 U32 poll_fn; /*< 0: 4> Poll frame number. */ | |
391 U8 tn; /*< 4: 1> Timeslot number */ | |
392 U8 poll_b_type; /*< 5: 1> Poll burst type */ | |
393 U8 ctrl_ack; /*< 6: 1> Ctrl_ack */ | |
394 U8 _align0; /*< 7: 1> alignment */ | |
395 } T_CGRLC_POLL_REQ; | |
396 #endif | |
397 | |
398 #ifndef __T_CGRLC_ACCESS_STATUS_REQ__ | |
399 #define __T_CGRLC_ACCESS_STATUS_REQ__ | |
400 /* | |
401 * | |
402 * CCDGEN:WriteStruct_Count==1655 | |
403 */ | |
404 typedef struct | |
405 { | |
406 U8 dummy; /*< 0: 1> no parameters */ | |
407 } T_CGRLC_ACCESS_STATUS_REQ; | |
408 #endif | |
409 | |
410 #ifndef __T_CGRLC_CTRL_MSG_SENT_IND__ | |
411 #define __T_CGRLC_CTRL_MSG_SENT_IND__ | |
412 /* | |
413 * | |
414 * CCDGEN:WriteStruct_Count==1656 | |
415 */ | |
416 typedef struct | |
417 { | |
418 U8 dummy; /*< 0: 1> no parameters */ | |
419 } T_CGRLC_CTRL_MSG_SENT_IND; | |
420 #endif | |
421 | |
422 #ifndef __T_CGRLC_STARTING_TIME_IND__ | |
423 #define __T_CGRLC_STARTING_TIME_IND__ | |
424 /* | |
425 * | |
426 * CCDGEN:WriteStruct_Count==1657 | |
427 */ | |
428 typedef struct | |
429 { | |
430 U8 tbf_mode; /*< 0: 1> Type of TBF. */ | |
431 U8 tfi; /*< 1: 1> TFI value. */ | |
432 U8 _align0; /*< 2: 1> alignment */ | |
433 U8 _align1; /*< 3: 1> alignment */ | |
434 } T_CGRLC_STARTING_TIME_IND; | |
435 #endif | |
436 | |
437 #ifndef __T_CGRLC_T3192_STARTED_IND__ | |
438 #define __T_CGRLC_T3192_STARTED_IND__ | |
439 /* | |
440 * | |
441 * CCDGEN:WriteStruct_Count==1658 | |
442 */ | |
443 typedef struct | |
444 { | |
445 U8 dummy; /*< 0: 1> no parameters */ | |
446 } T_CGRLC_T3192_STARTED_IND; | |
447 #endif | |
448 | |
449 #ifndef __T_CGRLC_CONT_RES_DONE_IND__ | |
450 #define __T_CGRLC_CONT_RES_DONE_IND__ | |
451 /* | |
452 * | |
453 * CCDGEN:WriteStruct_Count==1659 | |
454 */ | |
455 typedef struct | |
456 { | |
457 U8 dummy; /*< 0: 1> no parameters */ | |
458 } T_CGRLC_CONT_RES_DONE_IND; | |
459 #endif | |
460 | |
461 #ifndef __T_CGRLC_TA_VALUE_IND__ | |
462 #define __T_CGRLC_TA_VALUE_IND__ | |
463 /* | |
464 * | |
465 * CCDGEN:WriteStruct_Count==1660 | |
466 */ | |
467 typedef struct | |
468 { | |
469 U8 ta_value; /*< 0: 1> Timing Advance Value. */ | |
470 U8 _align0; /*< 1: 1> alignment */ | |
471 U8 _align1; /*< 2: 1> alignment */ | |
472 U8 _align2; /*< 3: 1> alignment */ | |
473 } T_CGRLC_TA_VALUE_IND; | |
474 #endif | |
475 | |
476 #ifndef __T_CGRLC_STATUS_IND__ | |
477 #define __T_CGRLC_STATUS_IND__ | |
478 /* | |
479 * | |
480 * CCDGEN:WriteStruct_Count==1661 | |
481 */ | |
482 typedef struct | |
483 { | |
484 U8 failure; /*< 0: 1> Lower layer failure. */ | |
485 U8 _align0; /*< 1: 1> alignment */ | |
486 U8 _align1; /*< 2: 1> alignment */ | |
487 U8 _align2; /*< 3: 1> alignment */ | |
488 } T_CGRLC_STATUS_IND; | |
489 #endif | |
490 | |
491 #ifndef __T_CGRLC_TEST_MODE_REQ__ | |
492 #define __T_CGRLC_TEST_MODE_REQ__ | |
493 /* | |
494 * | |
495 * CCDGEN:WriteStruct_Count==1662 | |
496 */ | |
497 typedef struct | |
498 { | |
499 U16 no_of_pdus; /*< 0: 2> Number of PDUs. */ | |
500 U8 dl_timeslot_offset; /*< 2: 1> Downlink Timeslot Offset. */ | |
501 U8 test_mode_flag; /*< 3: 1> Test mode flag. */ | |
502 } T_CGRLC_TEST_MODE_REQ; | |
503 #endif | |
504 | |
505 #ifndef __T_CGRLC_TEST_MODE_CNF__ | |
506 #define __T_CGRLC_TEST_MODE_CNF__ | |
507 /* | |
508 * | |
509 * CCDGEN:WriteStruct_Count==1663 | |
510 */ | |
511 typedef struct | |
512 { | |
513 U8 dummy; /*< 0: 1> no parameters */ | |
514 } T_CGRLC_TEST_MODE_CNF; | |
515 #endif | |
516 | |
517 #ifndef __T_CGRLC_TEST_END_REQ__ | |
518 #define __T_CGRLC_TEST_END_REQ__ | |
519 /* | |
520 * | |
521 * CCDGEN:WriteStruct_Count==1664 | |
522 */ | |
523 typedef struct | |
524 { | |
525 U8 dummy; /*< 0: 1> no parameters */ | |
526 } T_CGRLC_TEST_END_REQ; | |
527 #endif | |
528 | |
529 #ifndef __T_CGRLC_TRIGGER_IND__ | |
530 #define __T_CGRLC_TRIGGER_IND__ | |
531 /* | |
532 * | |
533 * CCDGEN:WriteStruct_Count==1665 | |
534 */ | |
535 typedef struct | |
536 { | |
537 U8 prim_type; /*< 0: 1> Type of primitive. */ | |
538 U8 _align0; /*< 1: 1> alignment */ | |
539 U8 _align1; /*< 2: 1> alignment */ | |
540 U8 _align2; /*< 3: 1> alignment */ | |
541 } T_CGRLC_TRIGGER_IND; | |
542 #endif | |
543 | |
544 #ifndef __T_CGRLC_STANDBY_STATE_IND__ | |
545 #define __T_CGRLC_STANDBY_STATE_IND__ | |
546 /* | |
547 * | |
548 * CCDGEN:WriteStruct_Count==1666 | |
549 */ | |
550 typedef struct | |
551 { | |
552 U8 dummy; /*< 0: 1> no parameters */ | |
553 } T_CGRLC_STANDBY_STATE_IND; | |
554 #endif | |
555 | |
556 #ifndef __T_CGRLC_READY_STATE_IND__ | |
557 #define __T_CGRLC_READY_STATE_IND__ | |
558 /* | |
559 * | |
560 * CCDGEN:WriteStruct_Count==1667 | |
561 */ | |
562 typedef struct | |
563 { | |
564 U8 dummy; /*< 0: 1> no parameters */ | |
565 } T_CGRLC_READY_STATE_IND; | |
566 #endif | |
567 | |
568 #ifndef __T_CGRLC_TA_VALUE_REQ__ | |
569 #define __T_CGRLC_TA_VALUE_REQ__ | |
570 /* | |
571 * | |
572 * CCDGEN:WriteStruct_Count==1668 | |
573 */ | |
574 typedef struct | |
575 { | |
576 U8 ta_value; /*< 0: 1> Timing Advance Value. */ | |
577 U8 _align0; /*< 1: 1> alignment */ | |
578 U8 _align1; /*< 2: 1> alignment */ | |
579 U8 _align2; /*< 3: 1> alignment */ | |
580 } T_CGRLC_TA_VALUE_REQ; | |
581 #endif | |
582 | |
583 #ifndef __T_CGRLC_INT_LEVEL_REQ__ | |
584 #define __T_CGRLC_INT_LEVEL_REQ__ | |
585 /* | |
586 * | |
587 * CCDGEN:WriteStruct_Count==1669 | |
588 */ | |
589 typedef struct | |
590 { | |
591 U8 ilev[CGRLC_MAX_TIMESLOTS]; /*< 0: 8> Interference level */ | |
592 } T_CGRLC_INT_LEVEL_REQ; | |
593 #endif | |
594 | |
595 #ifndef __T_CGRLC_TEST_MODE_IND__ | |
596 #define __T_CGRLC_TEST_MODE_IND__ | |
597 /* | |
598 * | |
599 * CCDGEN:WriteStruct_Count==1670 | |
600 */ | |
601 typedef struct | |
602 { | |
603 U8 test_mode_flag; /*< 0: 1> Test mode flag. */ | |
604 U8 _align0; /*< 1: 1> alignment */ | |
605 U8 _align1; /*< 2: 1> alignment */ | |
606 U8 _align2; /*< 3: 1> alignment */ | |
607 } T_CGRLC_TEST_MODE_IND; | |
608 #endif | |
609 | |
610 #ifndef __T_CGRLC_READY_TIMER_CONFIG_REQ__ | |
611 #define __T_CGRLC_READY_TIMER_CONFIG_REQ__ | |
612 /* | |
613 * | |
614 * CCDGEN:WriteStruct_Count==1671 | |
615 */ | |
616 typedef struct | |
617 { | |
618 U32 t3314_val; /*< 0: 4> Value of T3314. */ | |
619 } T_CGRLC_READY_TIMER_CONFIG_REQ; | |
620 #endif | |
621 | |
622 #ifndef __T_CGRLC_FORCE_TO_STANDBY_REQ__ | |
623 #define __T_CGRLC_FORCE_TO_STANDBY_REQ__ | |
624 /* | |
625 * | |
626 * CCDGEN:WriteStruct_Count==1672 | |
627 */ | |
628 typedef struct | |
629 { | |
630 U8 dummy; /*< 0: 1> no parameters */ | |
631 } T_CGRLC_FORCE_TO_STANDBY_REQ; | |
632 #endif | |
633 | |
634 #ifndef __T_CGRLC_PWR_CTRL_REQ__ | |
635 #define __T_CGRLC_PWR_CTRL_REQ__ | |
636 /* | |
637 * | |
638 * CCDGEN:WriteStruct_Count==1673 | |
639 */ | |
640 typedef struct | |
641 { | |
642 T_CGRLC_pwr_ctrl pwr_ctrl; /*< 0: 48> Power Control Information */ | |
643 } T_CGRLC_PWR_CTRL_REQ; | |
644 #endif | |
645 | |
646 #ifndef __T_CGRLC_PWR_CTRL_CNF__ | |
647 #define __T_CGRLC_PWR_CTRL_CNF__ | |
648 /* | |
649 * | |
650 * CCDGEN:WriteStruct_Count==1674 | |
651 */ | |
652 typedef struct | |
653 { | |
654 U8 dummy; /*< 0: 1> no parameters */ | |
655 } T_CGRLC_PWR_CTRL_CNF; | |
656 #endif | |
657 | |
658 | |
659 #include "CDG_LEAVE.h" | |
660 | |
661 | |
662 #endif |