FreeCalypso > hg > freecalypso-sw
comparison gsm-fw/L1/cfile/l1_small.c @ 544:96a96ec34139
gsm-fw/L1/cfile: initial import from LoCosto source
author | Michael Spacefalcon <msokolov@ivan.Harhan.ORG> |
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date | Sun, 03 Aug 2014 06:06:45 +0000 |
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543:2dccd2b4e5a2 | 544:96a96ec34139 |
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1 | |
2 | |
3 #include "l1sw.cfg" | |
4 #if (OP_L1_STANDALONE == 0) | |
5 #include "debug.cfg" | |
6 #include "rv_swe.h" | |
7 #endif | |
8 #if (OP_L1_STANDALONE == 1) | |
9 #include "general.h" | |
10 #endif | |
11 #include "l1_macro.h" | |
12 #include "l1_confg.h" | |
13 | |
14 #if (CODE_VERSION == SIMULATION) | |
15 #include <string.h> | |
16 #include "l1_types.h" | |
17 #include "sys_types.h" | |
18 #include "l1_const.h" | |
19 #include "l1_time.h" | |
20 #if TESTMODE | |
21 #include "l1tm_defty.h" | |
22 #endif | |
23 #if (AUDIO_TASK == 1) | |
24 #include "l1audio_const.h" | |
25 #include "l1audio_cust.h" | |
26 #include "l1audio_defty.h" | |
27 #endif | |
28 #if (L1_GTT == 1) | |
29 #include "l1gtt_const.h" | |
30 #include "l1gtt_defty.h" | |
31 #endif | |
32 #if (L1_MP3 == 1) | |
33 #include "l1mp3_defty.h" | |
34 #endif | |
35 #if (L1_MIDI == 1) | |
36 #include "l1midi_defty.h" | |
37 #endif | |
38 #if (L1_AAC == 1) | |
39 #include "l1aac_defty.h" | |
40 #endif | |
41 #include "l1_defty.h" | |
42 #include "l1_varex.h" | |
43 #include "cust_os.h" | |
44 #include "l1_msgty.h" | |
45 | |
46 #include <stdio.h> | |
47 #include "sim_cfg.h" | |
48 #include "sim_cons.h" | |
49 #include "sim_def.h" | |
50 #include "sim_var.h" | |
51 | |
52 #else | |
53 #include <string.h> | |
54 | |
55 #include "l1_types.h" | |
56 #include "sys_types.h" | |
57 #include "l1_const.h" | |
58 #include "l1_time.h" | |
59 | |
60 #if TESTMODE | |
61 #include "l1tm_defty.h" | |
62 #endif | |
63 #if (AUDIO_TASK == 1) | |
64 #include "l1audio_const.h" | |
65 #include "l1audio_cust.h" | |
66 #include "l1audio_defty.h" | |
67 #endif | |
68 #if (L1_GTT == 1) | |
69 #include "l1gtt_const.h" | |
70 #include "l1gtt_defty.h" | |
71 #endif | |
72 #if (L1_MP3 == 1) | |
73 #include "l1mp3_defty.h" | |
74 #endif | |
75 #if (L1_MIDI == 1) | |
76 #include "l1midi_defty.h" | |
77 #endif | |
78 #if (L1_AAC == 1) | |
79 #include "l1aac_defty.h" | |
80 #endif | |
81 #include "l1_defty.h" | |
82 #include "l1_varex.h" | |
83 #include "cust_os.h" | |
84 #include "l1_msgty.h" | |
85 #include "tpudrv.h" | |
86 | |
87 #endif | |
88 | |
89 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) | |
90 #include "sys_memif.h" | |
91 #endif | |
92 | |
93 #if (CHIPSET == 15) | |
94 #include "sys_inth.h" | |
95 #include "bspI2c.h" | |
96 #include "clkm.h" | |
97 | |
98 // This could be removed if i2c_pwr_interface is functional | |
99 extern volatile Bool bspI2c_busLocked[BSP_I2C_NUM_DEVICES] ; | |
100 #endif | |
101 | |
102 /* NEW COMPILER MANAGEMENT | |
103 * With compiler V3.00, the .text section must be explicitely | |
104 * defined. | |
105 * Else the following code will be put in the .cinit section. | |
106 * The change is applied to all compilers. | |
107 */ | |
108 asm(" .sect \".text\" "); | |
109 | |
110 | |
111 UWORD8 *mode_authorized = &(l1s.pw_mgr.mode_authorized); | |
112 UWORD8 *switch_PWR_MNGT = &(l1_config.pwr_mngt); | |
113 | |
114 #if (W_A_CALYPSO_BUG_01435 == 1) | |
115 | |
116 asm("SMALL_SLEEP .equ 01h"); | |
117 asm("BIG_SLEEP .equ 02h"); | |
118 asm("DEEP_SLEEP .equ 03h"); | |
119 | |
120 void f_arm_sleep_cmd(UWORD8 d_sleep_mode) | |
121 { | |
122 asm(" LDR R3, MPU_FREE_REG"); | |
123 | |
124 // here below the C code: | |
125 // if ((d_sleep_mode == SMALL_SLEEP) || (d_sleep_mode == BIG_SLEEP)) | |
126 // * (volatile UWORD16 *) 0xfffffd00 &= 0xfffe; | |
127 // else | |
128 // if (d_sleep_mode == DEEP_SLEEP) | |
129 // * (volatile UWORD16 *) 0xfffffd00 &= 0xefff; | |
130 | |
131 asm(" CMP R0, #SMALL_SLEEP"); | |
132 asm(" BEQ Small_or_Big_Sleep"); | |
133 asm(" CMP R0, #BIG_SLEEP"); | |
134 asm(" BEQ Small_or_Big_Sleep"); | |
135 asm(" CMP R0, #DEEP_SLEEP"); | |
136 asm(" BXNE LR"); | |
137 | |
138 asm("Deep_Sleep: "); | |
139 asm(" LDR R0, CLKM_CNTL_ARM_CLK_REG"); | |
140 asm(" LDRH R12, [R0, #0]"); | |
141 asm(" AND R1, R12, #255"); | |
142 asm(" AND R12, R12, #61184"); | |
143 asm(" ORR R12, R1, R12"); | |
144 asm(" STRH R12, [R0, #0]"); | |
145 asm(" STMIA R3!, {R4-R7}"); | |
146 asm(" B End_Sleep"); | |
147 | |
148 asm("Small_or_Big_Sleep: "); | |
149 asm(" LDR R12, CLKM_CNTL_ARM_CLK_REG"); | |
150 asm(" LDRH R0, [R12, #0]"); | |
151 asm(" MOV R0, R0, LSL #16"); | |
152 asm(" MOV R0, R0, LSR #17"); | |
153 asm(" MOV R0, R0, LSL #1"); | |
154 asm(" STRH R0, [R12, #0]"); | |
155 asm(" STMIA R3!, {R4-R7}"); | |
156 | |
157 asm("End_Sleep: "); | |
158 | |
159 } /* f_arm_sleep_cmd() */ | |
160 | |
161 asm("MPU_FREE_REG .word 0xffffff20"); | |
162 asm("CLKM_CNTL_ARM_CLK_REG .word 0xfffffd00"); | |
163 #endif | |
164 | |
165 #if (CHIPSET == 15) | |
166 void init_small_sleep() | |
167 { | |
168 | |
169 /* Should not disable bridge_clk during small sleep when an I2C transaction is pending | |
170 | |
171 In Locosto without BRIDGE_CLK, I2C interrupt is not generated */ | |
172 | |
173 // This could be removed if i2c_pwr_interface is functional | |
174 | |
175 Uint8 sts=0, camera_sts = 0; | |
176 | |
177 sts=i2c_pwr_interface(0); | |
178 #ifdef RVM_CAMD_SWE | |
179 #if(LOCOSTO_LITE == 0) | |
180 #if (OP_L1_STANDALONE == 0) | |
181 camera_sts = camera_pwr_interface(0); | |
182 #endif | |
183 #endif | |
184 #endif | |
185 | |
186 if (sts != 0 | |
187 #if(LOCOSTO_LITE == 0) | |
188 || camera_sts != 0 | |
189 #endif | |
190 ) | |
191 { | |
192 sts=i2c_pwr_interface(2);//enable | |
193 *((volatile UINT16 *) CLKM_CNTL_CLK) &= ~CLKM_BRIDGE_DIS; | |
194 } | |
195 else | |
196 { | |
197 sts=i2c_pwr_interface(1);//disable | |
198 *((volatile UINT16 *) CLKM_CNTL_CLK) |= CLKM_BRIDGE_DIS; | |
199 F_INTH_ENABLE_ONE_IT(C_INTH_UART_WAKEUP_IT); | |
200 } | |
201 } | |
202 | |
203 | |
204 | |
205 void exit_small_sleep() | |
206 | |
207 { | |
208 i2c_pwr_interface(2); | |
209 return; | |
210 } | |
211 | |
212 | |
213 #endif | |
214 | |
215 /*-------------------------------------------------------*/ | |
216 /* INT_Small_Sleep() */ | |
217 /*-------------------------------------------------------*/ | |
218 /* */ | |
219 /* Description: small sleep */ | |
220 /* ------------ */ | |
221 /* Called by TCT_Schedule main loop of Nucleus */ | |
222 /*-------------------------------------------------------*/ | |
223 | |
224 | |
225 asm(" .def INT_Small_Sleep "); | |
226 asm("INT_Small_Sleep "); | |
227 | |
228 /* NEW COMPILER MANAGEMENT | |
229 * _switch_PWR_MNGT and _mode_authorized must be .def and not .ref | |
230 * as they are both defined in this file. | |
231 */ | |
232 asm(" .def _switch_PWR_MNGT "); | |
233 asm(" .def _mode_authorized "); | |
234 asm("SMALL_SLEEP .equ 01h "); | |
235 asm("ALL_SLEEP .equ 04h "); | |
236 asm("PWR_MNGT .equ 01h "); | |
237 #if (OP_L1_STANDALONE == 0) | |
238 // This code log the number of time the Small sleep | |
239 // function has been invoked | |
240 #if (TI_PROFILER == 1) | |
241 asm(" ldr r0, profiler_counter "); // pick counter | |
242 asm(" mov r1,#0 "); | |
243 asm(" str r1,[r0] "); | |
244 #endif | |
245 | |
246 #if (TI_NUC_MONITOR == 1) | |
247 // Push registers on statck because R3 and R4 must not be modified | |
248 asm(" STMFD sp!,{r0-r5}"); | |
249 asm(" .global _ti_nuc_monitor_sleep "); | |
250 asm(" BL _ti_nuc_monitor_sleep"); | |
251 asm(" LDMFD sp!,{r0-r5}"); | |
252 #endif | |
253 // End log call | |
254 #endif // OP_L1_STANDALONE | |
255 //asm(" .ref TCT_Schedule_Loop "); | |
256 //asm(" B TCT_Schedule_Loop "); | |
257 | |
258 asm(" ldr r0,Switch "); // pick up sleep mode | |
259 asm(" ldr r0,[r0] "); // take the current value of the register | |
260 asm(" ldrb r1,[r0] "); // take the current value of the register | |
261 asm(" cmp r1,#PWR_MNGT "); // take the current value of the register | |
262 asm(" bne End_small_sleep "); | |
263 | |
264 asm(" ldr r0,Mode "); // pick up sleep mode | |
265 asm(" ldr r0,[r0] "); // take the current value of the register | |
266 asm(" ldrb r1,[r0] "); // take the current value of the register | |
267 asm(" cmp r1,#SMALL_SLEEP "); // take the current value of the register | |
268 asm(" beq Small_sleep_ok "); | |
269 asm(" cmp r1,#ALL_SLEEP "); // take the current value of the register | |
270 asm(" bne End_small_sleep "); | |
271 | |
272 asm("Small_sleep_ok "); | |
273 | |
274 // ***************************************************** | |
275 // CQ19599: For Calypso+ chipset, extended page mode | |
276 // shall be disabled before entering deep sleep and | |
277 // restored at wake up | |
278 // ***************************************************** | |
279 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) | |
280 asm(" .ref _f_memif_extended_page_mode_read_bit "); | |
281 asm(" .ref _f_memif_extended_page_mode_disable "); | |
282 | |
283 asm(" BL _f_memif_extended_page_mode_read_bit"); //read state of extended page mode | |
284 asm(" STMFD sp!,{r2}"); //save r2 in stack in case it was used before | |
285 asm(" MOV r2,r0"); //store the state in r2 | |
286 asm(" BL _f_memif_extended_page_mode_disable"); //disable extended page mode | |
287 #endif | |
288 | |
289 #if (CHIPSET == 15) | |
290 //// Disable IRQs | |
291 asm(" MRS r1, CPSR "); | |
292 // asm(" MOV r2,r1"); // Copy the contents on CPSR register to r2 | |
293 asm(" STMFD sp!,{r1}"); // Push r2 in the stack | |
294 asm(" ORR r1,r1,#00c0h "); // Disable IRQs | |
295 asm(" MSR CPSR,r1 "); | |
296 | |
297 asm(" .ref _init_small_sleep"); | |
298 asm(" BL _init_small_sleep"); | |
299 #endif | |
300 | |
301 // ***************************************************** | |
302 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register | |
303 // (Cf BUG_1278) | |
304 asm(" ldr r0,addrCLKM "); // pick up CNTL_ARM_CLK register address | |
305 asm(" ldrh r1,[r0] "); // take the current value of the register | |
306 asm(" orr r1,r1,#1000h "); // reset the bit | |
307 asm(" strh r1,[r0] "); //store the result | |
308 | |
309 asm(" ldr r0,addrCLKM "); // pick up CLKM clock register address | |
310 asm(" ldrh r1,[r0] "); // take the current value of the register | |
311 asm(" bic r1,r1,#1 "); // disable ARM clock | |
312 asm(" strh r1,[r0] "); | |
313 // ***************************************************** | |
314 | |
315 #if (CHIPSET == 15) | |
316 asm(" .ref _exit_small_sleep"); | |
317 asm(" BL _exit_small_sleep"); | |
318 //Enable IRQs | |
319 asm(" LDMFD sp!,{r1}"); //restore r2 from stack | |
320 //asm(" MOV r1,r2"); // Move r2 to r1 | |
321 asm(" MSR CPSR,r1 "); // Copy the contents of r1 to CPSR register | |
322 #endif | |
323 | |
324 #if (W_A_CALYPSO_BUG_01435 == 1) | |
325 asm(" MOV R0, #SMALL_SLEEP"); | |
326 asm(" BL _f_arm_sleep_cmd"); | |
327 #endif | |
328 | |
329 // ***************************************************** | |
330 // CQ19599: For Calypso+ chipset, restore the extended | |
331 // page mode if it was enabled before entering sleep | |
332 // ***************************************************** | |
333 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1) | |
334 asm(" .ref _f_memif_extended_page_mode_enable "); | |
335 asm(" CMP r2,#0"); //check if extended page mode was enabled | |
336 asm(" BEQ extended_page_mode_restored "); //if not, do nothing | |
337 asm(" BL _f_memif_extended_page_mode_enable"); //else restore it | |
338 asm("extended_page_mode_restored "); | |
339 asm(" LDMFD sp!,{r2}"); //restore r2 | |
340 #endif | |
341 | |
342 asm(" .ref TCT_Schedule_Loop "); | |
343 asm("End_small_sleep "); | |
344 asm(" B TCT_Schedule_Loop "); // Return to TCT_Schedule main loop | |
345 | |
346 asm("addrCLKM .word 0xfffffd00 ");//CLKM clock register address | |
347 | |
348 asm("Mode .word _mode_authorized "); | |
349 asm("Switch .word _switch_PWR_MNGT "); | |
350 #if (OP_L1_STANDALONE == 0) | |
351 #if (TI_PROFILER == 1) | |
352 asm(" .ref _ti_profiler_nb_sleep_call "); | |
353 asm("profiler_counter .word _ti_profiler_nb_sleep_call "); | |
354 #endif | |
355 #endif // OP_L1_STANDALONE | |
356 |